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stats: updates due to recent changesets including d0934b57735a

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This commit is contained in:
Nilay Vaish 2015-09-15 08:14:09 -05:00
parent 3de9def6c1
commit 0d6a6dfd7b
224 changed files with 51400 additions and 51721 deletions
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8
tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-minor/config.ini
View file

@ -141,7 +141,7 @@ localPredictorSize=2048
numThreads=1
[system.cpu.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=4
@ -564,7 +564,7 @@ eventq_index=0
opClass=InstPrefetch
[system.cpu.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=1
@ -613,7 +613,7 @@ eventq_index=0
size=48
[system.cpu.l2cache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8
@ -747,7 +747,7 @@ master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_
slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma
[system.iocache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:134217727
assoc=8

1481
tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-minor/stats.txt
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File diff suppressed because it is too large Load diff

12
tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/config.ini
View file

@ -166,7 +166,7 @@ localPredictorSize=2048
numThreads=1
[system.cpu0.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=4
@ -513,7 +513,7 @@ opLat=3
pipelined=false
[system.cpu0.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=1
@ -671,7 +671,7 @@ localPredictorSize=2048
numThreads=1
[system.cpu1.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=4
@ -1018,7 +1018,7 @@ opLat=3
pipelined=false
[system.cpu1.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=1
@ -1151,7 +1151,7 @@ master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_
slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma
[system.iocache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:134217727
assoc=8
@ -1186,7 +1186,7 @@ sequential_access=false
size=1024
[system.l2c]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8

3806
tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt
View file

File diff suppressed because it is too large Load diff

8
tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini
View file

@ -166,7 +166,7 @@ localPredictorSize=2048
numThreads=1
[system.cpu.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=4
@ -513,7 +513,7 @@ opLat=3
pipelined=false
[system.cpu.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=1
@ -562,7 +562,7 @@ eventq_index=0
size=48
[system.cpu.l2cache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8
@ -696,7 +696,7 @@ master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_
slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma
[system.iocache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:134217727
assoc=8

2137
tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/stats.txt
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File diff suppressed because it is too large Load diff

8
tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/config.ini
View file

@ -98,7 +98,7 @@ dcache_port=system.cpu0.dcache.cpu_side
icache_port=system.cpu0.icache.cpu_side
[system.cpu0.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=4
@ -138,7 +138,7 @@ eventq_index=0
size=64
[system.cpu0.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=1
@ -750,7 +750,7 @@ master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_
slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma
[system.iocache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:134217727
assoc=8
@ -785,7 +785,7 @@ sequential_access=false
size=1024
[system.l2c]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8

8
tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/simerr
View file

@ -7,8 +7,6 @@ warn: Prefetch instructions in Alpha do not do anything
warn: Prefetch instructions in Alpha do not do anything
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: Bank is already active!
Command: 0, Timestamp: 8155, Bank: 7
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: One or more banks are active! REF requires all banks to be precharged.
@ -19,10 +17,6 @@ WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: Bank is already active!
Command: 0, Timestamp: 11185, Bank: 0
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: One or more banks are active! REF requires all banks to be precharged.
@ -54,6 +48,6 @@ Command: 4, Timestamp: 12458, Bank: 0
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: Bank is already active!
Command: 0, Timestamp: 11369, Bank: 3
Command: 0, Timestamp: 11394, Bank: 3
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0

10
tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/simout
View file

@ -1,10 +1,12 @@
Redirecting stdout to build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-switcheroo-full/simout
Redirecting stderr to build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-switcheroo-full/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Apr 22 2015 07:55:25
gem5 started Apr 22 2015 08:35:45
gem5 executing on phenom
command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-switcheroo-full -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-switcheroo-full
gem5 compiled Sep 14 2015 20:54:01
gem5 started Sep 14 2015 20:54:31
gem5 executing on ribera.cs.wisc.edu
command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-switcheroo-full -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-switcheroo-full
Global frequency set at 1000000000000 ticks per second
0: system.tsunami.io.rtc: Real-time clock set to Thu Jan 1 00:00:00 2009

2885
tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/stats.txt
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File diff suppressed because it is too large Load diff

31
tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor-dual/config.ini
View file

@ -12,11 +12,11 @@ time_sync_spin_threshold=100000000
type=LinuxArmSystem
children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
atags_addr=134217728
boot_loader=/work/gem5/dist/binaries/boot_emm.arm
boot_loader=/scratch/nilay/GEM5/system/binaries/boot_emm.arm
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
cache_line_size=64
clk_domain=system.clk_domain
dtb_filename=/work/gem5/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb
dtb_filename=/scratch/nilay/GEM5/system/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb
early_kernel_symbols=false
enable_context_switch_stats_dump=false
eventq_index=0
@ -28,7 +28,7 @@ have_security=false
have_virtualization=false
highest_el_is_64=false
init_param=0
kernel=/work/gem5/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.aarch32.ll_20131205.0-gem5
kernel_addr_check=true
load_addr_mask=268435455
load_offset=2147483648
@ -42,7 +42,7 @@ num_work_ids=16
panic_on_oops=true
panic_on_panic=true
phys_addr_range_64=40
readfile=/work/gem5/outgoing/gem5/tests/halt.sh
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
reset_addr_64=0
symbolfile=
work_begin_ckpt_count=0
@ -85,7 +85,7 @@ table_size=65536
[system.cf0.image.child]
type=RawDiskImage
eventq_index=0
image_file=/work/gem5/dist/disks/linux-aarch32-ael.img
image_file=/scratch/nilay/GEM5/system/disks/linux-aarch32-ael.img
read_only=true
[system.clk_domain]
@ -179,7 +179,7 @@ localPredictorSize=2048
numThreads=1
[system.cpu0.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -638,7 +638,7 @@ eventq_index=0
opClass=InstPrefetch
[system.cpu0.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -748,7 +748,7 @@ sys=system
port=system.cpu0.toL2Bus.slave[2]
[system.cpu0.l2cache]
type=BaseCache
type=Cache
children=prefetcher tags
addr_ranges=0:18446744073709551615
assoc=16
@ -909,7 +909,7 @@ localPredictorSize=2048
numThreads=1
[system.cpu1.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -1368,7 +1368,7 @@ eventq_index=0
opClass=InstPrefetch
[system.cpu1.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -1478,7 +1478,7 @@ sys=system
port=system.cpu1.toL2Bus.slave[2]
[system.cpu1.l2cache]
type=BaseCache
type=Cache
children=prefetcher tags
addr_ranges=0:18446744073709551615
assoc=16
@ -1591,7 +1591,7 @@ master=system.realview.uart.pio system.realview.realview_io.pio system.realview.
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
[system.iocache]
type=BaseCache
type=Cache
children=tags
addr_ranges=2147483648:2415919103
assoc=8
@ -1626,7 +1626,7 @@ sequential_access=false
size=1024
[system.l2c]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8
@ -2041,9 +2041,12 @@ gic=system.realview.gic
int_num=117
pio_addr=721420288
pio_latency=10000
pixel_clock=7299
pixel_buffer_size=2048
pixel_chunk=32
pxl_clk=system.realview.realview_io.osc_pxl
system=system
vnc=system.vncserver
workaround_dma_line_count=true
workaround_swap_rb=true
dma=system.membus.slave[0]
pio=system.iobus.master[5]

16
tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor-dual/simout
View file

@ -1,16 +1,18 @@
Redirecting stdout to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-minor-dual/simout
Redirecting stderr to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-minor-dual/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Aug 7 2015 10:13:08
gem5 started Aug 7 2015 10:47:25
gem5 executing on e104799-lin
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-minor-dual -re /work/gem5/outgoing/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-minor-dual
gem5 compiled Sep 14 2015 23:29:19
gem5 started Sep 15 2015 01:15:22
gem5 executing on ribera.cs.wisc.edu
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-minor-dual -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-minor-dual
Global frequency set at 1000000000000 ticks per second
info: kernel located at: /work/gem5/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
info: kernel located at: /scratch/nilay/GEM5/system/binaries/vmlinux.aarch32.ll_20131205.0-gem5
info: Using bootloader at address 0x10
info: Using kernel entry physical address at 0x80008000
info: Loading DTB file: /work/gem5/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb at address 0x88000000
info: Loading DTB file: /scratch/nilay/GEM5/system/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb at address 0x88000000
info: Entering event queue @ 0. Starting simulation...
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
@ -27,4 +29,4 @@ info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
Exiting @ tick 2846057099000 because m5_exit instruction encountered
Exiting @ tick 2846117015000 because m5_exit instruction encountered

4690
tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor-dual/stats.txt
View file

File diff suppressed because it is too large Load diff

23
tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor/config.ini
View file

@ -12,11 +12,11 @@ time_sync_spin_threshold=100000000
type=LinuxArmSystem
children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain
atags_addr=134217728
boot_loader=/work/gem5/dist/binaries/boot_emm.arm
boot_loader=/scratch/nilay/GEM5/system/binaries/boot_emm.arm
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
cache_line_size=64
clk_domain=system.clk_domain
dtb_filename=/work/gem5/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb
dtb_filename=/scratch/nilay/GEM5/system/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb
early_kernel_symbols=false
enable_context_switch_stats_dump=false
eventq_index=0
@ -28,7 +28,7 @@ have_security=false
have_virtualization=false
highest_el_is_64=false
init_param=0
kernel=/work/gem5/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.aarch32.ll_20131205.0-gem5
kernel_addr_check=true
load_addr_mask=268435455
load_offset=2147483648
@ -42,7 +42,7 @@ num_work_ids=16
panic_on_oops=true
panic_on_panic=true
phys_addr_range_64=40
readfile=/work/gem5/outgoing/gem5/tests/halt.sh
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
reset_addr_64=0
symbolfile=
work_begin_ckpt_count=0
@ -85,7 +85,7 @@ table_size=65536
[system.cf0.image.child]
type=RawDiskImage
eventq_index=0
image_file=/work/gem5/dist/disks/linux-aarch32-ael.img
image_file=/scratch/nilay/GEM5/system/disks/linux-aarch32-ael.img
read_only=true
[system.clk_domain]
@ -179,7 +179,7 @@ localPredictorSize=2048
numThreads=1
[system.cpu.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=4
@ -638,7 +638,7 @@ eventq_index=0
opClass=InstPrefetch
[system.cpu.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=1
@ -748,7 +748,7 @@ sys=system
port=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8
@ -836,7 +836,7 @@ master=system.realview.uart.pio system.realview.realview_io.pio system.realview.
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
[system.iocache]
type=BaseCache
type=Cache
children=tags
addr_ranges=2147483648:2415919103
assoc=8
@ -1251,9 +1251,12 @@ gic=system.realview.gic
int_num=117
pio_addr=721420288
pio_latency=10000
pixel_clock=7299
pixel_buffer_size=2048
pixel_chunk=32
pxl_clk=system.realview.realview_io.osc_pxl
system=system
vnc=system.vncserver
workaround_dma_line_count=true
workaround_swap_rb=true
dma=system.membus.slave[0]
pio=system.iobus.master[5]

16
tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor/simout
View file

@ -1,16 +1,18 @@
Redirecting stdout to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-minor/simout
Redirecting stderr to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-minor/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Aug 7 2015 10:13:08
gem5 started Aug 7 2015 10:47:25
gem5 executing on e104799-lin
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-minor -re /work/gem5/outgoing/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-minor
gem5 compiled Sep 14 2015 23:29:19
gem5 started Sep 15 2015 01:06:44
gem5 executing on ribera.cs.wisc.edu
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-minor -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-minor
Global frequency set at 1000000000000 ticks per second
info: kernel located at: /work/gem5/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
info: kernel located at: /scratch/nilay/GEM5/system/binaries/vmlinux.aarch32.ll_20131205.0-gem5
info: Using bootloader at address 0x10
info: Using kernel entry physical address at 0x80008000
info: Loading DTB file: /work/gem5/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb at address 0x88000000
info: Loading DTB file: /scratch/nilay/GEM5/system/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb at address 0x88000000
info: Entering event queue @ 0. Starting simulation...
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
@ -27,4 +29,4 @@ info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
Exiting @ tick 2852648357500 because m5_exit instruction encountered
Exiting @ tick 2852654988500 because m5_exit instruction encountered

1781
tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor/stats.txt
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File diff suppressed because it is too large Load diff

23
tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/config.ini
View file

@ -12,11 +12,11 @@ time_sync_spin_threshold=100000000
type=LinuxArmSystem
children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain
atags_addr=134217728
boot_loader=/work/gem5/dist/binaries/boot_emm.arm
boot_loader=/scratch/nilay/GEM5/system/binaries/boot_emm.arm
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
cache_line_size=64
clk_domain=system.clk_domain
dtb_filename=/work/gem5/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb
dtb_filename=/scratch/nilay/GEM5/system/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb
early_kernel_symbols=false
enable_context_switch_stats_dump=false
eventq_index=0
@ -28,7 +28,7 @@ have_security=false
have_virtualization=false
highest_el_is_64=false
init_param=0
kernel=/work/gem5/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.aarch32.ll_20131205.0-gem5
kernel_addr_check=true
load_addr_mask=268435455
load_offset=2147483648
@ -42,7 +42,7 @@ num_work_ids=16
panic_on_oops=true
panic_on_panic=true
phys_addr_range_64=40
readfile=/work/gem5/outgoing/gem5/tests/halt.sh
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
reset_addr_64=0
symbolfile=
work_begin_ckpt_count=0
@ -85,7 +85,7 @@ table_size=65536
[system.cf0.image.child]
type=RawDiskImage
eventq_index=0
image_file=/work/gem5/dist/disks/linux-aarch32-ael.img
image_file=/scratch/nilay/GEM5/system/disks/linux-aarch32-ael.img
read_only=true
[system.clk_domain]
@ -352,7 +352,7 @@ type=ExeTracer
eventq_index=0
[system.cpu.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=4
@ -693,7 +693,7 @@ opLat=4
pipelined=true
[system.cpu.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=1
@ -803,7 +803,7 @@ sys=system
port=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8
@ -891,7 +891,7 @@ master=system.realview.uart.pio system.realview.realview_io.pio system.realview.
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
[system.iocache]
type=BaseCache
type=Cache
children=tags
addr_ranges=2147483648:2415919103
assoc=8
@ -1306,9 +1306,12 @@ gic=system.realview.gic
int_num=117
pio_addr=721420288
pio_latency=10000
pixel_clock=7299
pixel_buffer_size=2048
pixel_chunk=32
pxl_clk=system.realview.realview_io.osc_pxl
system=system
vnc=system.vncserver
workaround_dma_line_count=true
workaround_swap_rb=true
dma=system.membus.slave[0]
pio=system.iobus.master[5]

31
tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/config.ini
View file

@ -12,11 +12,11 @@ time_sync_spin_threshold=100000000
type=LinuxArmSystem
children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
atags_addr=134217728
boot_loader=/work/gem5/dist/binaries/boot_emm.arm
boot_loader=/scratch/nilay/GEM5/system/binaries/boot_emm.arm
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
cache_line_size=64
clk_domain=system.clk_domain
dtb_filename=/work/gem5/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb
dtb_filename=/scratch/nilay/GEM5/system/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb
early_kernel_symbols=false
enable_context_switch_stats_dump=false
eventq_index=0
@ -28,7 +28,7 @@ have_security=false
have_virtualization=false
highest_el_is_64=false
init_param=0
kernel=/work/gem5/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.aarch32.ll_20131205.0-gem5
kernel_addr_check=true
load_addr_mask=268435455
load_offset=2147483648
@ -42,7 +42,7 @@ num_work_ids=16
panic_on_oops=true
panic_on_panic=true
phys_addr_range_64=40
readfile=/work/gem5/outgoing/gem5/tests/halt.sh
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
reset_addr_64=0
symbolfile=
work_begin_ckpt_count=0
@ -85,7 +85,7 @@ table_size=65536
[system.cf0.image.child]
type=RawDiskImage
eventq_index=0
image_file=/work/gem5/dist/disks/linux-aarch32-ael.img
image_file=/scratch/nilay/GEM5/system/disks/linux-aarch32-ael.img
read_only=true
[system.clk_domain]
@ -201,7 +201,7 @@ instShiftAmt=2
numThreads=1
[system.cpu0.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -542,7 +542,7 @@ opLat=4
pipelined=true
[system.cpu0.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -652,7 +652,7 @@ sys=system
port=system.cpu0.toL2Bus.slave[2]
[system.cpu0.l2cache]
type=BaseCache
type=Cache
children=prefetcher tags
addr_ranges=0:18446744073709551615
assoc=16
@ -835,7 +835,7 @@ instShiftAmt=2
numThreads=1
[system.cpu1.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -1176,7 +1176,7 @@ opLat=4
pipelined=true
[system.cpu1.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -1286,7 +1286,7 @@ sys=system
port=system.cpu1.toL2Bus.slave[2]
[system.cpu1.l2cache]
type=BaseCache
type=Cache
children=prefetcher tags
addr_ranges=0:18446744073709551615
assoc=16
@ -1399,7 +1399,7 @@ master=system.realview.uart.pio system.realview.realview_io.pio system.realview.
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
[system.iocache]
type=BaseCache
type=Cache
children=tags
addr_ranges=2147483648:2415919103
assoc=8
@ -1434,7 +1434,7 @@ sequential_access=false
size=1024
[system.l2c]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8
@ -1849,9 +1849,12 @@ gic=system.realview.gic
int_num=117
pio_addr=721420288
pio_latency=10000
pixel_clock=7299
pixel_buffer_size=2048
pixel_chunk=32
pxl_clk=system.realview.realview_io.osc_pxl
system=system
vnc=system.vncserver
workaround_dma_line_count=true
workaround_swap_rb=true
dma=system.membus.slave[0]
pio=system.iobus.master[5]

14
tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/simout
View file

@ -1,16 +1,18 @@
Redirecting stdout to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3-dual/simout
Redirecting stderr to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3-dual/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Aug 7 2015 10:13:08
gem5 started Aug 7 2015 10:47:25
gem5 executing on e104799-lin
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3-dual -re /work/gem5/outgoing/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3-dual
gem5 compiled Sep 14 2015 23:29:19
gem5 started Sep 14 2015 23:52:21
gem5 executing on ribera.cs.wisc.edu
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3-dual -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3-dual
Global frequency set at 1000000000000 ticks per second
info: kernel located at: /work/gem5/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
info: kernel located at: /scratch/nilay/GEM5/system/binaries/vmlinux.aarch32.ll_20131205.0-gem5
info: Using bootloader at address 0x10
info: Using kernel entry physical address at 0x80008000
info: Loading DTB file: /work/gem5/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb at address 0x88000000
info: Loading DTB file: /scratch/nilay/GEM5/system/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb at address 0x88000000
info: Entering event queue @ 0. Starting simulation...
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0

16
tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/stats.txt
View file

@ -4,11 +4,11 @@ sim_seconds 2.825406 # Nu
sim_ticks 2825405893500 # Number of ticks simulated
final_tick 2825405893500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 99518 # Simulator instruction rate (inst/s)
host_op_rate 120734 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 2339943688 # Simulator tick rate (ticks/s)
host_mem_usage 607076 # Number of bytes of host memory used
host_seconds 1207.47 # Real time elapsed on the host
host_inst_rate 67919 # Simulator instruction rate (inst/s)
host_op_rate 82398 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 1596954995 # Simulator tick rate (ticks/s)
host_mem_usage 650656 # Number of bytes of host memory used
host_seconds 1769.25 # Real time elapsed on the host
sim_insts 120165205 # Number of instructions simulated
sim_ops 145782922 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
@ -768,9 +768,9 @@ system.cpu0.iew.iewDispNonSpecInsts 876681 # Nu
system.cpu0.iew.iewIQFullEvents 26796 # Number of times the IQ has become full, causing a stall
system.cpu0.iew.iewLSQFullEvents 125236 # Number of times the LSQ has become full, causing a stall
system.cpu0.iew.memOrderViolationEvents 19035 # Number of memory order violations
system.cpu0.iew.predictedTakenIncorrect 291770 # Number of branches that were predicted taken incorrectly
system.cpu0.iew.predictedTakenIncorrect 291768 # Number of branches that were predicted taken incorrectly
system.cpu0.iew.predictedNotTakenIncorrect 399939 # Number of branches that were predicted not taken incorrectly
system.cpu0.iew.branchMispredicts 691709 # Number of branch mispredicts detected at execute
system.cpu0.iew.branchMispredicts 691707 # Number of branch mispredicts detected at execute
system.cpu0.iew.iewExecutedInsts 99697701 # Number of executed instructions
system.cpu0.iew.iewExecLoadInsts 18022679 # Number of load instructions executed
system.cpu0.iew.iewExecSquashedInsts 1031168 # Number of squashed instructions skipped in execute
@ -3629,13 +3629,13 @@ system.realview.ethernet.totalRxOrn 0 # to
system.realview.ethernet.coalescedTotal nan # average number of interrupts coalesced into each post
system.realview.ethernet.postedInterrupts 0 # number of posts to CPU
system.realview.ethernet.droppedPackets 0 # number of packets dropped
system.realview.realview_io.osc_pxl.clock 42105 # Clock period in ticks
system.realview.realview_io.osc_clcd.clock 42105 # Clock period in ticks
system.realview.realview_io.osc_cpu.clock 16667 # Clock period in ticks
system.realview.realview_io.osc_ddr.clock 25000 # Clock period in ticks
system.realview.realview_io.osc_hsbm.clock 25000 # Clock period in ticks
system.realview.realview_io.osc_mcc.clock 20000 # Clock period in ticks
system.realview.realview_io.osc_peripheral.clock 41667 # Clock period in ticks
system.realview.realview_io.osc_pxl.clock 42105 # Clock period in ticks
system.realview.realview_io.osc_smb.clock 20000 # Clock period in ticks
system.realview.realview_io.osc_sys.clock 16667 # Clock period in ticks
system.realview.realview_io.osc_system_bus.clock 41667 # Clock period in ticks

23
tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/config.ini
View file

@ -12,11 +12,11 @@ time_sync_spin_threshold=100000000
type=LinuxArmSystem
children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain
atags_addr=134217728
boot_loader=/work/gem5/dist/binaries/boot_emm.arm
boot_loader=/scratch/nilay/GEM5/system/binaries/boot_emm.arm
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
cache_line_size=64
clk_domain=system.clk_domain
dtb_filename=/work/gem5/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb
dtb_filename=/scratch/nilay/GEM5/system/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb
early_kernel_symbols=false
enable_context_switch_stats_dump=false
eventq_index=0
@ -28,7 +28,7 @@ have_security=false
have_virtualization=false
highest_el_is_64=false
init_param=0
kernel=/work/gem5/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.aarch32.ll_20131205.0-gem5
kernel_addr_check=true
load_addr_mask=268435455
load_offset=2147483648
@ -42,7 +42,7 @@ num_work_ids=16
panic_on_oops=true
panic_on_panic=true
phys_addr_range_64=40
readfile=/work/gem5/outgoing/gem5/tests/halt.sh
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
reset_addr_64=0
symbolfile=
work_begin_ckpt_count=0
@ -85,7 +85,7 @@ table_size=65536
[system.cf0.image.child]
type=RawDiskImage
eventq_index=0
image_file=/work/gem5/dist/disks/linux-aarch32-ael.img
image_file=/scratch/nilay/GEM5/system/disks/linux-aarch32-ael.img
read_only=true
[system.clk_domain]
@ -201,7 +201,7 @@ instShiftAmt=2
numThreads=1
[system.cpu.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=4
@ -542,7 +542,7 @@ opLat=4
pipelined=true
[system.cpu.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=1
@ -652,7 +652,7 @@ sys=system
port=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8
@ -740,7 +740,7 @@ master=system.realview.uart.pio system.realview.realview_io.pio system.realview.
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
[system.iocache]
type=BaseCache
type=Cache
children=tags
addr_ranges=2147483648:2415919103
assoc=8
@ -1155,9 +1155,12 @@ gic=system.realview.gic
int_num=117
pio_addr=721420288
pio_latency=10000
pixel_clock=7299
pixel_buffer_size=2048
pixel_chunk=32
pxl_clk=system.realview.realview_io.osc_pxl
system=system
vnc=system.vncserver
workaround_dma_line_count=true
workaround_swap_rb=true
dma=system.membus.slave[0]
pio=system.iobus.master[5]

14
tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/simout
View file

@ -1,16 +1,18 @@
Redirecting stdout to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3/simout
Redirecting stderr to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Aug 7 2015 10:13:08
gem5 started Aug 7 2015 10:47:25
gem5 executing on e104799-lin
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3 -re /work/gem5/outgoing/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3
gem5 compiled Sep 14 2015 23:29:19
gem5 started Sep 15 2015 01:43:21
gem5 executing on ribera.cs.wisc.edu
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3 -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3
Global frequency set at 1000000000000 ticks per second
info: kernel located at: /work/gem5/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
info: kernel located at: /scratch/nilay/GEM5/system/binaries/vmlinux.aarch32.ll_20131205.0-gem5
info: Using bootloader at address 0x10
info: Using kernel entry physical address at 0x80008000
info: Loading DTB file: /work/gem5/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb at address 0x88000000
info: Loading DTB file: /scratch/nilay/GEM5/system/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb at address 0x88000000
info: Entering event queue @ 0. Starting simulation...
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0

23
tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/config.ini
View file

@ -12,11 +12,11 @@ time_sync_spin_threshold=100000000
type=LinuxArmSystem
children=bridge cf0 clk_domain cpu0 cpu1 cpu2 cpu3 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
atags_addr=134217728
boot_loader=/work/gem5/dist/binaries/boot_emm.arm
boot_loader=/scratch/nilay/GEM5/system/binaries/boot_emm.arm
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
cache_line_size=64
clk_domain=system.clk_domain
dtb_filename=/work/gem5/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb
dtb_filename=/scratch/nilay/GEM5/system/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb
early_kernel_symbols=false
enable_context_switch_stats_dump=false
eventq_index=0
@ -28,7 +28,7 @@ have_security=false
have_virtualization=false
highest_el_is_64=false
init_param=0
kernel=/work/gem5/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.aarch32.ll_20131205.0-gem5
kernel_addr_check=true
load_addr_mask=268435455
load_offset=2147483648
@ -42,7 +42,7 @@ num_work_ids=16
panic_on_oops=true
panic_on_panic=true
phys_addr_range_64=40
readfile=/work/gem5/outgoing/gem5/tests/halt.sh
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
reset_addr_64=0
symbolfile=
work_begin_ckpt_count=0
@ -85,7 +85,7 @@ table_size=65536
[system.cf0.image.child]
type=RawDiskImage
eventq_index=0
image_file=/work/gem5/dist/disks/linux-aarch32-ael.img
image_file=/scratch/nilay/GEM5/system/disks/linux-aarch32-ael.img
read_only=true
[system.clk_domain]
@ -136,7 +136,7 @@ dcache_port=system.cpu0.dcache.cpu_side
icache_port=system.cpu0.icache.cpu_side
[system.cpu0.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=4
@ -212,7 +212,7 @@ sys=system
port=system.toL2Bus.slave[3]
[system.cpu0.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=1
@ -1610,7 +1610,7 @@ master=system.realview.uart.pio system.realview.realview_io.pio system.realview.
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
[system.iocache]
type=BaseCache
type=Cache
children=tags
addr_ranges=2147483648:2415919103
assoc=8
@ -1645,7 +1645,7 @@ sequential_access=false
size=1024
[system.l2c]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8
@ -2060,9 +2060,12 @@ gic=system.realview.gic
int_num=117
pio_addr=721420288
pio_latency=10000
pixel_clock=7299
pixel_buffer_size=2048
pixel_chunk=32
pxl_clk=system.realview.realview_io.osc_pxl
system=system
vnc=system.vncserver
workaround_dma_line_count=true
workaround_swap_rb=true
dma=system.membus.slave[0]
pio=system.iobus.master[5]

37
tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/simerr
View file

@ -40,21 +40,19 @@ warn: CP14 unimplemented crn[0], opc1[0], crm[7], opc2[0]
warn: CP14 unimplemented crn[1], opc1[0], crm[5], opc2[4]
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: Bank is already active!
Command: 0, Timestamp: 9104, Bank: 0
WARNING: Bank is already active!
Command: 0, Timestamp: 11912, Bank: 1
warn: CP14 unimplemented crn[5], opc1[4], crm[0], opc2[0]
WARNING: Bank is already active!
Command: 0, Timestamp: 9339, Bank: 5
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: Bank is not active!
Command: 1, Timestamp: 3178, Bank: 4
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: Bank is already active!
Command: 0, Timestamp: 7386, Bank: 2
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
Command: 0, Timestamp: 8168, Bank: 2
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
warn: Returning zero for read from miscreg pmcr
@ -66,6 +64,16 @@ WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
warn: CP14 unimplemented crn[0], opc1[4], crm[0], opc2[2]
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
warn: CP14 unimplemented crn[0], opc1[4], crm[12], opc2[2]
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: One or more banks are active! REF requires all banks to be precharged.
@ -76,12 +84,13 @@ WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
warn: CP14 unimplemented crn[2], opc1[2], crm[0], opc2[2]
warn: instruction 'mcr bpiall' unimplemented
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
warn: User mode does not have SPSR
warn: User mode does not have SPSR
warn: User mode does not have SPSR
@ -94,14 +103,6 @@ WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
warn: User mode does not have SPSR
warn: User mode does not have SPSR
warn: User mode does not have SPSR
warn: User mode does not have SPSR
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: One or more banks are active! REF requires all banks to be precharged.

10
tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/simout
View file

@ -1,9 +1,11 @@
Redirecting stdout to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-switcheroo-full/simout
Redirecting stderr to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-switcheroo-full/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Aug 7 2015 10:13:08
gem5 started Aug 7 2015 10:47:25
gem5 executing on e104799-lin
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-switcheroo-full -re /work/gem5/outgoing/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-switcheroo-full
gem5 compiled Sep 14 2015 23:29:19
gem5 started Sep 15 2015 01:34:12
gem5 executing on ribera.cs.wisc.edu
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-switcheroo-full -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-switcheroo-full
Global frequency set at 1000000000000 ticks per second

4364
tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/stats.txt
View file

File diff suppressed because it is too large Load diff

23
tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/config.ini
View file

@ -12,11 +12,11 @@ time_sync_spin_threshold=100000000
type=LinuxArmSystem
children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
atags_addr=134217728
boot_loader=/work/gem5/dist/binaries/boot_emm.arm
boot_loader=/scratch/nilay/GEM5/system/binaries/boot_emm.arm
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
cache_line_size=64
clk_domain=system.clk_domain
dtb_filename=/work/gem5/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb
dtb_filename=/scratch/nilay/GEM5/system/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb
early_kernel_symbols=false
enable_context_switch_stats_dump=false
eventq_index=0
@ -28,7 +28,7 @@ have_security=false
have_virtualization=false
highest_el_is_64=false
init_param=0
kernel=/work/gem5/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.aarch32.ll_20131205.0-gem5
kernel_addr_check=true
load_addr_mask=268435455
load_offset=2147483648
@ -42,7 +42,7 @@ num_work_ids=16
panic_on_oops=true
panic_on_panic=true
phys_addr_range_64=40
readfile=/work/gem5/outgoing/gem5/tests/halt.sh
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
reset_addr_64=0
symbolfile=
work_begin_ckpt_count=0
@ -85,7 +85,7 @@ table_size=65536
[system.cf0.image.child]
type=RawDiskImage
eventq_index=0
image_file=/work/gem5/dist/disks/linux-aarch32-ael.img
image_file=/scratch/nilay/GEM5/system/disks/linux-aarch32-ael.img
read_only=true
[system.clk_domain]
@ -204,7 +204,7 @@ localPredictorSize=2048
numThreads=1
[system.cpu0.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=4
@ -587,7 +587,7 @@ opLat=3
pipelined=false
[system.cpu0.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=1
@ -1261,7 +1261,7 @@ master=system.realview.uart.pio system.realview.realview_io.pio system.realview.
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
[system.iocache]
type=BaseCache
type=Cache
children=tags
addr_ranges=2147483648:2415919103
assoc=8
@ -1296,7 +1296,7 @@ sequential_access=false
size=1024
[system.l2c]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8
@ -1711,9 +1711,12 @@ gic=system.realview.gic
int_num=117
pio_addr=721420288
pio_latency=10000
pixel_clock=7299
pixel_buffer_size=2048
pixel_chunk=32
pxl_clk=system.realview.realview_io.osc_pxl
system=system
vnc=system.vncserver
workaround_dma_line_count=true
workaround_swap_rb=true
dma=system.membus.slave[0]
pio=system.iobus.master[5]

13
tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/simerr
View file

@ -26,7 +26,6 @@ warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
warn: CP14 unimplemented crn[5], opc1[4], crm[4], opc2[5]
warn: CP14 unimplemented crn[1], opc1[0], crm[1], opc2[4]
warn: CP14 unimplemented crn[1], opc1[0], crm[3], opc2[4]
warn: CP14 unimplemented crn[1], opc1[0], crm[0], opc2[4]
@ -34,18 +33,18 @@ warn: CP14 unimplemented crn[0], opc1[0], crm[7], opc2[0]
warn: CP14 unimplemented crn[1], opc1[0], crm[5], opc2[4]
warn: CP14 unimplemented crn[5], opc1[4], crm[0], opc2[0]
warn: CP14 unimplemented crn[0], opc1[4], crm[8], opc2[1]
warn: CP14 unimplemented crn[0], opc1[4], crm[0], opc2[0]
warn: CP14 unimplemented crn[6], opc1[5], crm[0], opc2[3]
warn: CP14 unimplemented crn[6], opc1[5], crm[4], opc2[3]
warn: CP14 unimplemented crn[5], opc1[4], crm[12], opc2[1]
warn: CP14 unimplemented crn[4], opc1[0], crm[12], opc2[1]
warn: Returning zero for read from miscreg pmcr
warn: Ignoring write to miscreg pmcntenclr
warn: Ignoring write to miscreg pmintenclr
warn: Ignoring write to miscreg pmovsr
warn: Ignoring write to miscreg pmcr
warn: CP14 unimplemented crn[0], opc1[4], crm[12], opc2[2]
warn: CP14 unimplemented crn[3], opc1[5], crm[12], opc2[1]
warn: CP14 unimplemented crn[3], opc1[4], crm[0], opc2[3]
warn: CP14 unimplemented crn[3], opc1[4], crm[4], opc2[3]
warn: CP14 unimplemented crn[5], opc1[4], crm[0], opc2[2]
warn: CP14 unimplemented crn[15], opc1[0], crm[8], opc2[0]
warn: instruction 'mcr bpiall' unimplemented
warn: User mode does not have SPSR
warn: User mode does not have SPSR
@ -59,7 +58,3 @@ warn: User mode does not have SPSR
warn: User mode does not have SPSR
warn: User mode does not have SPSR
warn: User mode does not have SPSR
warn: User mode does not have SPSR
warn: User mode does not have SPSR
warn: User mode does not have SPSR
warn: User mode does not have SPSR

3914
tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/stats.txt
View file

File diff suppressed because it is too large Load diff

31
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor-dual/config.ini
View file

@ -12,11 +12,11 @@ time_sync_spin_threshold=100000000
type=LinuxArmSystem
children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
atags_addr=134217728
boot_loader=/work/gem5/dist/binaries/boot_emm.arm64
boot_loader=/scratch/nilay/GEM5/system/binaries/boot_emm.arm64
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
cache_line_size=64
clk_domain=system.clk_domain
dtb_filename=/work/gem5/dist/binaries/vexpress.aarch64.20140821.dtb
dtb_filename=/scratch/nilay/GEM5/system/binaries/vexpress.aarch64.20140821.dtb
early_kernel_symbols=false
enable_context_switch_stats_dump=false
eventq_index=0
@ -28,7 +28,7 @@ have_security=false
have_virtualization=false
highest_el_is_64=false
init_param=0
kernel=/work/gem5/dist/binaries/vmlinux.aarch64.20140821
kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.aarch64.20140821
kernel_addr_check=true
load_addr_mask=268435455
load_offset=2147483648
@ -42,7 +42,7 @@ num_work_ids=16
panic_on_oops=true
panic_on_panic=true
phys_addr_range_64=40
readfile=/work/gem5/outgoing/gem5/tests/halt.sh
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
reset_addr_64=0
symbolfile=
work_begin_ckpt_count=0
@ -85,7 +85,7 @@ table_size=65536
[system.cf0.image.child]
type=RawDiskImage
eventq_index=0
image_file=/work/gem5/dist/disks/linaro-minimal-aarch64.img
image_file=/scratch/nilay/GEM5/system/disks/linaro-minimal-aarch64.img
read_only=true
[system.clk_domain]
@ -179,7 +179,7 @@ localPredictorSize=2048
numThreads=1
[system.cpu0.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -638,7 +638,7 @@ eventq_index=0
opClass=InstPrefetch
[system.cpu0.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -748,7 +748,7 @@ sys=system
port=system.cpu0.toL2Bus.slave[2]
[system.cpu0.l2cache]
type=BaseCache
type=Cache
children=prefetcher tags
addr_ranges=0:18446744073709551615
assoc=16
@ -909,7 +909,7 @@ localPredictorSize=2048
numThreads=1
[system.cpu1.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -1368,7 +1368,7 @@ eventq_index=0
opClass=InstPrefetch
[system.cpu1.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -1478,7 +1478,7 @@ sys=system
port=system.cpu1.toL2Bus.slave[2]
[system.cpu1.l2cache]
type=BaseCache
type=Cache
children=prefetcher tags
addr_ranges=0:18446744073709551615
assoc=16
@ -1591,7 +1591,7 @@ master=system.realview.uart.pio system.realview.realview_io.pio system.realview.
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
[system.iocache]
type=BaseCache
type=Cache
children=tags
addr_ranges=2147483648:2415919103
assoc=8
@ -1626,7 +1626,7 @@ sequential_access=false
size=1024
[system.l2c]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8
@ -2041,9 +2041,12 @@ gic=system.realview.gic
int_num=117
pio_addr=721420288
pio_latency=10000
pixel_clock=7299
pixel_buffer_size=2048
pixel_chunk=32
pxl_clk=system.realview.realview_io.osc_pxl
system=system
vnc=system.vncserver
workaround_dma_line_count=true
workaround_swap_rb=true
dma=system.membus.slave[0]
pio=system.iobus.master[5]

16
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor-dual/simout
View file

@ -1,16 +1,18 @@
Redirecting stdout to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-minor-dual/simout
Redirecting stderr to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-minor-dual/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Aug 7 2015 10:13:08
gem5 started Aug 7 2015 10:55:42
gem5 executing on e104799-lin
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-minor-dual -re /work/gem5/outgoing/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-minor-dual
gem5 compiled Sep 14 2015 23:29:19
gem5 started Sep 14 2015 23:38:12
gem5 executing on ribera.cs.wisc.edu
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-minor-dual -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-minor-dual
Selected 64-bit ARM architecture, updating default disk image...
Global frequency set at 1000000000000 ticks per second
info: kernel located at: /work/gem5/dist/binaries/vmlinux.aarch64.20140821
info: kernel located at: /scratch/nilay/GEM5/system/binaries/vmlinux.aarch64.20140821
info: Using bootloader at address 0x10
info: Using kernel entry physical address at 0x80080000
info: Loading DTB file: /work/gem5/dist/binaries/vexpress.aarch64.20140821.dtb at address 0x88000000
info: Loading DTB file: /scratch/nilay/GEM5/system/binaries/vexpress.aarch64.20140821.dtb at address 0x88000000
info: Entering event queue @ 0. Starting simulation...
Exiting @ tick 47411962285000 because m5_exit instruction encountered
Exiting @ tick 47482239150000 because m5_exit instruction encountered

5144
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor-dual/stats.txt
View file

File diff suppressed because it is too large Load diff

23
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor/config.ini
View file

@ -12,11 +12,11 @@ time_sync_spin_threshold=100000000
type=LinuxArmSystem
children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain
atags_addr=134217728
boot_loader=/work/gem5/dist/binaries/boot_emm.arm64
boot_loader=/scratch/nilay/GEM5/system/binaries/boot_emm.arm64
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
cache_line_size=64
clk_domain=system.clk_domain
dtb_filename=/work/gem5/dist/binaries/vexpress.aarch64.20140821.dtb
dtb_filename=/scratch/nilay/GEM5/system/binaries/vexpress.aarch64.20140821.dtb
early_kernel_symbols=false
enable_context_switch_stats_dump=false
eventq_index=0
@ -28,7 +28,7 @@ have_security=false
have_virtualization=false
highest_el_is_64=false
init_param=0
kernel=/work/gem5/dist/binaries/vmlinux.aarch64.20140821
kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.aarch64.20140821
kernel_addr_check=true
load_addr_mask=268435455
load_offset=2147483648
@ -42,7 +42,7 @@ num_work_ids=16
panic_on_oops=true
panic_on_panic=true
phys_addr_range_64=40
readfile=/work/gem5/outgoing/gem5/tests/halt.sh
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
reset_addr_64=0
symbolfile=
work_begin_ckpt_count=0
@ -85,7 +85,7 @@ table_size=65536
[system.cf0.image.child]
type=RawDiskImage
eventq_index=0
image_file=/work/gem5/dist/disks/linaro-minimal-aarch64.img
image_file=/scratch/nilay/GEM5/system/disks/linaro-minimal-aarch64.img
read_only=true
[system.clk_domain]
@ -179,7 +179,7 @@ localPredictorSize=2048
numThreads=1
[system.cpu.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=4
@ -638,7 +638,7 @@ eventq_index=0
opClass=InstPrefetch
[system.cpu.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=1
@ -748,7 +748,7 @@ sys=system
port=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8
@ -836,7 +836,7 @@ master=system.realview.uart.pio system.realview.realview_io.pio system.realview.
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
[system.iocache]
type=BaseCache
type=Cache
children=tags
addr_ranges=2147483648:2415919103
assoc=8
@ -1251,9 +1251,12 @@ gic=system.realview.gic
int_num=117
pio_addr=721420288
pio_latency=10000
pixel_clock=7299
pixel_buffer_size=2048
pixel_chunk=32
pxl_clk=system.realview.realview_io.osc_pxl
system=system
vnc=system.vncserver
workaround_dma_line_count=true
workaround_swap_rb=true
dma=system.membus.slave[0]
pio=system.iobus.master[5]

16
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor/simout
View file

@ -1,16 +1,18 @@
Redirecting stdout to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-minor/simout
Redirecting stderr to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-minor/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Aug 7 2015 10:13:08
gem5 started Aug 7 2015 10:47:25
gem5 executing on e104799-lin
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-minor -re /work/gem5/outgoing/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-minor
gem5 compiled Sep 14 2015 23:29:19
gem5 started Sep 14 2015 23:30:17
gem5 executing on ribera.cs.wisc.edu
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-minor -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-minor
Selected 64-bit ARM architecture, updating default disk image...
Global frequency set at 1000000000000 ticks per second
info: kernel located at: /work/gem5/dist/binaries/vmlinux.aarch64.20140821
info: kernel located at: /scratch/nilay/GEM5/system/binaries/vmlinux.aarch64.20140821
info: Using bootloader at address 0x10
info: Using kernel entry physical address at 0x80080000
info: Loading DTB file: /work/gem5/dist/binaries/vexpress.aarch64.20140821.dtb at address 0x88000000
info: Loading DTB file: /scratch/nilay/GEM5/system/binaries/vexpress.aarch64.20140821.dtb at address 0x88000000
info: Entering event queue @ 0. Starting simulation...
Exiting @ tick 51694136923000 because m5_exit instruction encountered
Exiting @ tick 51694125219000 because m5_exit instruction encountered

2046
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor/stats.txt
View file

File diff suppressed because it is too large Load diff

23
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-checker/config.ini
View file

@ -12,11 +12,11 @@ time_sync_spin_threshold=100000000
type=LinuxArmSystem
children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain
atags_addr=134217728
boot_loader=/work/gem5/dist/binaries/boot_emm.arm64
boot_loader=/scratch/nilay/GEM5/system/binaries/boot_emm.arm64
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
cache_line_size=64
clk_domain=system.clk_domain
dtb_filename=/work/gem5/dist/binaries/vexpress.aarch64.20140821.dtb
dtb_filename=/scratch/nilay/GEM5/system/binaries/vexpress.aarch64.20140821.dtb
early_kernel_symbols=false
enable_context_switch_stats_dump=false
eventq_index=0
@ -28,7 +28,7 @@ have_security=false
have_virtualization=false
highest_el_is_64=false
init_param=0
kernel=/work/gem5/dist/binaries/vmlinux.aarch64.20140821
kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.aarch64.20140821
kernel_addr_check=true
load_addr_mask=268435455
load_offset=2147483648
@ -42,7 +42,7 @@ num_work_ids=16
panic_on_oops=true
panic_on_panic=true
phys_addr_range_64=40
readfile=/work/gem5/outgoing/gem5/tests/halt.sh
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
reset_addr_64=0
symbolfile=
work_begin_ckpt_count=0
@ -85,7 +85,7 @@ table_size=65536
[system.cf0.image.child]
type=RawDiskImage
eventq_index=0
image_file=/work/gem5/dist/disks/linaro-minimal-aarch64.img
image_file=/scratch/nilay/GEM5/system/disks/linaro-minimal-aarch64.img
read_only=true
[system.clk_domain]
@ -352,7 +352,7 @@ type=ExeTracer
eventq_index=0
[system.cpu.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=4
@ -693,7 +693,7 @@ opLat=4
pipelined=true
[system.cpu.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=1
@ -803,7 +803,7 @@ sys=system
port=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8
@ -891,7 +891,7 @@ master=system.realview.uart.pio system.realview.realview_io.pio system.realview.
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
[system.iocache]
type=BaseCache
type=Cache
children=tags
addr_ranges=2147483648:2415919103
assoc=8
@ -1306,9 +1306,12 @@ gic=system.realview.gic
int_num=117
pio_addr=721420288
pio_latency=10000
pixel_clock=7299
pixel_buffer_size=2048
pixel_chunk=32
pxl_clk=system.realview.realview_io.osc_pxl
system=system
vnc=system.vncserver
workaround_dma_line_count=true
workaround_swap_rb=true
dma=system.membus.slave[0]
pio=system.iobus.master[5]

167
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-checker/simerr
View file

@ -11,84 +11,89 @@ warn: 12461855003000: Instruction results do not match! (Values may not actually
warn: 12461858210000: Instruction results do not match! (Values may not actually be integers) Inst: 0xffffffc00d07d7c0, checker: 0
warn: Tried to read RealView I/O at offset 0x8 that doesn't exist
warn: Tried to read RealView I/O at offset 0x48 that doesn't exist
warn: 13850221736500: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0
warn: 13887901759500: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0
warn: 13889201357500: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0
warn: 13891026528000: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0
warn: 13912972124000: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0
warn: 13922135264000: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0
warn: 13972304377500: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0
warn: 14214756028000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14214756243500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14222804811500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14230560980500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14230561210500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14230561417000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14238296234000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14238296464000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14238296670500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14243468378000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14243468608000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14249670454500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14249670684500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14259219992000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14259220222000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14259220428500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14270200247500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14270200481500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14270200711500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14270200918000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14279912002500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14279912512000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14279912746000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14279912976000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14279913182500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14295232623000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14295232862500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14300292322000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14300292552000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14307240927500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14307241161500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14307241391500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14307241598000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14317300126000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14317300896500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14317301130500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14317301360500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14317301567000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14379824982500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14379825231000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14379825446500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14437325800500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14437326869000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14437327084500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14565495184000: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3
warn: 14565581739000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14565581956000: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3
warn: 14565582249000: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf1
warn: 14565582808000: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3
warn: 14565583286500: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3
warn: 14565583575500: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3
warn: 14565584084500: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3
warn: 14565585151500: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3
warn: 14565585961500: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3
warn: 14566302033500: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3
warn: 14566302294500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x42
warn: 14566302499000: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3
warn: 14566373295000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x91
warn: 14566373505000: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3
warn: 14566373776000: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf1
warn: 14566374346500: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3
warn: 14566374602000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x91
warn: 14566374825500: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3
warn: 14566375114500: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3
warn: 14566375623500: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3
warn: 14566376687000: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3
warn: 14566377185000: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3
warn: 14566377487000: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3
warn: 14614511931000: Instruction results do not match! (Values may not actually be integers) Inst: 0, checker: 0x1
warn: 14614512222000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14614512481000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14614512725500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14614512987500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14614513217000: Instruction results do not match! (Values may not actually be integers) Inst: 0, checker: 0x1
warn: 13846883856500: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0
warn: 13889111424500: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0
warn: 13890567287500: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0
warn: 13890857543500: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0
warn: 14120809755000: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0
warn: 14122306502500: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0
warn: 14122718805500: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0
warn: 14129885647500: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0
warn: 14130112878000: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0
warn: 14130333669000: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0
warn: 14130937323000: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0
warn: 14131157192000: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0
warn: 14131378652000: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0
warn: 14143275616000: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0
warn: 14210692350500: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0
warn: 14453290384000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14453290599500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14461368009500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14469164155500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14469164395000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14469164601500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14477036010500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14477036254000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14477036493500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14477036700000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14482248599500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14482248839000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14488506207500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14488506438000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14498157332500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14498158077500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14498158308000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14498158514500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14509187190500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14509187421000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14509187627500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14518942903500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14518943414000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14518943648500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14518943879000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14518944085500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14534430251500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14534430481500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14539499143500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14539499377500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14539499607500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14546501559500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14546502303000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14546502533000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14546502739500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14556606981000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14556607490500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14556607724500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14556607954500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14556608161000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14619728573500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14619728789000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14678031922000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14678032489500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14678032742000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14678032990500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93
warn: 14678033206000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14803922617500: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3
warn: 14804021218000: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3
warn: 14804021536500: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3
warn: 14804745192000: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3
warn: 14804745453000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x42
warn: 14804745657500: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3
warn: 14804816537000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x91
warn: 14804816747000: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3
warn: 14804817018000: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf1
warn: 14804817588500: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3
warn: 14804817844000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x91
warn: 14804818067500: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3
warn: 14804818356500: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3
warn: 14804818865500: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3
warn: 14804819928000: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3
warn: 14804820419500: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3
warn: 14804820721500: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3
warn: 14853183049500: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0
warn: 14853362963500: Instruction results do not match! (Values may not actually be integers) Inst: 0, checker: 0x1
warn: 14853363240000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14853363492000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14853363736500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14853363998500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41
warn: 14853364228000: Instruction results do not match! (Values may not actually be integers) Inst: 0, checker: 0x1

16
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-checker/simout
View file

@ -1,16 +1,18 @@
Redirecting stdout to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-o3-checker/simout
Redirecting stderr to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-o3-checker/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Aug 7 2015 10:13:08
gem5 started Aug 7 2015 11:01:08
gem5 executing on e104799-lin
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-o3-checker -re /work/gem5/outgoing/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-o3-checker
gem5 compiled Sep 14 2015 23:29:19
gem5 started Sep 15 2015 01:50:46
gem5 executing on ribera.cs.wisc.edu
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-o3-checker -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-o3-checker
Selected 64-bit ARM architecture, updating default disk image...
Global frequency set at 1000000000000 ticks per second
info: kernel located at: /work/gem5/dist/binaries/vmlinux.aarch64.20140821
info: kernel located at: /scratch/nilay/GEM5/system/binaries/vmlinux.aarch64.20140821
info: Using bootloader at address 0x10
info: Using kernel entry physical address at 0x80080000
info: Loading DTB file: /work/gem5/dist/binaries/vexpress.aarch64.20140821.dtb at address 0x88000000
info: Loading DTB file: /scratch/nilay/GEM5/system/binaries/vexpress.aarch64.20140821.dtb at address 0x88000000
info: Entering event queue @ 0. Starting simulation...
Exiting @ tick 51323721423000 because m5_exit instruction encountered
Exiting @ tick 51562169701000 because m5_exit instruction encountered

2850
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-checker/stats.txt
View file

File diff suppressed because it is too large Load diff

31
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-dual/config.ini
View file

@ -12,11 +12,11 @@ time_sync_spin_threshold=100000000
type=LinuxArmSystem
children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
atags_addr=134217728
boot_loader=/work/gem5/dist/binaries/boot_emm.arm64
boot_loader=/scratch/nilay/GEM5/system/binaries/boot_emm.arm64
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
cache_line_size=64
clk_domain=system.clk_domain
dtb_filename=/work/gem5/dist/binaries/vexpress.aarch64.20140821.dtb
dtb_filename=/scratch/nilay/GEM5/system/binaries/vexpress.aarch64.20140821.dtb
early_kernel_symbols=false
enable_context_switch_stats_dump=false
eventq_index=0
@ -28,7 +28,7 @@ have_security=false
have_virtualization=false
highest_el_is_64=false
init_param=0
kernel=/work/gem5/dist/binaries/vmlinux.aarch64.20140821
kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.aarch64.20140821
kernel_addr_check=true
load_addr_mask=268435455
load_offset=2147483648
@ -42,7 +42,7 @@ num_work_ids=16
panic_on_oops=true
panic_on_panic=true
phys_addr_range_64=40
readfile=/work/gem5/outgoing/gem5/tests/halt.sh
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
reset_addr_64=0
symbolfile=
work_begin_ckpt_count=0
@ -85,7 +85,7 @@ table_size=65536
[system.cf0.image.child]
type=RawDiskImage
eventq_index=0
image_file=/work/gem5/dist/disks/linaro-minimal-aarch64.img
image_file=/scratch/nilay/GEM5/system/disks/linaro-minimal-aarch64.img
read_only=true
[system.clk_domain]
@ -201,7 +201,7 @@ instShiftAmt=2
numThreads=1
[system.cpu0.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -542,7 +542,7 @@ opLat=4
pipelined=true
[system.cpu0.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -652,7 +652,7 @@ sys=system
port=system.cpu0.toL2Bus.slave[2]
[system.cpu0.l2cache]
type=BaseCache
type=Cache
children=prefetcher tags
addr_ranges=0:18446744073709551615
assoc=16
@ -835,7 +835,7 @@ instShiftAmt=2
numThreads=1
[system.cpu1.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -1176,7 +1176,7 @@ opLat=4
pipelined=true
[system.cpu1.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -1286,7 +1286,7 @@ sys=system
port=system.cpu1.toL2Bus.slave[2]
[system.cpu1.l2cache]
type=BaseCache
type=Cache
children=prefetcher tags
addr_ranges=0:18446744073709551615
assoc=16
@ -1399,7 +1399,7 @@ master=system.realview.uart.pio system.realview.realview_io.pio system.realview.
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
[system.iocache]
type=BaseCache
type=Cache
children=tags
addr_ranges=2147483648:2415919103
assoc=8
@ -1434,7 +1434,7 @@ sequential_access=false
size=1024
[system.l2c]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8
@ -1849,9 +1849,12 @@ gic=system.realview.gic
int_num=117
pio_addr=721420288
pio_latency=10000
pixel_clock=7299
pixel_buffer_size=2048
pixel_chunk=32
pxl_clk=system.realview.realview_io.osc_pxl
system=system
vnc=system.vncserver
workaround_dma_line_count=true
workaround_swap_rb=true
dma=system.membus.slave[0]
pio=system.iobus.master[5]

2
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-dual/simerr
View file

@ -11,3 +11,5 @@ warn: allocating bonus target for snoop
warn: allocating bonus target for snoop
warn: Tried to read RealView I/O at offset 0x8 that doesn't exist
warn: Tried to read RealView I/O at offset 0x48 that doesn't exist
warn: allocating bonus target for snoop
warn: allocating bonus target for snoop

16
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-dual/simout
View file

@ -1,16 +1,18 @@
Redirecting stdout to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-o3-dual/simout
Redirecting stderr to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-o3-dual/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Aug 7 2015 10:13:08
gem5 started Aug 7 2015 11:05:08
gem5 executing on e104799-lin
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-o3-dual -re /work/gem5/outgoing/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-o3-dual
gem5 compiled Sep 14 2015 23:29:19
gem5 started Sep 14 2015 23:59:20
gem5 executing on ribera.cs.wisc.edu
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-o3-dual -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-o3-dual
Selected 64-bit ARM architecture, updating default disk image...
Global frequency set at 1000000000000 ticks per second
info: kernel located at: /work/gem5/dist/binaries/vmlinux.aarch64.20140821
info: kernel located at: /scratch/nilay/GEM5/system/binaries/vmlinux.aarch64.20140821
info: Using bootloader at address 0x10
info: Using kernel entry physical address at 0x80080000
info: Loading DTB file: /work/gem5/dist/binaries/vexpress.aarch64.20140821.dtb at address 0x88000000
info: Loading DTB file: /scratch/nilay/GEM5/system/binaries/vexpress.aarch64.20140821.dtb at address 0x88000000
info: Entering event queue @ 0. Starting simulation...
Exiting @ tick 47309826639000 because m5_exit instruction encountered
Exiting @ tick 47309815475000 because m5_exit instruction encountered

6345
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-dual/stats.txt
View file

File diff suppressed because it is too large Load diff

23
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3/config.ini
View file

@ -12,11 +12,11 @@ time_sync_spin_threshold=100000000
type=LinuxArmSystem
children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain
atags_addr=134217728
boot_loader=/work/gem5/dist/binaries/boot_emm.arm64
boot_loader=/scratch/nilay/GEM5/system/binaries/boot_emm.arm64
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
cache_line_size=64
clk_domain=system.clk_domain
dtb_filename=/work/gem5/dist/binaries/vexpress.aarch64.20140821.dtb
dtb_filename=/scratch/nilay/GEM5/system/binaries/vexpress.aarch64.20140821.dtb
early_kernel_symbols=false
enable_context_switch_stats_dump=false
eventq_index=0
@ -28,7 +28,7 @@ have_security=false
have_virtualization=false
highest_el_is_64=false
init_param=0
kernel=/work/gem5/dist/binaries/vmlinux.aarch64.20140821
kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.aarch64.20140821
kernel_addr_check=true
load_addr_mask=268435455
load_offset=2147483648
@ -42,7 +42,7 @@ num_work_ids=16
panic_on_oops=true
panic_on_panic=true
phys_addr_range_64=40
readfile=/work/gem5/outgoing/gem5/tests/halt.sh
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
reset_addr_64=0
symbolfile=
work_begin_ckpt_count=0
@ -85,7 +85,7 @@ table_size=65536
[system.cf0.image.child]
type=RawDiskImage
eventq_index=0
image_file=/work/gem5/dist/disks/linaro-minimal-aarch64.img
image_file=/scratch/nilay/GEM5/system/disks/linaro-minimal-aarch64.img
read_only=true
[system.clk_domain]
@ -201,7 +201,7 @@ instShiftAmt=2
numThreads=1
[system.cpu.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=4
@ -542,7 +542,7 @@ opLat=4
pipelined=true
[system.cpu.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=1
@ -652,7 +652,7 @@ sys=system
port=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8
@ -740,7 +740,7 @@ master=system.realview.uart.pio system.realview.realview_io.pio system.realview.
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
[system.iocache]
type=BaseCache
type=Cache
children=tags
addr_ranges=2147483648:2415919103
assoc=8
@ -1155,9 +1155,12 @@ gic=system.realview.gic
int_num=117
pio_addr=721420288
pio_latency=10000
pixel_clock=7299
pixel_buffer_size=2048
pixel_chunk=32
pxl_clk=system.realview.realview_io.osc_pxl
system=system
vnc=system.vncserver
workaround_dma_line_count=true
workaround_swap_rb=true
dma=system.membus.slave[0]
pio=system.iobus.master[5]

16
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3/simout
View file

@ -1,16 +1,18 @@
Redirecting stdout to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-o3/simout
Redirecting stderr to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-o3/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Aug 7 2015 10:13:08
gem5 started Aug 7 2015 10:59:42
gem5 executing on e104799-lin
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-o3 -re /work/gem5/outgoing/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-o3
gem5 compiled Sep 14 2015 23:29:19
gem5 started Sep 15 2015 01:57:07
gem5 executing on ribera.cs.wisc.edu
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-o3 -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-o3
Selected 64-bit ARM architecture, updating default disk image...
Global frequency set at 1000000000000 ticks per second
info: kernel located at: /work/gem5/dist/binaries/vmlinux.aarch64.20140821
info: kernel located at: /scratch/nilay/GEM5/system/binaries/vmlinux.aarch64.20140821
info: Using bootloader at address 0x10
info: Using kernel entry physical address at 0x80080000
info: Loading DTB file: /work/gem5/dist/binaries/vexpress.aarch64.20140821.dtb at address 0x88000000
info: Loading DTB file: /scratch/nilay/GEM5/system/binaries/vexpress.aarch64.20140821.dtb at address 0x88000000
info: Entering event queue @ 0. Starting simulation...
Exiting @ tick 51323721423000 because m5_exit instruction encountered
Exiting @ tick 51562169701000 because m5_exit instruction encountered

2746
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3/stats.txt
View file

File diff suppressed because it is too large Load diff

23
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-checkpoint/config.ini
View file

@ -12,11 +12,11 @@ time_sync_spin_threshold=100000000
type=LinuxArmSystem
children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain
atags_addr=134217728
boot_loader=/work/gem5/dist/binaries/boot_emm.arm64
boot_loader=/scratch/nilay/GEM5/system/binaries/boot_emm.arm64
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
cache_line_size=64
clk_domain=system.clk_domain
dtb_filename=/work/gem5/dist/binaries/vexpress.aarch64.20140821.dtb
dtb_filename=/scratch/nilay/GEM5/system/binaries/vexpress.aarch64.20140821.dtb
early_kernel_symbols=false
enable_context_switch_stats_dump=false
eventq_index=0
@ -28,7 +28,7 @@ have_security=false
have_virtualization=false
highest_el_is_64=false
init_param=0
kernel=/work/gem5/dist/binaries/vmlinux.aarch64.20140821
kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.aarch64.20140821
kernel_addr_check=true
load_addr_mask=268435455
load_offset=2147483648
@ -42,7 +42,7 @@ num_work_ids=16
panic_on_oops=true
panic_on_panic=true
phys_addr_range_64=40
readfile=/work/gem5/outgoing/gem5/tests/halt.sh
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
reset_addr_64=0
symbolfile=
work_begin_ckpt_count=0
@ -85,7 +85,7 @@ table_size=65536
[system.cf0.image.child]
type=RawDiskImage
eventq_index=0
image_file=/work/gem5/dist/disks/linaro-minimal-aarch64.img
image_file=/scratch/nilay/GEM5/system/disks/linaro-minimal-aarch64.img
read_only=true
[system.clk_domain]
@ -136,7 +136,7 @@ dcache_port=system.cpu.dcache.cpu_side
icache_port=system.cpu.icache.cpu_side
[system.cpu.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=4
@ -212,7 +212,7 @@ sys=system
port=system.cpu.toL2Bus.slave[3]
[system.cpu.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=1
@ -322,7 +322,7 @@ sys=system
port=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8
@ -410,7 +410,7 @@ master=system.realview.uart.pio system.realview.realview_io.pio system.realview.
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
[system.iocache]
type=BaseCache
type=Cache
children=tags
addr_ranges=2147483648:2415919103
assoc=8
@ -761,9 +761,12 @@ gic=system.realview.gic
int_num=117
pio_addr=721420288
pio_latency=10000
pixel_clock=7299
pixel_buffer_size=2048
pixel_chunk=32
pxl_clk=system.realview.realview_io.osc_pxl
system=system
vnc=system.vncserver
workaround_dma_line_count=true
workaround_swap_rb=true
dma=system.membus.slave[0]
pio=system.iobus.master[5]

45
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-checkpoint/config.json
View file

@ -6,7 +6,7 @@
"mmap_using_noreserve": false,
"kernel_addr_check": true,
"highest_el_is_64": false,
"kernel": "/work/gem5/dist/binaries/vmlinux.aarch64.20140821",
"kernel": "/scratch/nilay/GEM5/system/binaries/vmlinux.aarch64.20140821",
"iobus": {
"slave": {
"peer": [
@ -68,7 +68,7 @@
"frontend_latency": 2
},
"symbolfile": "",
"readfile": "/work/gem5/outgoing/gem5/tests/halt.sh",
"readfile": "/scratch/nilay/GEM5/gem5/tests/halt.sh",
"have_large_asid_64": false,
"phys_addr_range_64": 40,
"have_lpae": false,
@ -87,7 +87,7 @@
"multi_proc": true,
"early_kernel_symbols": false,
"panic_on_oops": true,
"dtb_filename": "/work/gem5/dist/binaries/vexpress.aarch64.20140821.dtb",
"dtb_filename": "/scratch/nilay/GEM5/system/binaries/vexpress.aarch64.20140821.dtb",
"enable_context_switch_stats_dump": false,
"work_begin_ckpt_count": 0,
"clk_domain": {
@ -108,30 +108,33 @@
],
"realview": {
"hdlcd": {
"dma": {
"peer": "system.membus.slave[0]",
"role": "MASTER"
},
"pixel_clock": 7299,
"vnc": "system.vncserver",
"pxl_clk": "system.realview.realview_io.osc_pxl",
"name": "hdlcd",
"workaround_dma_line_count": true,
"amba_id": 1314816,
"pio": {
"peer": "system.iobus.master[5]",
"role": "SLAVE"
},
"amba_id": 1314816,
"pio_latency": 10000,
"clk_domain": "system.clk_domain",
"system": "system",
"gic": "system.realview.gic",
"int_num": 117,
"eventq_index": 0,
"pixel_buffer_size": 2048,
"cxx_class": "HDLcd",
"enable_capture": true,
"path": "system.realview.hdlcd",
"pio_addr": 721420288,
"workaround_swap_rb": true,
"type": "HDLcd"
"type": "HDLcd",
"pixel_chunk": 32,
"dma": {
"peer": "system.membus.slave[0]",
"role": "MASTER"
}
},
"mmc_fake": {
"name": "mmc_fake",
@ -893,7 +896,7 @@
"MSIXCAPNextCapability": 0,
"PXCAPLinkCtrl": 0,
"Revision": 0,
"hardware_address": "<m5.params.EthernetAddr object at 0x7fd02360a190>",
"hardware_address": "<m5.params.EthernetAddr object at 0x511b690>",
"LegacyIOBase": 0,
"pio_latency": 30000,
"platform": "system.realview",
@ -1176,7 +1179,7 @@
"clk_domain": "system.clk_domain",
"write_buffers": 8,
"response_latency": 50,
"cxx_class": "BaseCache",
"cxx_class": "Cache",
"size": 1024,
"tags": {
"name": "tags",
@ -1210,7 +1213,7 @@
"prefetch_on_access": false,
"path": "system.iocache",
"name": "iocache",
"type": "BaseCache",
"type": "Cache",
"sequential_access": false,
"assoc": 8
},
@ -1416,7 +1419,7 @@
"clk_domain": "system.cpu_clk_domain",
"write_buffers": 8,
"response_latency": 2,
"cxx_class": "BaseCache",
"cxx_class": "Cache",
"size": 32768,
"tags": {
"name": "tags",
@ -1450,7 +1453,7 @@
"prefetch_on_access": false,
"path": "system.cpu.icache",
"name": "icache",
"type": "BaseCache",
"type": "Cache",
"sequential_access": false,
"assoc": 1
},
@ -1505,7 +1508,7 @@
"clk_domain": "system.cpu_clk_domain",
"write_buffers": 8,
"response_latency": 20,
"cxx_class": "BaseCache",
"cxx_class": "Cache",
"size": 4194304,
"tags": {
"name": "tags",
@ -1539,7 +1542,7 @@
"prefetch_on_access": false,
"path": "system.cpu.l2cache",
"name": "l2cache",
"type": "BaseCache",
"type": "Cache",
"sequential_access": false,
"assoc": 8
},
@ -1586,7 +1589,7 @@
"clk_domain": "system.cpu_clk_domain",
"write_buffers": 8,
"response_latency": 2,
"cxx_class": "BaseCache",
"cxx_class": "Cache",
"size": 32768,
"tags": {
"name": "tags",
@ -1620,7 +1623,7 @@
"prefetch_on_access": false,
"path": "system.cpu.dcache",
"name": "dcache",
"type": "BaseCache",
"type": "Cache",
"sequential_access": false,
"assoc": 4
},
@ -1701,7 +1704,7 @@
"eventq_index": 0,
"cxx_class": "RawDiskImage",
"path": "system.cf0.image.child",
"image_file": "/work/gem5/dist/disks/linaro-minimal-aarch64.img",
"image_file": "/scratch/nilay/GEM5/system/disks/linaro-minimal-aarch64.img",
"type": "RawDiskImage"
},
"path": "system.cf0.image",
@ -1741,7 +1744,7 @@
"system.realview.vram"
],
"work_begin_cpu_id_exit": -1,
"boot_loader": "/work/gem5/dist/binaries/boot_emm.arm64",
"boot_loader": "/scratch/nilay/GEM5/system/binaries/boot_emm.arm64",
"num_work_ids": 16
},
"time_sync_period": 100000000000,

20
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-checkpoint/stats.txt
View file

@ -4,11 +4,11 @@ sim_seconds 51.111153 # Nu
sim_ticks 51111152682000 # Number of ticks simulated
final_tick 51111152682000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 1040961 # Simulator instruction rate (inst/s)
host_op_rate 1223300 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 54038486240 # Simulator tick rate (ticks/s)
host_mem_usage 670940 # Number of bytes of host memory used
host_seconds 945.83 # Real time elapsed on the host
host_inst_rate 926984 # Simulator instruction rate (inst/s)
host_op_rate 1089358 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 48121696814 # Simulator tick rate (ticks/s)
host_mem_usage 716268 # Number of bytes of host memory used
host_seconds 1062.12 # Real time elapsed on the host
sim_insts 984570519 # Number of instructions simulated
sim_ops 1157031967 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
@ -210,7 +210,7 @@ system.cpu.itb.inst_accesses 985174158 # IT
system.cpu.itb.hits 985047321 # DTB hits
system.cpu.itb.misses 126837 # DTB misses
system.cpu.itb.accesses 985174158 # DTB accesses
system.cpu.numCycles 102222322140 # number of cpu cycles simulated
system.cpu.numCycles 102222325018 # number of cpu cycles simulated
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
system.cpu.committedInsts 984570519 # Number of instructions committed
@ -230,8 +230,8 @@ system.cpu.num_cc_register_writes 263829403 # nu
system.cpu.num_mem_refs 352465606 # number of memory refs
system.cpu.num_load_insts 184180431 # Number of load instructions
system.cpu.num_store_insts 168285175 # Number of store instructions
system.cpu.num_idle_cycles 101064643603.520065 # Number of idle cycles
system.cpu.num_busy_cycles 1157678536.479939 # Number of busy cycles
system.cpu.num_idle_cycles 101064646448.926407 # Number of idle cycles
system.cpu.num_busy_cycles 1157678569.073592 # Number of busy cycles
system.cpu.not_idle_fraction 0.011325 # Percentage of non-idle cycles
system.cpu.idle_fraction 0.988675 # Percentage of idle cycles
system.cpu.Branches 220088562 # Number of branches fetched
@ -271,7 +271,7 @@ system.cpu.op_class::IprAccess 0 0.00% 100.00% # Cl
system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
system.cpu.op_class::total 1157666593 # Class of executed instruction
system.cpu.kern.inst.arm 0 # number of arm instructions executed
system.cpu.kern.inst.quiesce 16775 # number of quiesce instructions executed
system.cpu.kern.inst.quiesce 19653 # number of quiesce instructions executed
system.cpu.dcache.tags.replacements 11612141 # number of replacements
system.cpu.dcache.tags.tagsinuse 511.999719 # Cycle average of tags in use
system.cpu.dcache.tags.total_refs 340776008 # Total number of references to valid blocks.
@ -787,13 +787,13 @@ system.realview.ethernet.totalRxOrn 0 # to
system.realview.ethernet.coalescedTotal 0 # average number of interrupts coalesced into each post
system.realview.ethernet.postedInterrupts 13 # number of posts to CPU
system.realview.ethernet.droppedPackets 0 # number of packets dropped
system.realview.realview_io.osc_pxl.clock 42105 # Clock period in ticks
system.realview.realview_io.osc_clcd.clock 42105 # Clock period in ticks
system.realview.realview_io.osc_cpu.clock 16667 # Clock period in ticks
system.realview.realview_io.osc_ddr.clock 25000 # Clock period in ticks
system.realview.realview_io.osc_hsbm.clock 25000 # Clock period in ticks
system.realview.realview_io.osc_mcc.clock 20000 # Clock period in ticks
system.realview.realview_io.osc_peripheral.clock 41667 # Clock period in ticks
system.realview.realview_io.osc_pxl.clock 42105 # Clock period in ticks
system.realview.realview_io.osc_smb.clock 20000 # Clock period in ticks
system.realview.realview_io.osc_sys.clock 16667 # Clock period in ticks
system.realview.realview_io.osc_system_bus.clock 41667 # Clock period in ticks

31
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-dual/config.ini
View file

@ -12,11 +12,11 @@ time_sync_spin_threshold=100000000
type=LinuxArmSystem
children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
atags_addr=134217728
boot_loader=/work/gem5/dist/binaries/boot_emm.arm64
boot_loader=/scratch/nilay/GEM5/system/binaries/boot_emm.arm64
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
cache_line_size=64
clk_domain=system.clk_domain
dtb_filename=/work/gem5/dist/binaries/vexpress.aarch64.20140821.dtb
dtb_filename=/scratch/nilay/GEM5/system/binaries/vexpress.aarch64.20140821.dtb
early_kernel_symbols=false
enable_context_switch_stats_dump=false
eventq_index=0
@ -28,7 +28,7 @@ have_security=false
have_virtualization=false
highest_el_is_64=false
init_param=0
kernel=/work/gem5/dist/binaries/vmlinux.aarch64.20140821
kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.aarch64.20140821
kernel_addr_check=true
load_addr_mask=268435455
load_offset=2147483648
@ -42,7 +42,7 @@ num_work_ids=16
panic_on_oops=true
panic_on_panic=true
phys_addr_range_64=40
readfile=/work/gem5/outgoing/gem5/tests/halt.sh
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
reset_addr_64=0
symbolfile=
work_begin_ckpt_count=0
@ -85,7 +85,7 @@ table_size=65536
[system.cf0.image.child]
type=RawDiskImage
eventq_index=0
image_file=/work/gem5/dist/disks/linaro-minimal-aarch64.img
image_file=/scratch/nilay/GEM5/system/disks/linaro-minimal-aarch64.img
read_only=true
[system.clk_domain]
@ -136,7 +136,7 @@ dcache_port=system.cpu0.dcache.cpu_side
icache_port=system.cpu0.icache.cpu_side
[system.cpu0.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -212,7 +212,7 @@ sys=system
port=system.cpu0.toL2Bus.slave[3]
[system.cpu0.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -322,7 +322,7 @@ sys=system
port=system.cpu0.toL2Bus.slave[2]
[system.cpu0.l2cache]
type=BaseCache
type=Cache
children=prefetcher tags
addr_ranges=0:18446744073709551615
assoc=16
@ -440,7 +440,7 @@ dcache_port=system.cpu1.dcache.cpu_side
icache_port=system.cpu1.icache.cpu_side
[system.cpu1.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -516,7 +516,7 @@ sys=system
port=system.cpu1.toL2Bus.slave[3]
[system.cpu1.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -626,7 +626,7 @@ sys=system
port=system.cpu1.toL2Bus.slave[2]
[system.cpu1.l2cache]
type=BaseCache
type=Cache
children=prefetcher tags
addr_ranges=0:18446744073709551615
assoc=16
@ -739,7 +739,7 @@ master=system.realview.uart.pio system.realview.realview_io.pio system.realview.
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
[system.iocache]
type=BaseCache
type=Cache
children=tags
addr_ranges=2147483648:2415919103
assoc=8
@ -774,7 +774,7 @@ sequential_access=false
size=1024
[system.l2c]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8
@ -1125,9 +1125,12 @@ gic=system.realview.gic
int_num=117
pio_addr=721420288
pio_latency=10000
pixel_clock=7299
pixel_buffer_size=2048
pixel_chunk=32
pxl_clk=system.realview.realview_io.osc_pxl
system=system
vnc=system.vncserver
workaround_dma_line_count=true
workaround_swap_rb=true
dma=system.membus.slave[0]
pio=system.iobus.master[5]

28
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-dual/stats.txt
View file

@ -4,11 +4,11 @@ sim_seconds 47.216814 # Nu
sim_ticks 47216814145000 # Number of ticks simulated
final_tick 47216814145000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 990548 # Simulator instruction rate (inst/s)
host_op_rate 1165292 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 47947296122 # Simulator tick rate (ticks/s)
host_mem_usage 681164 # Number of bytes of host memory used
host_seconds 984.77 # Real time elapsed on the host
host_inst_rate 873779 # Simulator instruction rate (inst/s)
host_op_rate 1027923 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 42295108650 # Simulator tick rate (ticks/s)
host_mem_usage 724108 # Number of bytes of host memory used
host_seconds 1116.37 # Real time elapsed on the host
sim_insts 975457230 # Number of instructions simulated
sim_ops 1147538415 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
@ -241,7 +241,7 @@ system.cpu0.itb.inst_accesses 497757770 # IT
system.cpu0.itb.hits 497696393 # DTB hits
system.cpu0.itb.misses 61377 # DTB misses
system.cpu0.itb.accesses 497757770 # DTB accesses
system.cpu0.numCycles 94433641544 # number of cpu cycles simulated
system.cpu0.numCycles 94433643486 # number of cpu cycles simulated
system.cpu0.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu0.numWorkItemsCompleted 0 # number of work items this cpu completed
system.cpu0.committedInsts 497466384 # Number of instructions committed
@ -261,8 +261,8 @@ system.cpu0.num_cc_register_writes 133531045 # nu
system.cpu0.num_mem_refs 178459396 # number of memory refs
system.cpu0.num_load_insts 92737001 # Number of load instructions
system.cpu0.num_store_insts 85722395 # Number of store instructions
system.cpu0.num_idle_cycles 93848337191.325058 # Number of idle cycles
system.cpu0.num_busy_cycles 585304352.674931 # Number of busy cycles
system.cpu0.num_idle_cycles 93848339121.288452 # Number of idle cycles
system.cpu0.num_busy_cycles 585304364.711543 # Number of busy cycles
system.cpu0.not_idle_fraction 0.006198 # Percentage of non-idle cycles
system.cpu0.idle_fraction 0.993802 # Percentage of idle cycles
system.cpu0.Branches 111287587 # Number of branches fetched
@ -302,7 +302,7 @@ system.cpu0.op_class::IprAccess 0 0.00% 100.00% # Cl
system.cpu0.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
system.cpu0.op_class::total 585300003 # Class of executed instruction
system.cpu0.kern.inst.arm 0 # number of arm instructions executed
system.cpu0.kern.inst.quiesce 13253 # number of quiesce instructions executed
system.cpu0.kern.inst.quiesce 15195 # number of quiesce instructions executed
system.cpu0.dcache.tags.replacements 6272773 # number of replacements
system.cpu0.dcache.tags.tagsinuse 500.885315 # Cycle average of tags in use
system.cpu0.dcache.tags.total_refs 172015769 # Total number of references to valid blocks.
@ -767,7 +767,7 @@ system.cpu1.itb.inst_accesses 478309003 # IT
system.cpu1.itb.hits 478248118 # DTB hits
system.cpu1.itb.misses 60885 # DTB misses
system.cpu1.itb.accesses 478309003 # DTB accesses
system.cpu1.numCycles 94433634550 # number of cpu cycles simulated
system.cpu1.numCycles 94433635490 # number of cpu cycles simulated
system.cpu1.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu1.numWorkItemsCompleted 0 # number of work items this cpu completed
system.cpu1.committedInsts 477990846 # Number of instructions committed
@ -787,8 +787,8 @@ system.cpu1.num_cc_register_writes 126112608 # nu
system.cpu1.num_mem_refs 171406825 # number of memory refs
system.cpu1.num_load_insts 90251973 # Number of load instructions
system.cpu1.num_store_insts 81154852 # Number of store instructions
system.cpu1.num_idle_cycles 93870750285.000458 # Number of idle cycles
system.cpu1.num_busy_cycles 562884264.999552 # Number of busy cycles
system.cpu1.num_idle_cycles 93870751219.397461 # Number of idle cycles
system.cpu1.num_busy_cycles 562884270.602548 # Number of busy cycles
system.cpu1.not_idle_fraction 0.005961 # Percentage of non-idle cycles
system.cpu1.idle_fraction 0.994039 # Percentage of idle cycles
system.cpu1.Branches 106497601 # Number of branches fetched
@ -828,7 +828,7 @@ system.cpu1.op_class::IprAccess 0 0.00% 100.00% # Cl
system.cpu1.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
system.cpu1.op_class::total 562879339 # Class of executed instruction
system.cpu1.kern.inst.arm 0 # number of arm instructions executed
system.cpu1.kern.inst.quiesce 6259 # number of quiesce instructions executed
system.cpu1.kern.inst.quiesce 7199 # number of quiesce instructions executed
system.cpu1.dcache.tags.replacements 5945049 # number of replacements
system.cpu1.dcache.tags.tagsinuse 438.290639 # Cycle average of tags in use
system.cpu1.dcache.tags.total_refs 165346662 # Total number of references to valid blocks.
@ -1551,13 +1551,13 @@ system.realview.ethernet.totalRxOrn 0 # to
system.realview.ethernet.coalescedTotal 0 # average number of interrupts coalesced into each post
system.realview.ethernet.postedInterrupts 13 # number of posts to CPU
system.realview.ethernet.droppedPackets 0 # number of packets dropped
system.realview.realview_io.osc_pxl.clock 42105 # Clock period in ticks
system.realview.realview_io.osc_clcd.clock 42105 # Clock period in ticks
system.realview.realview_io.osc_cpu.clock 16667 # Clock period in ticks
system.realview.realview_io.osc_ddr.clock 25000 # Clock period in ticks
system.realview.realview_io.osc_hsbm.clock 25000 # Clock period in ticks
system.realview.realview_io.osc_mcc.clock 20000 # Clock period in ticks
system.realview.realview_io.osc_peripheral.clock 41667 # Clock period in ticks
system.realview.realview_io.osc_pxl.clock 42105 # Clock period in ticks
system.realview.realview_io.osc_smb.clock 20000 # Clock period in ticks
system.realview.realview_io.osc_sys.clock 16667 # Clock period in ticks
system.realview.realview_io.osc_system_bus.clock 41667 # Clock period in ticks

23
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic/config.ini
View file

@ -12,11 +12,11 @@ time_sync_spin_threshold=100000000
type=LinuxArmSystem
children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain
atags_addr=134217728
boot_loader=/work/gem5/dist/binaries/boot_emm.arm64
boot_loader=/scratch/nilay/GEM5/system/binaries/boot_emm.arm64
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
cache_line_size=64
clk_domain=system.clk_domain
dtb_filename=/work/gem5/dist/binaries/vexpress.aarch64.20140821.dtb
dtb_filename=/scratch/nilay/GEM5/system/binaries/vexpress.aarch64.20140821.dtb
early_kernel_symbols=false
enable_context_switch_stats_dump=false
eventq_index=0
@ -28,7 +28,7 @@ have_security=false
have_virtualization=false
highest_el_is_64=false
init_param=0
kernel=/work/gem5/dist/binaries/vmlinux.aarch64.20140821
kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.aarch64.20140821
kernel_addr_check=true
load_addr_mask=268435455
load_offset=2147483648
@ -42,7 +42,7 @@ num_work_ids=16
panic_on_oops=true
panic_on_panic=true
phys_addr_range_64=40
readfile=/work/gem5/outgoing/gem5/tests/halt.sh
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
reset_addr_64=0
symbolfile=
work_begin_ckpt_count=0
@ -85,7 +85,7 @@ table_size=65536
[system.cf0.image.child]
type=RawDiskImage
eventq_index=0
image_file=/work/gem5/dist/disks/linaro-minimal-aarch64.img
image_file=/scratch/nilay/GEM5/system/disks/linaro-minimal-aarch64.img
read_only=true
[system.clk_domain]
@ -136,7 +136,7 @@ dcache_port=system.cpu.dcache.cpu_side
icache_port=system.cpu.icache.cpu_side
[system.cpu.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=4
@ -212,7 +212,7 @@ sys=system
port=system.cpu.toL2Bus.slave[3]
[system.cpu.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=1
@ -322,7 +322,7 @@ sys=system
port=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8
@ -410,7 +410,7 @@ master=system.realview.uart.pio system.realview.realview_io.pio system.realview.
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
[system.iocache]
type=BaseCache
type=Cache
children=tags
addr_ranges=2147483648:2415919103
assoc=8
@ -761,9 +761,12 @@ gic=system.realview.gic
int_num=117
pio_addr=721420288
pio_latency=10000
pixel_clock=7299
pixel_buffer_size=2048
pixel_chunk=32
pxl_clk=system.realview.realview_io.osc_pxl
system=system
vnc=system.vncserver
workaround_dma_line_count=true
workaround_swap_rb=true
dma=system.membus.slave[0]
pio=system.iobus.master[5]

14
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic/simout
View file

@ -1,16 +1,18 @@
Redirecting stdout to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-simple-atomic/simout
Redirecting stderr to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-simple-atomic/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Aug 7 2015 10:13:08
gem5 started Aug 7 2015 11:06:10
gem5 executing on e104799-lin
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-simple-atomic -re /work/gem5/outgoing/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-simple-atomic
gem5 compiled Sep 14 2015 23:29:19
gem5 started Sep 15 2015 03:06:20
gem5 executing on ribera.cs.wisc.edu
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-simple-atomic -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-simple-atomic
Selected 64-bit ARM architecture, updating default disk image...
Global frequency set at 1000000000000 ticks per second
info: kernel located at: /work/gem5/dist/binaries/vmlinux.aarch64.20140821
info: kernel located at: /scratch/nilay/GEM5/system/binaries/vmlinux.aarch64.20140821
info: Using bootloader at address 0x10
info: Using kernel entry physical address at 0x80080000
info: Loading DTB file: /work/gem5/dist/binaries/vexpress.aarch64.20140821.dtb at address 0x88000000
info: Loading DTB file: /scratch/nilay/GEM5/system/binaries/vexpress.aarch64.20140821.dtb at address 0x88000000
info: Entering event queue @ 0. Starting simulation...
Exiting @ tick 51111152682000 because m5_exit instruction encountered

20
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic/stats.txt
View file

@ -4,11 +4,11 @@ sim_seconds 51.111153 # Nu
sim_ticks 51111152682000 # Number of ticks simulated
final_tick 51111152682000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 1034678 # Simulator instruction rate (inst/s)
host_op_rate 1215917 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 53712340974 # Simulator tick rate (ticks/s)
host_mem_usage 668604 # Number of bytes of host memory used
host_seconds 951.57 # Real time elapsed on the host
host_inst_rate 921297 # Simulator instruction rate (inst/s)
host_op_rate 1082675 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 47826467843 # Simulator tick rate (ticks/s)
host_mem_usage 712064 # Number of bytes of host memory used
host_seconds 1068.68 # Real time elapsed on the host
sim_insts 984570519 # Number of instructions simulated
sim_ops 1157031967 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
@ -210,7 +210,7 @@ system.cpu.itb.inst_accesses 985174158 # IT
system.cpu.itb.hits 985047321 # DTB hits
system.cpu.itb.misses 126837 # DTB misses
system.cpu.itb.accesses 985174158 # DTB accesses
system.cpu.numCycles 102222322140 # number of cpu cycles simulated
system.cpu.numCycles 102222325018 # number of cpu cycles simulated
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
system.cpu.committedInsts 984570519 # Number of instructions committed
@ -230,8 +230,8 @@ system.cpu.num_cc_register_writes 263829403 # nu
system.cpu.num_mem_refs 352465606 # number of memory refs
system.cpu.num_load_insts 184180431 # Number of load instructions
system.cpu.num_store_insts 168285175 # Number of store instructions
system.cpu.num_idle_cycles 101064643603.520065 # Number of idle cycles
system.cpu.num_busy_cycles 1157678536.479939 # Number of busy cycles
system.cpu.num_idle_cycles 101064646448.926407 # Number of idle cycles
system.cpu.num_busy_cycles 1157678569.073592 # Number of busy cycles
system.cpu.not_idle_fraction 0.011325 # Percentage of non-idle cycles
system.cpu.idle_fraction 0.988675 # Percentage of idle cycles
system.cpu.Branches 220088562 # Number of branches fetched
@ -271,7 +271,7 @@ system.cpu.op_class::IprAccess 0 0.00% 100.00% # Cl
system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
system.cpu.op_class::total 1157666593 # Class of executed instruction
system.cpu.kern.inst.arm 0 # number of arm instructions executed
system.cpu.kern.inst.quiesce 16775 # number of quiesce instructions executed
system.cpu.kern.inst.quiesce 19653 # number of quiesce instructions executed
system.cpu.dcache.tags.replacements 11612141 # number of replacements
system.cpu.dcache.tags.tagsinuse 511.999719 # Cycle average of tags in use
system.cpu.dcache.tags.total_refs 340776008 # Total number of references to valid blocks.
@ -787,13 +787,13 @@ system.realview.ethernet.totalRxOrn 0 # to
system.realview.ethernet.coalescedTotal 0 # average number of interrupts coalesced into each post
system.realview.ethernet.postedInterrupts 13 # number of posts to CPU
system.realview.ethernet.droppedPackets 0 # number of packets dropped
system.realview.realview_io.osc_pxl.clock 42105 # Clock period in ticks
system.realview.realview_io.osc_clcd.clock 42105 # Clock period in ticks
system.realview.realview_io.osc_cpu.clock 16667 # Clock period in ticks
system.realview.realview_io.osc_ddr.clock 25000 # Clock period in ticks
system.realview.realview_io.osc_hsbm.clock 25000 # Clock period in ticks
system.realview.realview_io.osc_mcc.clock 20000 # Clock period in ticks
system.realview.realview_io.osc_peripheral.clock 41667 # Clock period in ticks
system.realview.realview_io.osc_pxl.clock 42105 # Clock period in ticks
system.realview.realview_io.osc_smb.clock 20000 # Clock period in ticks
system.realview.realview_io.osc_sys.clock 16667 # Clock period in ticks
system.realview.realview_io.osc_system_bus.clock 41667 # Clock period in ticks

31
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing-dual/config.ini
View file

@ -12,11 +12,11 @@ time_sync_spin_threshold=100000000
type=LinuxArmSystem
children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
atags_addr=134217728
boot_loader=/work/gem5/dist/binaries/boot_emm.arm64
boot_loader=/scratch/nilay/GEM5/system/binaries/boot_emm.arm64
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
cache_line_size=64
clk_domain=system.clk_domain
dtb_filename=/work/gem5/dist/binaries/vexpress.aarch64.20140821.dtb
dtb_filename=/scratch/nilay/GEM5/system/binaries/vexpress.aarch64.20140821.dtb
early_kernel_symbols=false
enable_context_switch_stats_dump=false
eventq_index=0
@ -28,7 +28,7 @@ have_security=false
have_virtualization=false
highest_el_is_64=false
init_param=0
kernel=/work/gem5/dist/binaries/vmlinux.aarch64.20140821
kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.aarch64.20140821
kernel_addr_check=true
load_addr_mask=268435455
load_offset=2147483648
@ -42,7 +42,7 @@ num_work_ids=16
panic_on_oops=true
panic_on_panic=true
phys_addr_range_64=40
readfile=/work/gem5/outgoing/gem5/tests/halt.sh
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
reset_addr_64=0
symbolfile=
work_begin_ckpt_count=0
@ -85,7 +85,7 @@ table_size=65536
[system.cf0.image.child]
type=RawDiskImage
eventq_index=0
image_file=/work/gem5/dist/disks/linaro-minimal-aarch64.img
image_file=/scratch/nilay/GEM5/system/disks/linaro-minimal-aarch64.img
read_only=true
[system.clk_domain]
@ -132,7 +132,7 @@ dcache_port=system.cpu0.dcache.cpu_side
icache_port=system.cpu0.icache.cpu_side
[system.cpu0.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -208,7 +208,7 @@ sys=system
port=system.cpu0.toL2Bus.slave[3]
[system.cpu0.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -318,7 +318,7 @@ sys=system
port=system.cpu0.toL2Bus.slave[2]
[system.cpu0.l2cache]
type=BaseCache
type=Cache
children=prefetcher tags
addr_ranges=0:18446744073709551615
assoc=16
@ -432,7 +432,7 @@ dcache_port=system.cpu1.dcache.cpu_side
icache_port=system.cpu1.icache.cpu_side
[system.cpu1.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -508,7 +508,7 @@ sys=system
port=system.cpu1.toL2Bus.slave[3]
[system.cpu1.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -618,7 +618,7 @@ sys=system
port=system.cpu1.toL2Bus.slave[2]
[system.cpu1.l2cache]
type=BaseCache
type=Cache
children=prefetcher tags
addr_ranges=0:18446744073709551615
assoc=16
@ -731,7 +731,7 @@ master=system.realview.uart.pio system.realview.realview_io.pio system.realview.
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
[system.iocache]
type=BaseCache
type=Cache
children=tags
addr_ranges=2147483648:2415919103
assoc=8
@ -766,7 +766,7 @@ sequential_access=false
size=1024
[system.l2c]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8
@ -1181,9 +1181,12 @@ gic=system.realview.gic
int_num=117
pio_addr=721420288
pio_latency=10000
pixel_clock=7299
pixel_buffer_size=2048
pixel_chunk=32
pxl_clk=system.realview.realview_io.osc_pxl
system=system
vnc=system.vncserver
workaround_dma_line_count=true
workaround_swap_rb=true
dma=system.membus.slave[0]
pio=system.iobus.master[5]

14
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing-dual/simout
View file

@ -1,16 +1,18 @@
Redirecting stdout to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-simple-timing-dual/simout
Redirecting stderr to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-simple-timing-dual/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Aug 7 2015 10:13:08
gem5 started Aug 7 2015 11:24:22
gem5 executing on e104799-lin
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-simple-timing-dual -re /work/gem5/outgoing/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-simple-timing-dual
gem5 compiled Sep 14 2015 23:29:19
gem5 started Sep 15 2015 02:37:28
gem5 executing on ribera.cs.wisc.edu
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-simple-timing-dual -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-simple-timing-dual
Selected 64-bit ARM architecture, updating default disk image...
Global frequency set at 1000000000000 ticks per second
info: kernel located at: /work/gem5/dist/binaries/vmlinux.aarch64.20140821
info: kernel located at: /scratch/nilay/GEM5/system/binaries/vmlinux.aarch64.20140821
info: Using bootloader at address 0x10
info: Using kernel entry physical address at 0x80080000
info: Loading DTB file: /work/gem5/dist/binaries/vexpress.aarch64.20140821.dtb at address 0x88000000
info: Loading DTB file: /scratch/nilay/GEM5/system/binaries/vexpress.aarch64.20140821.dtb at address 0x88000000
info: Entering event queue @ 0. Starting simulation...
Exiting @ tick 47456679626500 because m5_exit instruction encountered

16
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing-dual/stats.txt
View file

@ -4,11 +4,11 @@ sim_seconds 47.456680 # Nu
sim_ticks 47456679626500 # Number of ticks simulated
final_tick 47456679626500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 617984 # Simulator instruction rate (inst/s)
host_op_rate 726985 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 33898978760 # Simulator tick rate (ticks/s)
host_mem_usage 711884 # Number of bytes of host memory used
host_seconds 1399.94 # Real time elapsed on the host
host_inst_rate 503190 # Simulator instruction rate (inst/s)
host_op_rate 591944 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 27602071667 # Simulator tick rate (ticks/s)
host_mem_usage 755208 # Number of bytes of host memory used
host_seconds 1719.32 # Real time elapsed on the host
sim_insts 865142471 # Number of instructions simulated
sim_ops 1017738631 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
@ -625,7 +625,7 @@ system.cpu0.op_class::IprAccess 0 0.00% 100.00% # Cl
system.cpu0.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
system.cpu0.op_class::total 502778486 # Class of executed instruction
system.cpu0.kern.inst.arm 0 # number of arm instructions executed
system.cpu0.kern.inst.quiesce 14022 # number of quiesce instructions executed
system.cpu0.kern.inst.quiesce 15090 # number of quiesce instructions executed
system.cpu0.dcache.tags.replacements 5233253 # number of replacements
system.cpu0.dcache.tags.tagsinuse 480.798924 # Cycle average of tags in use
system.cpu0.dcache.tags.total_refs 147607157 # Total number of references to valid blocks.
@ -1613,7 +1613,7 @@ system.cpu1.op_class::IprAccess 0 0.00% 100.00% # Cl
system.cpu1.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
system.cpu1.op_class::total 515545598 # Class of executed instruction
system.cpu1.kern.inst.arm 0 # number of arm instructions executed
system.cpu1.kern.inst.quiesce 5256 # number of quiesce instructions executed
system.cpu1.kern.inst.quiesce 7070 # number of quiesce instructions executed
system.cpu1.dcache.tags.replacements 5176711 # number of replacements
system.cpu1.dcache.tags.tagsinuse 457.282743 # Cycle average of tags in use
system.cpu1.dcache.tags.total_refs 152806636 # Total number of references to valid blocks.
@ -3222,13 +3222,13 @@ system.realview.ethernet.totalRxOrn 0 # to
system.realview.ethernet.coalescedTotal 0 # average number of interrupts coalesced into each post
system.realview.ethernet.postedInterrupts 13 # number of posts to CPU
system.realview.ethernet.droppedPackets 0 # number of packets dropped
system.realview.realview_io.osc_pxl.clock 42105 # Clock period in ticks
system.realview.realview_io.osc_clcd.clock 42105 # Clock period in ticks
system.realview.realview_io.osc_cpu.clock 16667 # Clock period in ticks
system.realview.realview_io.osc_ddr.clock 25000 # Clock period in ticks
system.realview.realview_io.osc_hsbm.clock 25000 # Clock period in ticks
system.realview.realview_io.osc_mcc.clock 20000 # Clock period in ticks
system.realview.realview_io.osc_peripheral.clock 41667 # Clock period in ticks
system.realview.realview_io.osc_pxl.clock 42105 # Clock period in ticks
system.realview.realview_io.osc_smb.clock 20000 # Clock period in ticks
system.realview.realview_io.osc_sys.clock 16667 # Clock period in ticks
system.realview.realview_io.osc_system_bus.clock 41667 # Clock period in ticks

23
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing/config.ini
View file

@ -12,11 +12,11 @@ time_sync_spin_threshold=100000000
type=LinuxArmSystem
children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain
atags_addr=134217728
boot_loader=/work/gem5/dist/binaries/boot_emm.arm64
boot_loader=/scratch/nilay/GEM5/system/binaries/boot_emm.arm64
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
cache_line_size=64
clk_domain=system.clk_domain
dtb_filename=/work/gem5/dist/binaries/vexpress.aarch64.20140821.dtb
dtb_filename=/scratch/nilay/GEM5/system/binaries/vexpress.aarch64.20140821.dtb
early_kernel_symbols=false
enable_context_switch_stats_dump=false
eventq_index=0
@ -28,7 +28,7 @@ have_security=false
have_virtualization=false
highest_el_is_64=false
init_param=0
kernel=/work/gem5/dist/binaries/vmlinux.aarch64.20140821
kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.aarch64.20140821
kernel_addr_check=true
load_addr_mask=268435455
load_offset=2147483648
@ -42,7 +42,7 @@ num_work_ids=16
panic_on_oops=true
panic_on_panic=true
phys_addr_range_64=40
readfile=/work/gem5/outgoing/gem5/tests/halt.sh
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
reset_addr_64=0
symbolfile=
work_begin_ckpt_count=0
@ -85,7 +85,7 @@ table_size=65536
[system.cf0.image.child]
type=RawDiskImage
eventq_index=0
image_file=/work/gem5/dist/disks/linaro-minimal-aarch64.img
image_file=/scratch/nilay/GEM5/system/disks/linaro-minimal-aarch64.img
read_only=true
[system.clk_domain]
@ -132,7 +132,7 @@ dcache_port=system.cpu.dcache.cpu_side
icache_port=system.cpu.icache.cpu_side
[system.cpu.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=4
@ -208,7 +208,7 @@ sys=system
port=system.cpu.toL2Bus.slave[3]
[system.cpu.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=1
@ -318,7 +318,7 @@ sys=system
port=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8
@ -406,7 +406,7 @@ master=system.realview.uart.pio system.realview.realview_io.pio system.realview.
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
[system.iocache]
type=BaseCache
type=Cache
children=tags
addr_ranges=2147483648:2415919103
assoc=8
@ -821,9 +821,12 @@ gic=system.realview.gic
int_num=117
pio_addr=721420288
pio_latency=10000
pixel_clock=7299
pixel_buffer_size=2048
pixel_chunk=32
pxl_clk=system.realview.realview_io.osc_pxl
system=system
vnc=system.vncserver
workaround_dma_line_count=true
workaround_swap_rb=true
dma=system.membus.slave[0]
pio=system.iobus.master[5]

14
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing/simout
View file

@ -1,16 +1,18 @@
Redirecting stdout to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-simple-timing/simout
Redirecting stderr to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-simple-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Aug 7 2015 10:13:08
gem5 started Aug 7 2015 11:22:13
gem5 executing on e104799-lin
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-simple-timing -re /work/gem5/outgoing/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-simple-timing
gem5 compiled Sep 14 2015 23:29:19
gem5 started Sep 15 2015 00:24:53
gem5 executing on ribera.cs.wisc.edu
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-simple-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-simple-timing
Selected 64-bit ARM architecture, updating default disk image...
Global frequency set at 1000000000000 ticks per second
info: kernel located at: /work/gem5/dist/binaries/vmlinux.aarch64.20140821
info: kernel located at: /scratch/nilay/GEM5/system/binaries/vmlinux.aarch64.20140821
info: Using bootloader at address 0x10
info: Using kernel entry physical address at 0x80080000
info: Loading DTB file: /work/gem5/dist/binaries/vexpress.aarch64.20140821.dtb at address 0x88000000
info: Loading DTB file: /scratch/nilay/GEM5/system/binaries/vexpress.aarch64.20140821.dtb at address 0x88000000
info: Entering event queue @ 0. Starting simulation...
Exiting @ tick 51832458543500 because m5_exit instruction encountered

14
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing/stats.txt
View file

@ -4,11 +4,11 @@ sim_seconds 51.832459 # Nu
sim_ticks 51832458543500 # Number of ticks simulated
final_tick 51832458543500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 643815 # Simulator instruction rate (inst/s)
host_op_rate 756535 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 37796716864 # Simulator tick rate (ticks/s)
host_mem_usage 668604 # Number of bytes of host memory used
host_seconds 1371.35 # Real time elapsed on the host
host_inst_rate 536175 # Simulator instruction rate (inst/s)
host_op_rate 630049 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 31477440084 # Simulator tick rate (ticks/s)
host_mem_usage 712068 # Number of bytes of host memory used
host_seconds 1646.65 # Real time elapsed on the host
sim_insts 882895003 # Number of instructions simulated
sim_ops 1037473525 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
@ -584,7 +584,7 @@ system.cpu.op_class::IprAccess 0 0.00% 100.00% # Cl
system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
system.cpu.op_class::total 1038060895 # Class of executed instruction
system.cpu.kern.inst.arm 0 # number of arm instructions executed
system.cpu.kern.inst.quiesce 16280 # number of quiesce instructions executed
system.cpu.kern.inst.quiesce 19158 # number of quiesce instructions executed
system.cpu.dcache.tags.replacements 10067650 # number of replacements
system.cpu.dcache.tags.tagsinuse 511.966034 # Cycle average of tags in use
system.cpu.dcache.tags.total_refs 306351638 # Total number of references to valid blocks.
@ -1588,13 +1588,13 @@ system.realview.ethernet.totalRxOrn 0 # to
system.realview.ethernet.coalescedTotal 0 # average number of interrupts coalesced into each post
system.realview.ethernet.postedInterrupts 13 # number of posts to CPU
system.realview.ethernet.droppedPackets 0 # number of packets dropped
system.realview.realview_io.osc_pxl.clock 42105 # Clock period in ticks
system.realview.realview_io.osc_clcd.clock 42105 # Clock period in ticks
system.realview.realview_io.osc_cpu.clock 16667 # Clock period in ticks
system.realview.realview_io.osc_ddr.clock 25000 # Clock period in ticks
system.realview.realview_io.osc_hsbm.clock 25000 # Clock period in ticks
system.realview.realview_io.osc_mcc.clock 20000 # Clock period in ticks
system.realview.realview_io.osc_peripheral.clock 41667 # Clock period in ticks
system.realview.realview_io.osc_pxl.clock 42105 # Clock period in ticks
system.realview.realview_io.osc_smb.clock 20000 # Clock period in ticks
system.realview.realview_io.osc_sys.clock 16667 # Clock period in ticks
system.realview.realview_io.osc_system_bus.clock 41667 # Clock period in ticks

23
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-atomic/config.ini
View file

@ -12,11 +12,11 @@ time_sync_spin_threshold=100000000
type=LinuxArmSystem
children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
atags_addr=134217728
boot_loader=/work/gem5/dist/binaries/boot_emm.arm64
boot_loader=/scratch/nilay/GEM5/system/binaries/boot_emm.arm64
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
cache_line_size=64
clk_domain=system.clk_domain
dtb_filename=/work/gem5/dist/binaries/vexpress.aarch64.20140821.dtb
dtb_filename=/scratch/nilay/GEM5/system/binaries/vexpress.aarch64.20140821.dtb
early_kernel_symbols=false
enable_context_switch_stats_dump=false
eventq_index=0
@ -28,7 +28,7 @@ have_security=false
have_virtualization=false
highest_el_is_64=false
init_param=0
kernel=/work/gem5/dist/binaries/vmlinux.aarch64.20140821
kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.aarch64.20140821
kernel_addr_check=true
load_addr_mask=268435455
load_offset=2147483648
@ -42,7 +42,7 @@ num_work_ids=16
panic_on_oops=true
panic_on_panic=true
phys_addr_range_64=40
readfile=/work/gem5/outgoing/gem5/tests/halt.sh
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
reset_addr_64=0
symbolfile=
work_begin_ckpt_count=0
@ -85,7 +85,7 @@ table_size=65536
[system.cf0.image.child]
type=RawDiskImage
eventq_index=0
image_file=/work/gem5/dist/disks/linaro-minimal-aarch64.img
image_file=/scratch/nilay/GEM5/system/disks/linaro-minimal-aarch64.img
read_only=true
[system.clk_domain]
@ -136,7 +136,7 @@ dcache_port=system.cpu0.dcache.cpu_side
icache_port=system.cpu0.icache.cpu_side
[system.cpu0.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=4
@ -212,7 +212,7 @@ sys=system
port=system.toL2Bus.slave[3]
[system.cpu0.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=1
@ -511,7 +511,7 @@ master=system.realview.uart.pio system.realview.realview_io.pio system.realview.
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
[system.iocache]
type=BaseCache
type=Cache
children=tags
addr_ranges=2147483648:2415919103
assoc=8
@ -546,7 +546,7 @@ sequential_access=false
size=1024
[system.l2c]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8
@ -897,9 +897,12 @@ gic=system.realview.gic
int_num=117
pio_addr=721420288
pio_latency=10000
pixel_clock=7299
pixel_buffer_size=2048
pixel_chunk=32
pxl_clk=system.realview.realview_io.osc_pxl
system=system
vnc=system.vncserver
workaround_dma_line_count=true
workaround_swap_rb=true
dma=system.membus.slave[0]
pio=system.iobus.master[5]

26
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-atomic/stats.txt
View file

@ -4,11 +4,11 @@ sim_seconds 51.111153 # Nu
sim_ticks 51111152682000 # Number of ticks simulated
final_tick 51111152682000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 1034928 # Simulator instruction rate (inst/s)
host_op_rate 1216210 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 53725315382 # Simulator tick rate (ticks/s)
host_mem_usage 668860 # Number of bytes of host memory used
host_seconds 951.34 # Real time elapsed on the host
host_inst_rate 916811 # Simulator instruction rate (inst/s)
host_op_rate 1077403 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 47593586653 # Simulator tick rate (ticks/s)
host_mem_usage 712068 # Number of bytes of host memory used
host_seconds 1073.91 # Real time elapsed on the host
sim_insts 984570519 # Number of instructions simulated
sim_ops 1157031967 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
@ -228,7 +228,7 @@ system.cpu0.itb.inst_accesses 493628912 # IT
system.cpu0.itb.hits 493558289 # DTB hits
system.cpu0.itb.misses 70623 # DTB misses
system.cpu0.itb.accesses 493628912 # DTB accesses
system.cpu0.numCycles 98036732821 # number of cpu cycles simulated
system.cpu0.numCycles 98036734134 # number of cpu cycles simulated
system.cpu0.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu0.numWorkItemsCompleted 0 # number of work items this cpu completed
system.cpu0.committedInsts 493343054 # Number of instructions committed
@ -248,8 +248,8 @@ system.cpu0.num_cc_register_writes 132723498 # nu
system.cpu0.num_mem_refs 176296730 # number of memory refs
system.cpu0.num_load_insts 91967123 # Number of load instructions
system.cpu0.num_store_insts 84329607 # Number of store instructions
system.cpu0.num_idle_cycles 96926191341.047134 # Number of idle cycles
system.cpu0.num_busy_cycles 1110541479.952863 # Number of busy cycles
system.cpu0.num_idle_cycles 96926192639.173721 # Number of idle cycles
system.cpu0.num_busy_cycles 1110541494.826277 # Number of busy cycles
system.cpu0.not_idle_fraction 0.011328 # Percentage of non-idle cycles
system.cpu0.idle_fraction 0.988672 # Percentage of idle cycles
system.cpu0.Branches 110281342 # Number of branches fetched
@ -289,7 +289,7 @@ system.cpu0.op_class::IprAccess 0 0.00% 100.00% # Cl
system.cpu0.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
system.cpu0.op_class::total 579643698 # Class of executed instruction
system.cpu0.kern.inst.arm 0 # number of arm instructions executed
system.cpu0.kern.inst.quiesce 16775 # number of quiesce instructions executed
system.cpu0.kern.inst.quiesce 19653 # number of quiesce instructions executed
system.cpu0.dcache.tags.replacements 11612141 # number of replacements
system.cpu0.dcache.tags.tagsinuse 511.999719 # Cycle average of tags in use
system.cpu0.dcache.tags.total_refs 340775537 # Total number of references to valid blocks.
@ -612,7 +612,7 @@ system.cpu1.itb.inst_accesses 491545246 # IT
system.cpu1.itb.hits 491475383 # DTB hits
system.cpu1.itb.misses 69863 # DTB misses
system.cpu1.itb.accesses 491545246 # DTB accesses
system.cpu1.numCycles 97463064529 # number of cpu cycles simulated
system.cpu1.numCycles 97463066094 # number of cpu cycles simulated
system.cpu1.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu1.numWorkItemsCompleted 0 # number of work items this cpu completed
system.cpu1.committedInsts 491227465 # Number of instructions committed
@ -632,8 +632,8 @@ system.cpu1.num_cc_register_writes 131105905 # nu
system.cpu1.num_mem_refs 176168876 # number of memory refs
system.cpu1.num_load_insts 92213308 # Number of load instructions
system.cpu1.num_store_insts 83955568 # Number of store instructions
system.cpu1.num_idle_cycles 96357044010.669601 # Number of idle cycles
system.cpu1.num_busy_cycles 1106020518.330400 # Number of busy cycles
system.cpu1.num_idle_cycles 96357045557.909821 # Number of idle cycles
system.cpu1.num_busy_cycles 1106020536.090176 # Number of busy cycles
system.cpu1.not_idle_fraction 0.011348 # Percentage of non-idle cycles
system.cpu1.idle_fraction 0.988652 # Percentage of idle cycles
system.cpu1.Branches 109807220 # Number of branches fetched
@ -1080,13 +1080,13 @@ system.realview.ethernet.totalRxOrn 0 # to
system.realview.ethernet.coalescedTotal 0 # average number of interrupts coalesced into each post
system.realview.ethernet.postedInterrupts 18 # number of posts to CPU
system.realview.ethernet.droppedPackets 0 # number of packets dropped
system.realview.realview_io.osc_pxl.clock 42105 # Clock period in ticks
system.realview.realview_io.osc_clcd.clock 42105 # Clock period in ticks
system.realview.realview_io.osc_cpu.clock 16667 # Clock period in ticks
system.realview.realview_io.osc_ddr.clock 25000 # Clock period in ticks
system.realview.realview_io.osc_hsbm.clock 25000 # Clock period in ticks
system.realview.realview_io.osc_mcc.clock 20000 # Clock period in ticks
system.realview.realview_io.osc_peripheral.clock 41667 # Clock period in ticks
system.realview.realview_io.osc_pxl.clock 42105 # Clock period in ticks
system.realview.realview_io.osc_smb.clock 20000 # Clock period in ticks
system.realview.realview_io.osc_sys.clock 16667 # Clock period in ticks
system.realview.realview_io.osc_system_bus.clock 41667 # Clock period in ticks

23
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/config.ini
View file

@ -12,11 +12,11 @@ time_sync_spin_threshold=100000000
type=LinuxArmSystem
children=bridge cf0 clk_domain cpu0 cpu1 cpu2 cpu3 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
atags_addr=134217728
boot_loader=/work/gem5/dist/binaries/boot_emm.arm64
boot_loader=/scratch/nilay/GEM5/system/binaries/boot_emm.arm64
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
cache_line_size=64
clk_domain=system.clk_domain
dtb_filename=/work/gem5/dist/binaries/vexpress.aarch64.20140821.dtb
dtb_filename=/scratch/nilay/GEM5/system/binaries/vexpress.aarch64.20140821.dtb
early_kernel_symbols=false
enable_context_switch_stats_dump=false
eventq_index=0
@ -28,7 +28,7 @@ have_security=false
have_virtualization=false
highest_el_is_64=false
init_param=0
kernel=/work/gem5/dist/binaries/vmlinux.aarch64.20140821
kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.aarch64.20140821
kernel_addr_check=true
load_addr_mask=268435455
load_offset=2147483648
@ -42,7 +42,7 @@ num_work_ids=16
panic_on_oops=true
panic_on_panic=true
phys_addr_range_64=40
readfile=/work/gem5/outgoing/gem5/tests/halt.sh
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
reset_addr_64=0
symbolfile=
work_begin_ckpt_count=0
@ -85,7 +85,7 @@ table_size=65536
[system.cf0.image.child]
type=RawDiskImage
eventq_index=0
image_file=/work/gem5/dist/disks/linaro-minimal-aarch64.img
image_file=/scratch/nilay/GEM5/system/disks/linaro-minimal-aarch64.img
read_only=true
[system.clk_domain]
@ -136,7 +136,7 @@ dcache_port=system.cpu0.dcache.cpu_side
icache_port=system.cpu0.icache.cpu_side
[system.cpu0.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=4
@ -212,7 +212,7 @@ sys=system
port=system.toL2Bus.slave[3]
[system.cpu0.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=1
@ -1610,7 +1610,7 @@ master=system.realview.uart.pio system.realview.realview_io.pio system.realview.
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
[system.iocache]
type=BaseCache
type=Cache
children=tags
addr_ranges=2147483648:2415919103
assoc=8
@ -1645,7 +1645,7 @@ sequential_access=false
size=1024
[system.l2c]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8
@ -2060,9 +2060,12 @@ gic=system.realview.gic
int_num=117
pio_addr=721420288
pio_latency=10000
pixel_clock=7299
pixel_buffer_size=2048
pixel_chunk=32
pxl_clk=system.realview.realview_io.osc_pxl
system=system
vnc=system.vncserver
workaround_dma_line_count=true
workaround_swap_rb=true
dma=system.membus.slave[0]
pio=system.iobus.master[5]

1812
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/simerr
View file

File diff suppressed because it is too large Load diff

5116
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/stats.txt
View file

File diff suppressed because it is too large Load diff

23
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-o3/config.ini
View file

@ -12,11 +12,11 @@ time_sync_spin_threshold=100000000
type=LinuxArmSystem
children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
atags_addr=134217728
boot_loader=/work/gem5/dist/binaries/boot_emm.arm64
boot_loader=/scratch/nilay/GEM5/system/binaries/boot_emm.arm64
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
cache_line_size=64
clk_domain=system.clk_domain
dtb_filename=/work/gem5/dist/binaries/vexpress.aarch64.20140821.dtb
dtb_filename=/scratch/nilay/GEM5/system/binaries/vexpress.aarch64.20140821.dtb
early_kernel_symbols=false
enable_context_switch_stats_dump=false
eventq_index=0
@ -28,7 +28,7 @@ have_security=false
have_virtualization=false
highest_el_is_64=false
init_param=0
kernel=/work/gem5/dist/binaries/vmlinux.aarch64.20140821
kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.aarch64.20140821
kernel_addr_check=true
load_addr_mask=268435455
load_offset=2147483648
@ -42,7 +42,7 @@ num_work_ids=16
panic_on_oops=true
panic_on_panic=true
phys_addr_range_64=40
readfile=/work/gem5/outgoing/gem5/tests/halt.sh
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
reset_addr_64=0
symbolfile=
work_begin_ckpt_count=0
@ -85,7 +85,7 @@ table_size=65536
[system.cf0.image.child]
type=RawDiskImage
eventq_index=0
image_file=/work/gem5/dist/disks/linaro-minimal-aarch64.img
image_file=/scratch/nilay/GEM5/system/disks/linaro-minimal-aarch64.img
read_only=true
[system.clk_domain]
@ -204,7 +204,7 @@ localPredictorSize=2048
numThreads=1
[system.cpu0.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=4
@ -587,7 +587,7 @@ opLat=3
pipelined=false
[system.cpu0.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=1
@ -1261,7 +1261,7 @@ master=system.realview.uart.pio system.realview.realview_io.pio system.realview.
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
[system.iocache]
type=BaseCache
type=Cache
children=tags
addr_ranges=2147483648:2415919103
assoc=8
@ -1296,7 +1296,7 @@ sequential_access=false
size=1024
[system.l2c]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8
@ -1711,9 +1711,12 @@ gic=system.realview.gic
int_num=117
pio_addr=721420288
pio_latency=10000
pixel_clock=7299
pixel_buffer_size=2048
pixel_chunk=32
pxl_clk=system.realview.realview_io.osc_pxl
system=system
vnc=system.vncserver
workaround_dma_line_count=true
workaround_swap_rb=true
dma=system.membus.slave[0]
pio=system.iobus.master[5]

4247
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-o3/stats.txt
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File diff suppressed because it is too large Load diff

23
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-timing/config.ini
View file

@ -12,11 +12,11 @@ time_sync_spin_threshold=100000000
type=LinuxArmSystem
children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
atags_addr=134217728
boot_loader=/work/gem5/dist/binaries/boot_emm.arm64
boot_loader=/scratch/nilay/GEM5/system/binaries/boot_emm.arm64
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
cache_line_size=64
clk_domain=system.clk_domain
dtb_filename=/work/gem5/dist/binaries/vexpress.aarch64.20140821.dtb
dtb_filename=/scratch/nilay/GEM5/system/binaries/vexpress.aarch64.20140821.dtb
early_kernel_symbols=false
enable_context_switch_stats_dump=false
eventq_index=0
@ -28,7 +28,7 @@ have_security=false
have_virtualization=false
highest_el_is_64=false
init_param=0
kernel=/work/gem5/dist/binaries/vmlinux.aarch64.20140821
kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.aarch64.20140821
kernel_addr_check=true
load_addr_mask=268435455
load_offset=2147483648
@ -42,7 +42,7 @@ num_work_ids=16
panic_on_oops=true
panic_on_panic=true
phys_addr_range_64=40
readfile=/work/gem5/outgoing/gem5/tests/halt.sh
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
reset_addr_64=0
symbolfile=
work_begin_ckpt_count=0
@ -85,7 +85,7 @@ table_size=65536
[system.cf0.image.child]
type=RawDiskImage
eventq_index=0
image_file=/work/gem5/dist/disks/linaro-minimal-aarch64.img
image_file=/scratch/nilay/GEM5/system/disks/linaro-minimal-aarch64.img
read_only=true
[system.clk_domain]
@ -132,7 +132,7 @@ dcache_port=system.cpu0.dcache.cpu_side
icache_port=system.cpu0.icache.cpu_side
[system.cpu0.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=4
@ -208,7 +208,7 @@ sys=system
port=system.toL2Bus.slave[3]
[system.cpu0.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=1
@ -503,7 +503,7 @@ master=system.realview.uart.pio system.realview.realview_io.pio system.realview.
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
[system.iocache]
type=BaseCache
type=Cache
children=tags
addr_ranges=2147483648:2415919103
assoc=8
@ -538,7 +538,7 @@ sequential_access=false
size=1024
[system.l2c]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8
@ -953,9 +953,12 @@ gic=system.realview.gic
int_num=117
pio_addr=721420288
pio_latency=10000
pixel_clock=7299
pixel_buffer_size=2048
pixel_chunk=32
pxl_clk=system.realview.realview_io.osc_pxl
system=system
vnc=system.vncserver
workaround_dma_line_count=true
workaround_swap_rb=true
dma=system.membus.slave[0]
pio=system.iobus.master[5]

14
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-timing/stats.txt
View file

@ -4,11 +4,11 @@ sim_seconds 51.832615 # Nu
sim_ticks 51832614542500 # Number of ticks simulated
final_tick 51832614542500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 636228 # Simulator instruction rate (inst/s)
host_op_rate 747615 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 37416431352 # Simulator tick rate (ticks/s)
host_mem_usage 669888 # Number of bytes of host memory used
host_seconds 1385.29 # Real time elapsed on the host
host_inst_rate 536275 # Simulator instruction rate (inst/s)
host_op_rate 630162 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 31538205227 # Simulator tick rate (ticks/s)
host_mem_usage 713092 # Number of bytes of host memory used
host_seconds 1643.49 # Real time elapsed on the host
sim_insts 881360160 # Number of instructions simulated
sim_ops 1035663034 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
@ -599,7 +599,7 @@ system.cpu0.op_class::IprAccess 0 0.00% 100.00% # Cl
system.cpu0.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
system.cpu0.op_class::total 518072849 # Class of executed instruction
system.cpu0.kern.inst.arm 0 # number of arm instructions executed
system.cpu0.kern.inst.quiesce 16267 # number of quiesce instructions executed
system.cpu0.kern.inst.quiesce 19145 # number of quiesce instructions executed
system.cpu0.dcache.tags.replacements 10037940 # number of replacements
system.cpu0.dcache.tags.tagsinuse 511.966034 # Cycle average of tags in use
system.cpu0.dcache.tags.total_refs 305864730 # Total number of references to valid blocks.
@ -2119,13 +2119,13 @@ system.realview.ethernet.totalRxOrn 0 # to
system.realview.ethernet.coalescedTotal 0 # average number of interrupts coalesced into each post
system.realview.ethernet.postedInterrupts 18 # number of posts to CPU
system.realview.ethernet.droppedPackets 0 # number of packets dropped
system.realview.realview_io.osc_pxl.clock 42105 # Clock period in ticks
system.realview.realview_io.osc_clcd.clock 42105 # Clock period in ticks
system.realview.realview_io.osc_cpu.clock 16667 # Clock period in ticks
system.realview.realview_io.osc_ddr.clock 25000 # Clock period in ticks
system.realview.realview_io.osc_hsbm.clock 25000 # Clock period in ticks
system.realview.realview_io.osc_mcc.clock 20000 # Clock period in ticks
system.realview.realview_io.osc_peripheral.clock 41667 # Clock period in ticks
system.realview.realview_io.osc_pxl.clock 42105 # Clock period in ticks
system.realview.realview_io.osc_smb.clock 20000 # Clock period in ticks
system.realview.realview_io.osc_sys.clock 16667 # Clock period in ticks
system.realview.realview_io.osc_system_bus.clock 41667 # Clock period in ticks

20
tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/config.ini
View file

@ -20,7 +20,7 @@ eventq_index=0
init_param=0
intel_mp_pointer=system.intel_mp_pointer
intel_mp_table=system.intel_mp_table
kernel=/work/gem5/dist/binaries/x86_64-vmlinux-2.6.22.9
kernel=/scratch/nilay/GEM5/system/binaries/x86_64-vmlinux-2.6.22.9
kernel_addr_check=true
load_addr_mask=18446744073709551615
load_offset=0
@ -29,7 +29,7 @@ mem_ranges=0:134217727
memories=system.physmem
mmap_using_noreserve=false
num_work_ids=16
readfile=/work/gem5/outgoing/gem5/tests/halt.sh
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
smbios_table=system.smbios_table
symbolfile=
work_begin_ckpt_count=0
@ -202,7 +202,7 @@ localPredictorSize=2048
numThreads=1
[system.cpu.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=4
@ -252,7 +252,7 @@ system=system
port=system.cpu.dtb_walker_cache.cpu_side
[system.cpu.dtb_walker_cache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -594,7 +594,7 @@ opLat=3
pipelined=false
[system.cpu.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=1
@ -660,7 +660,7 @@ system=system
port=system.cpu.itb_walker_cache.cpu_side
[system.cpu.itb_walker_cache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -695,7 +695,7 @@ sequential_access=false
size=1024
[system.cpu.l2cache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8
@ -1202,7 +1202,7 @@ master=system.apicbridge.slave system.pc.south_bridge.cmos.pio system.pc.south_b
slave=system.bridge.master system.pc.south_bridge.ide.dma system.pc.south_bridge.io_apic.int_master
[system.iocache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:134217727
assoc=8
@ -1586,7 +1586,7 @@ table_size=65536
[system.pc.south_bridge.ide.disks0.image.child]
type=RawDiskImage
eventq_index=0
image_file=/work/gem5/dist/disks/linux-x86.img
image_file=/scratch/nilay/GEM5/system/disks/linux-x86.img
read_only=true
[system.pc.south_bridge.ide.disks1]
@ -1609,7 +1609,7 @@ table_size=65536
[system.pc.south_bridge.ide.disks1.image.child]
type=RawDiskImage
eventq_index=0
image_file=/work/gem5/dist/disks/linux-bigswap2.img
image_file=/scratch/nilay/GEM5/system/disks/linux-bigswap2.img
read_only=true
[system.pc.south_bridge.int_lines0]

2567
tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/stats.txt
View file

File diff suppressed because it is too large Load diff

16
tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/config.ini
View file

@ -20,7 +20,7 @@ eventq_index=0
init_param=0
intel_mp_pointer=system.intel_mp_pointer
intel_mp_table=system.intel_mp_table
kernel=/work/gem5/dist/binaries/x86_64-vmlinux-2.6.22.9
kernel=/scratch/nilay/GEM5/system/binaries/x86_64-vmlinux-2.6.22.9
kernel_addr_check=true
load_addr_mask=18446744073709551615
load_offset=0
@ -29,7 +29,7 @@ mem_ranges=0:134217727
memories=system.physmem
mmap_using_noreserve=false
num_work_ids=16
readfile=/work/gem5/outgoing/gem5/tests/halt.sh
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
smbios_table=system.smbios_table
symbolfile=
work_begin_ckpt_count=0
@ -134,7 +134,7 @@ clk_domain=system.cpu_clk_domain
eventq_index=0
[system.cpu0.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=4
@ -184,7 +184,7 @@ system=system
port=system.toL2Bus.slave[3]
[system.cpu0.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=1
@ -1220,7 +1220,7 @@ master=system.apicbridge.slave system.pc.south_bridge.cmos.pio system.pc.south_b
slave=system.bridge.master system.pc.south_bridge.ide.dma system.pc.south_bridge.io_apic.int_master
[system.iocache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:134217727
assoc=8
@ -1255,7 +1255,7 @@ sequential_access=false
size=1024
[system.l2c]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8
@ -1639,7 +1639,7 @@ table_size=65536
[system.pc.south_bridge.ide.disks0.image.child]
type=RawDiskImage
eventq_index=0
image_file=/work/gem5/dist/disks/linux-x86.img
image_file=/scratch/nilay/GEM5/system/disks/linux-x86.img
read_only=true
[system.pc.south_bridge.ide.disks1]
@ -1662,7 +1662,7 @@ table_size=65536
[system.pc.south_bridge.ide.disks1.image.child]
type=RawDiskImage
eventq_index=0
image_file=/work/gem5/dist/disks/linux-bigswap2.img
image_file=/scratch/nilay/GEM5/system/disks/linux-bigswap2.img
read_only=true
[system.pc.south_bridge.int_lines0]

24
tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/config.json
View file

@ -2,7 +2,7 @@
"name": null,
"sim_quantum": 0,
"system": {
"kernel": "/work/gem5/dist/binaries/x86_64-vmlinux-2.6.22.9",
"kernel": "/scratch/nilay/GEM5/system/binaries/x86_64-vmlinux-2.6.22.9",
"mmap_using_noreserve": false,
"kernel_addr_check": true,
"bridge": {
@ -111,7 +111,7 @@
"clk_domain": "system.cpu_clk_domain",
"write_buffers": 8,
"response_latency": 20,
"cxx_class": "BaseCache",
"cxx_class": "Cache",
"size": 4194304,
"tags": {
"name": "tags",
@ -145,11 +145,11 @@
"prefetch_on_access": false,
"path": "system.l2c",
"name": "l2c",
"type": "BaseCache",
"type": "Cache",
"sequential_access": false,
"assoc": 8
},
"readfile": "/work/gem5/outgoing/gem5/tests/halt.sh",
"readfile": "/scratch/nilay/GEM5/gem5/tests/halt.sh",
"intel_mp_table": {
"oem_table_addr": 0,
"name": "intel_mp_table",
@ -638,7 +638,7 @@
"clk_domain": "system.clk_domain",
"write_buffers": 8,
"response_latency": 50,
"cxx_class": "BaseCache",
"cxx_class": "Cache",
"size": 1024,
"tags": {
"name": "tags",
@ -672,7 +672,7 @@
"prefetch_on_access": false,
"path": "system.iocache",
"name": "iocache",
"type": "BaseCache",
"type": "Cache",
"sequential_access": false,
"assoc": 8
},
@ -1183,7 +1183,7 @@
"eventq_index": 0,
"cxx_class": "RawDiskImage",
"path": "system.pc.south_bridge.ide.disks0.image.child",
"image_file": "/work/gem5/dist/disks/linux-x86.img",
"image_file": "/scratch/nilay/GEM5/system/disks/linux-x86.img",
"type": "RawDiskImage"
},
"path": "system.pc.south_bridge.ide.disks0.image",
@ -1211,7 +1211,7 @@
"eventq_index": 0,
"cxx_class": "RawDiskImage",
"path": "system.pc.south_bridge.ide.disks1.image.child",
"image_file": "/work/gem5/dist/disks/linux-bigswap2.img",
"image_file": "/scratch/nilay/GEM5/system/disks/linux-bigswap2.img",
"type": "RawDiskImage"
},
"path": "system.pc.south_bridge.ide.disks1.image",
@ -1797,7 +1797,7 @@
"clk_domain": "system.cpu_clk_domain",
"write_buffers": 8,
"response_latency": 2,
"cxx_class": "BaseCache",
"cxx_class": "Cache",
"size": 32768,
"tags": {
"name": "tags",
@ -1831,7 +1831,7 @@
"prefetch_on_access": false,
"path": "system.cpu0.icache",
"name": "icache",
"type": "BaseCache",
"type": "Cache",
"sequential_access": false,
"assoc": 1
},
@ -1906,7 +1906,7 @@
"clk_domain": "system.cpu_clk_domain",
"write_buffers": 8,
"response_latency": 2,
"cxx_class": "BaseCache",
"cxx_class": "Cache",
"size": 32768,
"tags": {
"name": "tags",
@ -1940,7 +1940,7 @@
"prefetch_on_access": false,
"path": "system.cpu0.dcache",
"name": "dcache",
"type": "BaseCache",
"type": "Cache",
"sequential_access": false,
"assoc": 4
},

51
tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/simerr
View file

@ -4,6 +4,7 @@ warn: Sockets disabled, not accepting gdb connections
warn: Reading current count from inactive timer.
warn: Don't know what interrupt to clear for console.
warn: x86 cpuid: unknown family 0xbacc
warn: x86 cpuid: unknown family 0xbacc
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: One or more banks are active! REF requires all banks to be precharged.
@ -21,24 +22,14 @@ WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: Bank is already active!
Command: 0, Timestamp: 6448, Bank: 6
WARNING: Bank is already active!
Command: 0, Timestamp: 7107, Bank: 0
WARNING: Bank is already active!
Command: 0, Timestamp: 12359, Bank: 3
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: Bank is already active!
Command: 0, Timestamp: 10565, Bank: 5
WARNING: Bank is already active!
Command: 0, Timestamp: 7170, Bank: 1
Command: 0, Timestamp: 7191, Bank: 0
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: Bank is already active!
Command: 0, Timestamp: 6448, Bank: 2
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: One or more banks are active! REF requires all banks to be precharged.
@ -52,7 +43,27 @@ Command: 4, Timestamp: 12458, Bank: 0
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: Bank is already active!
Command: 0, Timestamp: 7090, Bank: 1
Command: 0, Timestamp: 6675, Bank: 2
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: Bank is already active!
Command: 0, Timestamp: 6767, Bank: 1
WARNING: Bank is already active!
Command: 0, Timestamp: 6921, Bank: 6
WARNING: Bank is already active!
Command: 0, Timestamp: 11289, Bank: 4
WARNING: Bank is already active!
Command: 0, Timestamp: 7232, Bank: 3
WARNING: Bank is already active!
Command: 0, Timestamp: 11338, Bank: 4
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: One or more banks are active! REF requires all banks to be precharged.
@ -83,20 +94,12 @@ Command: 4, Timestamp: 12458, Bank: 0
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
warn: Unknown mouse command 0xe1.
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
warn: instruction 'wbinvd' unimplemented
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: Bank is already active!
Command: 0, Timestamp: 7075, Bank: 7
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: Bank is already active!
Command: 0, Timestamp: 10421, Bank: 2
Command: 0, Timestamp: 6474, Bank: 4
WARNING: Bank is already active!
Command: 0, Timestamp: 9326, Bank: 7
WARNING: One or more banks are active! REF requires all banks to be precharged.
Command: 4, Timestamp: 12458, Bank: 0
WARNING: Bank is already active!
Command: 0, Timestamp: 6448, Bank: 0
WARNING: Bank is already active!
Command: 0, Timestamp: 6590, Bank: 6
Command: 0, Timestamp: 6837, Bank: 6

3212
tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/stats.txt
View file

File diff suppressed because it is too large Load diff

2
tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/system.pc.com_1.terminal
View file

@ -46,7 +46,7 @@ ACPI: Core revision 20070126
ACPI Exception (tbxface-0618): AE_NO_ACPI_TABLES, While loading namespace from ACPI tables [20070126]
ACPI: Unable to load the System Description Tables
Using local APIC timer interrupts.
result 7812519
result 7812539
Detected 7.812 MHz APIC timer.
NET: Registered protocol family 16
PCI: Using configuration type 1

22
tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/config.json
View file

@ -3,6 +3,7 @@
"sim_quantum": 0,
"system": {
"kernel": "",
"mmap_using_noreserve": false,
"kernel_addr_check": true,
"rom": {
"range": "1099243192320:1099251580927",
@ -57,9 +58,9 @@
"role": "SLAVE"
},
"name": "iobus",
"forward_latency": 1,
"clk_domain": "system.clk_domain",
"header_cycles": 1,
"width": 8,
"width": 16,
"eventq_index": 0,
"master": {
"peer": [
@ -81,10 +82,12 @@
],
"role": "MASTER"
},
"response_latency": 2,
"cxx_class": "NoncoherentXBar",
"path": "system.iobus",
"type": "NoncoherentXBar",
"use_default_range": false
"use_default_range": false,
"frontend_latency": 2
},
"t1000": {
"htod": {
@ -484,11 +487,11 @@
"work_end_ckpt_count": 0,
"nvram_addr": 133429198848,
"memories": [
"system.nvram",
"system.physmem1",
"system.hypervisor_desc",
"system.nvram",
"system.partition_desc",
"system.physmem0",
"system.physmem1",
"system.rom"
],
"work_begin_ckpt_count": 0,
@ -582,10 +585,10 @@
"ret_data16": 65535
},
"snoop_filter": null,
"forward_latency": 4,
"clk_domain": "system.clk_domain",
"header_cycles": 1,
"system": "system",
"width": 8,
"width": 16,
"eventq_index": 0,
"master": {
"peer": [
@ -601,10 +604,13 @@
],
"role": "MASTER"
},
"response_latency": 2,
"cxx_class": "CoherentXBar",
"path": "system.membus",
"snoop_response_latency": 4,
"type": "CoherentXBar",
"use_default_range": false
"use_default_range": false,
"frontend_latency": 3
},
"nvram": {
"range": "133429198848:133429207039",

6
tests/long/se/10.mcf/ref/arm/linux/minor-timing/config.ini
View file

@ -127,7 +127,7 @@ localPredictorSize=2048
numThreads=1
[system.cpu.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -586,7 +586,7 @@ eventq_index=0
opClass=InstPrefetch
[system.cpu.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -696,7 +696,7 @@ sys=system
port=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8

14
tests/long/se/10.mcf/ref/arm/linux/minor-timing/simout
View file

@ -1,12 +1,14 @@
Redirecting stdout to build/ARM/tests/opt/long/se/10.mcf/arm/linux/minor-timing/simout
Redirecting stderr to build/ARM/tests/opt/long/se/10.mcf/arm/linux/minor-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Mar 15 2015 20:30:55
gem5 started Mar 15 2015 20:31:14
gem5 executing on zizzer2
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/10.mcf/arm/linux/minor-timing -re /z/stever/hg/gem5/tests/run.py build/ARM/tests/opt/long/se/10.mcf/arm/linux/minor-timing
gem5 compiled Sep 14 2015 23:29:19
gem5 started Sep 15 2015 02:29:01
gem5 executing on ribera.cs.wisc.edu
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/10.mcf/arm/linux/minor-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/long/se/10.mcf/arm/linux/minor-timing
Global frequency set at 1000000000000 ticks per second
0: system.cpu.isa: ISA system set to: 0 0x45a0240
info: Entering event queue @ 0. Starting simulation...
MCF SPEC version 1.6.I
@ -24,4 +26,4 @@ simplex iterations : 2663
flow value : 3080014995
checksum : 68389
optimal
Exiting @ tick 61589191500 because target called exit()
Exiting @ tick 61240850500 because target called exit()

654
tests/long/se/10.mcf/ref/arm/linux/minor-timing/stats.txt
View file

@ -1,14 +1,14 @@
---------- Begin Simulation Statistics ----------
sim_seconds 0.061280 # Number of seconds simulated
sim_ticks 61279840500 # Number of ticks simulated
final_tick 61279840500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_seconds 0.061241 # Number of seconds simulated
sim_ticks 61240850500 # Number of ticks simulated
final_tick 61240850500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 263178 # Simulator instruction rate (inst/s)
host_op_rate 264489 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 178002192 # Simulator tick rate (ticks/s)
host_mem_usage 447788 # Number of bytes of host memory used
host_seconds 344.26 # Real time elapsed on the host
host_inst_rate 182783 # Simulator instruction rate (inst/s)
host_op_rate 183693 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 123547949 # Simulator tick rate (ticks/s)
host_mem_usage 442472 # Number of bytes of host memory used
host_seconds 495.69 # Real time elapsed on the host
sim_insts 90602850 # Number of instructions simulated
sim_ops 91054081 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
@ -21,14 +21,14 @@ system.physmem.bytes_inst_read::total 49536 # Nu
system.physmem.num_reads::cpu.inst 774 # Number of read requests responded to by this memory
system.physmem.num_reads::cpu.data 14800 # Number of read requests responded to by this memory
system.physmem.num_reads::total 15574 # Number of read requests responded to by this memory
system.physmem.bw_read::cpu.inst 808357 # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::cpu.data 15456959 # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::total 16265316 # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_inst_read::cpu.inst 808357 # Instruction read bandwidth from this memory (bytes/s)
system.physmem.bw_inst_read::total 808357 # Instruction read bandwidth from this memory (bytes/s)
system.physmem.bw_total::cpu.inst 808357 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu.data 15456959 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::total 16265316 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_read::cpu.inst 808872 # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::cpu.data 15466800 # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::total 16275672 # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_inst_read::cpu.inst 808872 # Instruction read bandwidth from this memory (bytes/s)
system.physmem.bw_inst_read::total 808872 # Instruction read bandwidth from this memory (bytes/s)
system.physmem.bw_total::cpu.inst 808872 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu.data 15466800 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::total 16275672 # Total bandwidth to/from this memory (bytes/s)
system.physmem.readReqs 15574 # Number of read requests accepted
system.physmem.writeReqs 0 # Number of write requests accepted
system.physmem.readBursts 15574 # Number of DRAM read bursts, including those serviced by the write queue
@ -75,7 +75,7 @@ system.physmem.perBankWrBursts::14 0 # Pe
system.physmem.perBankWrBursts::15 0 # Per bank write bursts
system.physmem.numRdRetry 0 # Number of times read queue was full causing retry
system.physmem.numWrRetry 0 # Number of times write queue was full causing retry
system.physmem.totGap 61279747000 # Total gap between requests
system.physmem.totGap 61240757000 # Total gap between requests
system.physmem.readPktSize::0 0 # Read request sizes (log2)
system.physmem.readPktSize::1 0 # Read request sizes (log2)
system.physmem.readPktSize::2 0 # Read request sizes (log2)
@ -186,29 +186,29 @@ system.physmem.wrQLenPdf::60 0 # Wh
system.physmem.wrQLenPdf::61 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::62 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::63 0 # What write queue length does an incoming req see
system.physmem.bytesPerActivate::samples 1531 # Bytes accessed per row activation
system.physmem.bytesPerActivate::mean 650.032658 # Bytes accessed per row activation
system.physmem.bytesPerActivate::gmean 444.829113 # Bytes accessed per row activation
system.physmem.bytesPerActivate::stdev 399.661041 # Bytes accessed per row activation
system.physmem.bytesPerActivate::0-127 243 15.87% 15.87% # Bytes accessed per row activation
system.physmem.bytesPerActivate::128-255 186 12.15% 28.02% # Bytes accessed per row activation
system.physmem.bytesPerActivate::256-383 73 4.77% 32.79% # Bytes accessed per row activation
system.physmem.bytesPerActivate::384-511 65 4.25% 37.03% # Bytes accessed per row activation
system.physmem.bytesPerActivate::512-639 75 4.90% 41.93% # Bytes accessed per row activation
system.physmem.bytesPerActivate::640-767 100 6.53% 48.47% # Bytes accessed per row activation
system.physmem.bytesPerActivate::768-895 43 2.81% 51.27% # Bytes accessed per row activation
system.physmem.bytesPerActivate::896-1023 51 3.33% 54.60% # Bytes accessed per row activation
system.physmem.bytesPerActivate::1024-1151 695 45.40% 100.00% # Bytes accessed per row activation
system.physmem.bytesPerActivate::total 1531 # Bytes accessed per row activation
system.physmem.totQLat 71795500 # Total ticks spent queuing
system.physmem.totMemAccLat 363808000 # Total ticks spent from burst creation until serviced by the DRAM
system.physmem.bytesPerActivate::samples 1544 # Bytes accessed per row activation
system.physmem.bytesPerActivate::mean 644.601036 # Bytes accessed per row activation
system.physmem.bytesPerActivate::gmean 438.502120 # Bytes accessed per row activation
system.physmem.bytesPerActivate::stdev 402.393837 # Bytes accessed per row activation
system.physmem.bytesPerActivate::0-127 247 16.00% 16.00% # Bytes accessed per row activation
system.physmem.bytesPerActivate::128-255 189 12.24% 28.24% # Bytes accessed per row activation
system.physmem.bytesPerActivate::256-383 92 5.96% 34.20% # Bytes accessed per row activation
system.physmem.bytesPerActivate::384-511 68 4.40% 38.60% # Bytes accessed per row activation
system.physmem.bytesPerActivate::512-639 69 4.47% 43.07% # Bytes accessed per row activation
system.physmem.bytesPerActivate::640-767 87 5.63% 48.70% # Bytes accessed per row activation
system.physmem.bytesPerActivate::768-895 40 2.59% 51.30% # Bytes accessed per row activation
system.physmem.bytesPerActivate::896-1023 47 3.04% 54.34% # Bytes accessed per row activation
system.physmem.bytesPerActivate::1024-1151 705 45.66% 100.00% # Bytes accessed per row activation
system.physmem.bytesPerActivate::total 1544 # Bytes accessed per row activation
system.physmem.totQLat 73458500 # Total ticks spent queuing
system.physmem.totMemAccLat 365471000 # Total ticks spent from burst creation until serviced by the DRAM
system.physmem.totBusLat 77870000 # Total ticks spent in databus transfers
system.physmem.avgQLat 4609.96 # Average queueing delay per DRAM burst
system.physmem.avgQLat 4716.74 # Average queueing delay per DRAM burst
system.physmem.avgBusLat 5000.00 # Average bus latency per DRAM burst
system.physmem.avgMemAccLat 23359.96 # Average memory access latency per DRAM burst
system.physmem.avgRdBW 16.27 # Average DRAM read bandwidth in MiByte/s
system.physmem.avgMemAccLat 23466.74 # Average memory access latency per DRAM burst
system.physmem.avgRdBW 16.28 # Average DRAM read bandwidth in MiByte/s
system.physmem.avgWrBW 0.00 # Average achieved write bandwidth in MiByte/s
system.physmem.avgRdBWSys 16.27 # Average system read bandwidth in MiByte/s
system.physmem.avgRdBWSys 16.28 # Average system read bandwidth in MiByte/s
system.physmem.avgWrBWSys 0.00 # Average system write bandwidth in MiByte/s
system.physmem.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s
system.physmem.busUtil 0.13 # Data bus utilization in percentage
@ -216,48 +216,48 @@ system.physmem.busUtilRead 0.13 # Da
system.physmem.busUtilWrite 0.00 # Data bus utilization in percentage for writes
system.physmem.avgRdQLen 1.00 # Average read queue length when enqueuing
system.physmem.avgWrQLen 0.00 # Average write queue length when enqueuing
system.physmem.readRowHits 14039 # Number of row buffer hits during reads
system.physmem.readRowHits 14026 # Number of row buffer hits during reads
system.physmem.writeRowHits 0 # Number of row buffer hits during writes
system.physmem.readRowHitRate 90.14 # Row buffer hit rate for reads
system.physmem.readRowHitRate 90.06 # Row buffer hit rate for reads
system.physmem.writeRowHitRate nan # Row buffer hit rate for writes
system.physmem.avgGap 3934746.82 # Average gap between requests
system.physmem.pageHitRate 90.14 # Row buffer hit rate, read and write combined
system.physmem_0.actEnergy 6259680 # Energy for activate commands per rank (pJ)
system.physmem_0.preEnergy 3415500 # Energy for precharge commands per rank (pJ)
system.physmem_0.readEnergy 63772800 # Energy for read commands per rank (pJ)
system.physmem.avgGap 3932243.29 # Average gap between requests
system.physmem.pageHitRate 90.06 # Row buffer hit rate, read and write combined
system.physmem_0.actEnergy 6305040 # Energy for activate commands per rank (pJ)
system.physmem_0.preEnergy 3440250 # Energy for precharge commands per rank (pJ)
system.physmem_0.readEnergy 63780600 # Energy for read commands per rank (pJ)
system.physmem_0.writeEnergy 0 # Energy for write commands per rank (pJ)
system.physmem_0.refreshEnergy 4002367200 # Energy for refresh commands per rank (pJ)
system.physmem_0.actBackEnergy 2491685460 # Energy for active background per rank (pJ)
system.physmem_0.preBackEnergy 34581139500 # Energy for precharge background per rank (pJ)
system.physmem_0.totalEnergy 41148640140 # Total energy per rank (pJ)
system.physmem_0.averagePower 671.507037 # Core power per rank (mW)
system.physmem_0.memoryStateTime::IDLE 57518843500 # Time in different power states
system.physmem_0.memoryStateTime::REF 2046200000 # Time in different power states
system.physmem_0.refreshEnergy 3999824400 # Energy for refresh commands per rank (pJ)
system.physmem_0.actBackEnergy 2494978920 # Energy for active background per rank (pJ)
system.physmem_0.preBackEnergy 34554891750 # Energy for precharge background per rank (pJ)
system.physmem_0.totalEnergy 41123220960 # Total energy per rank (pJ)
system.physmem_0.averagePower 671.518851 # Core power per rank (mW)
system.physmem_0.memoryStateTime::IDLE 57475186750 # Time in different power states
system.physmem_0.memoryStateTime::REF 2044900000 # Time in different power states
system.physmem_0.memoryStateTime::PRE_PDN 0 # Time in different power states
system.physmem_0.memoryStateTime::ACT 1713017750 # Time in different power states
system.physmem_0.memoryStateTime::ACT 1719043250 # Time in different power states
system.physmem_0.memoryStateTime::ACT_PDN 0 # Time in different power states
system.physmem_1.actEnergy 5314680 # Energy for activate commands per rank (pJ)
system.physmem_1.preEnergy 2899875 # Energy for precharge commands per rank (pJ)
system.physmem_1.actEnergy 5367600 # Energy for activate commands per rank (pJ)
system.physmem_1.preEnergy 2928750 # Energy for precharge commands per rank (pJ)
system.physmem_1.readEnergy 57517200 # Energy for read commands per rank (pJ)
system.physmem_1.writeEnergy 0 # Energy for write commands per rank (pJ)
system.physmem_1.refreshEnergy 4002367200 # Energy for refresh commands per rank (pJ)
system.physmem_1.actBackEnergy 2548940535 # Energy for active background per rank (pJ)
system.physmem_1.preBackEnergy 34530915750 # Energy for precharge background per rank (pJ)
system.physmem_1.totalEnergy 41147955240 # Total energy per rank (pJ)
system.physmem_1.averagePower 671.495861 # Core power per rank (mW)
system.physmem_1.memoryStateTime::IDLE 57435989500 # Time in different power states
system.physmem_1.memoryStateTime::REF 2046200000 # Time in different power states
system.physmem_1.refreshEnergy 3999824400 # Energy for refresh commands per rank (pJ)
system.physmem_1.actBackEnergy 2555622360 # Energy for active background per rank (pJ)
system.physmem_1.preBackEnergy 34501695750 # Energy for precharge background per rank (pJ)
system.physmem_1.totalEnergy 41122956060 # Total energy per rank (pJ)
system.physmem_1.averagePower 671.514525 # Core power per rank (mW)
system.physmem_1.memoryStateTime::IDLE 57387265750 # Time in different power states
system.physmem_1.memoryStateTime::REF 2044900000 # Time in different power states
system.physmem_1.memoryStateTime::PRE_PDN 0 # Time in different power states
system.physmem_1.memoryStateTime::ACT 1796249000 # Time in different power states
system.physmem_1.memoryStateTime::ACT 1807269750 # Time in different power states
system.physmem_1.memoryStateTime::ACT_PDN 0 # Time in different power states
system.cpu.branchPred.lookups 20766613 # Number of BP lookups
system.cpu.branchPred.condPredicted 17069686 # Number of conditional branches predicted
system.cpu.branchPred.condIncorrect 765538 # Number of conditional branches incorrect
system.cpu.branchPred.BTBLookups 8958713 # Number of BTB lookups
system.cpu.branchPred.BTBHits 8857097 # Number of BTB hits
system.cpu.branchPred.lookups 20752188 # Number of BP lookups
system.cpu.branchPred.condPredicted 17062075 # Number of conditional branches predicted
system.cpu.branchPred.condIncorrect 757746 # Number of conditional branches incorrect
system.cpu.branchPred.BTBLookups 8939036 # Number of BTB lookups
system.cpu.branchPred.BTBHits 8856390 # Number of BTB hits
system.cpu.branchPred.BTBCorrect 0 # Number of correct BTB predictions (this stat may not work properly.
system.cpu.branchPred.BTBHitPct 98.865730 # BTB Hit Percentage
system.cpu.branchPred.usedRAS 62715 # Number of times the RAS was used to get a target.
system.cpu.branchPred.BTBHitPct 99.075448 # BTB Hit Percentage
system.cpu.branchPred.usedRAS 61984 # Number of times the RAS was used to get a target.
system.cpu.branchPred.RASInCorrect 17 # Number of incorrect RAS predictions.
system.cpu_clk_domain.clock 500 # Clock period in ticks
system.cpu.dstage2_mmu.stage2_tlb.walker.walks 0 # Table walker walks requested
@ -377,67 +377,67 @@ system.cpu.itb.hits 0 # DT
system.cpu.itb.misses 0 # DTB misses
system.cpu.itb.accesses 0 # DTB accesses
system.cpu.workload.num_syscalls 442 # Number of system calls
system.cpu.numCycles 122559681 # number of cpu cycles simulated
system.cpu.numCycles 122481701 # number of cpu cycles simulated
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
system.cpu.committedInsts 90602850 # Number of instructions committed
system.cpu.committedOps 91054081 # Number of ops (including micro ops) committed
system.cpu.discardedOps 2197712 # Number of ops (including micro ops) which were discarded before commit
system.cpu.discardedOps 2176622 # Number of ops (including micro ops) which were discarded before commit
system.cpu.numFetchSuspends 0 # Number of times Execute suspended instruction fetching
system.cpu.cpi 1.352713 # CPI: cycles per instruction
system.cpu.ipc 0.739255 # IPC: instructions per cycle
system.cpu.tickCycles 109336366 # Number of cycles that the object actually ticked
system.cpu.idleCycles 13223315 # Total number of cycles that the object has spent stopped
system.cpu.dcache.tags.replacements 946108 # number of replacements
system.cpu.dcache.tags.tagsinuse 3616.962336 # Cycle average of tags in use
system.cpu.dcache.tags.total_refs 26267632 # Total number of references to valid blocks.
system.cpu.dcache.tags.sampled_refs 950204 # Sample count of references to valid blocks.
system.cpu.dcache.tags.avg_refs 27.644203 # Average number of references to valid blocks.
system.cpu.dcache.tags.warmup_cycle 20520732500 # Cycle when the warmup percentage was hit.
system.cpu.dcache.tags.occ_blocks::cpu.data 3616.962336 # Average occupied blocks per requestor
system.cpu.dcache.tags.occ_percent::cpu.data 0.883047 # Average percentage of cache occupancy
system.cpu.dcache.tags.occ_percent::total 0.883047 # Average percentage of cache occupancy
system.cpu.cpi 1.351853 # CPI: cycles per instruction
system.cpu.ipc 0.739726 # IPC: instructions per cycle
system.cpu.tickCycles 109255125 # Number of cycles that the object actually ticked
system.cpu.idleCycles 13226576 # Total number of cycles that the object has spent stopped
system.cpu.dcache.tags.replacements 946097 # number of replacements
system.cpu.dcache.tags.tagsinuse 3616.871508 # Cycle average of tags in use
system.cpu.dcache.tags.total_refs 26263183 # Total number of references to valid blocks.
system.cpu.dcache.tags.sampled_refs 950193 # Sample count of references to valid blocks.
system.cpu.dcache.tags.avg_refs 27.639841 # Average number of references to valid blocks.
system.cpu.dcache.tags.warmup_cycle 20511562500 # Cycle when the warmup percentage was hit.
system.cpu.dcache.tags.occ_blocks::cpu.data 3616.871508 # Average occupied blocks per requestor
system.cpu.dcache.tags.occ_percent::cpu.data 0.883025 # Average percentage of cache occupancy
system.cpu.dcache.tags.occ_percent::total 0.883025 # Average percentage of cache occupancy
system.cpu.dcache.tags.occ_task_id_blocks::1024 4096 # Occupied blocks per task id
system.cpu.dcache.tags.age_task_id_blocks_1024::0 254 # Occupied blocks per task id
system.cpu.dcache.tags.age_task_id_blocks_1024::1 2248 # Occupied blocks per task id
system.cpu.dcache.tags.age_task_id_blocks_1024::0 256 # Occupied blocks per task id
system.cpu.dcache.tags.age_task_id_blocks_1024::1 2246 # Occupied blocks per task id
system.cpu.dcache.tags.age_task_id_blocks_1024::2 1594 # Occupied blocks per task id
system.cpu.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id
system.cpu.dcache.tags.tag_accesses 55463928 # Number of tag accesses
system.cpu.dcache.tags.data_accesses 55463928 # Number of data accesses
system.cpu.dcache.ReadReq_hits::cpu.data 21598652 # number of ReadReq hits
system.cpu.dcache.ReadReq_hits::total 21598652 # number of ReadReq hits
system.cpu.dcache.WriteReq_hits::cpu.data 4660698 # number of WriteReq hits
system.cpu.dcache.WriteReq_hits::total 4660698 # number of WriteReq hits
system.cpu.dcache.tags.tag_accesses 55455001 # Number of tag accesses
system.cpu.dcache.tags.data_accesses 55455001 # Number of data accesses
system.cpu.dcache.ReadReq_hits::cpu.data 21594211 # number of ReadReq hits
system.cpu.dcache.ReadReq_hits::total 21594211 # number of ReadReq hits
system.cpu.dcache.WriteReq_hits::cpu.data 4660690 # number of WriteReq hits
system.cpu.dcache.WriteReq_hits::total 4660690 # number of WriteReq hits
system.cpu.dcache.SoftPFReq_hits::cpu.data 508 # number of SoftPFReq hits
system.cpu.dcache.SoftPFReq_hits::total 508 # number of SoftPFReq hits
system.cpu.dcache.LoadLockedReq_hits::cpu.data 3887 # number of LoadLockedReq hits
system.cpu.dcache.LoadLockedReq_hits::total 3887 # number of LoadLockedReq hits
system.cpu.dcache.StoreCondReq_hits::cpu.data 3887 # number of StoreCondReq hits
system.cpu.dcache.StoreCondReq_hits::total 3887 # number of StoreCondReq hits
system.cpu.dcache.demand_hits::cpu.data 26259350 # number of demand (read+write) hits
system.cpu.dcache.demand_hits::total 26259350 # number of demand (read+write) hits
system.cpu.dcache.overall_hits::cpu.data 26259858 # number of overall hits
system.cpu.dcache.overall_hits::total 26259858 # number of overall hits
system.cpu.dcache.ReadReq_misses::cpu.data 914943 # number of ReadReq misses
system.cpu.dcache.ReadReq_misses::total 914943 # number of ReadReq misses
system.cpu.dcache.WriteReq_misses::cpu.data 74283 # number of WriteReq misses
system.cpu.dcache.WriteReq_misses::total 74283 # number of WriteReq misses
system.cpu.dcache.demand_hits::cpu.data 26254901 # number of demand (read+write) hits
system.cpu.dcache.demand_hits::total 26254901 # number of demand (read+write) hits
system.cpu.dcache.overall_hits::cpu.data 26255409 # number of overall hits
system.cpu.dcache.overall_hits::total 26255409 # number of overall hits
system.cpu.dcache.ReadReq_misses::cpu.data 914926 # number of ReadReq misses
system.cpu.dcache.ReadReq_misses::total 914926 # number of ReadReq misses
system.cpu.dcache.WriteReq_misses::cpu.data 74291 # number of WriteReq misses
system.cpu.dcache.WriteReq_misses::total 74291 # number of WriteReq misses
system.cpu.dcache.SoftPFReq_misses::cpu.data 4 # number of SoftPFReq misses
system.cpu.dcache.SoftPFReq_misses::total 4 # number of SoftPFReq misses
system.cpu.dcache.demand_misses::cpu.data 989226 # number of demand (read+write) misses
system.cpu.dcache.demand_misses::total 989226 # number of demand (read+write) misses
system.cpu.dcache.overall_misses::cpu.data 989230 # number of overall misses
system.cpu.dcache.overall_misses::total 989230 # number of overall misses
system.cpu.dcache.ReadReq_miss_latency::cpu.data 11918923000 # number of ReadReq miss cycles
system.cpu.dcache.ReadReq_miss_latency::total 11918923000 # number of ReadReq miss cycles
system.cpu.dcache.WriteReq_miss_latency::cpu.data 2541568000 # number of WriteReq miss cycles
system.cpu.dcache.WriteReq_miss_latency::total 2541568000 # number of WriteReq miss cycles
system.cpu.dcache.demand_miss_latency::cpu.data 14460491000 # number of demand (read+write) miss cycles
system.cpu.dcache.demand_miss_latency::total 14460491000 # number of demand (read+write) miss cycles
system.cpu.dcache.overall_miss_latency::cpu.data 14460491000 # number of overall miss cycles
system.cpu.dcache.overall_miss_latency::total 14460491000 # number of overall miss cycles
system.cpu.dcache.ReadReq_accesses::cpu.data 22513595 # number of ReadReq accesses(hits+misses)
system.cpu.dcache.ReadReq_accesses::total 22513595 # number of ReadReq accesses(hits+misses)
system.cpu.dcache.demand_misses::cpu.data 989217 # number of demand (read+write) misses
system.cpu.dcache.demand_misses::total 989217 # number of demand (read+write) misses
system.cpu.dcache.overall_misses::cpu.data 989221 # number of overall misses
system.cpu.dcache.overall_misses::total 989221 # number of overall misses
system.cpu.dcache.ReadReq_miss_latency::cpu.data 11918942500 # number of ReadReq miss cycles
system.cpu.dcache.ReadReq_miss_latency::total 11918942500 # number of ReadReq miss cycles
system.cpu.dcache.WriteReq_miss_latency::cpu.data 2542548000 # number of WriteReq miss cycles
system.cpu.dcache.WriteReq_miss_latency::total 2542548000 # number of WriteReq miss cycles
system.cpu.dcache.demand_miss_latency::cpu.data 14461490500 # number of demand (read+write) miss cycles
system.cpu.dcache.demand_miss_latency::total 14461490500 # number of demand (read+write) miss cycles
system.cpu.dcache.overall_miss_latency::cpu.data 14461490500 # number of overall miss cycles
system.cpu.dcache.overall_miss_latency::total 14461490500 # number of overall miss cycles
system.cpu.dcache.ReadReq_accesses::cpu.data 22509137 # number of ReadReq accesses(hits+misses)
system.cpu.dcache.ReadReq_accesses::total 22509137 # number of ReadReq accesses(hits+misses)
system.cpu.dcache.WriteReq_accesses::cpu.data 4734981 # number of WriteReq accesses(hits+misses)
system.cpu.dcache.WriteReq_accesses::total 4734981 # number of WriteReq accesses(hits+misses)
system.cpu.dcache.SoftPFReq_accesses::cpu.data 512 # number of SoftPFReq accesses(hits+misses)
@ -446,28 +446,28 @@ system.cpu.dcache.LoadLockedReq_accesses::cpu.data 3887
system.cpu.dcache.LoadLockedReq_accesses::total 3887 # number of LoadLockedReq accesses(hits+misses)
system.cpu.dcache.StoreCondReq_accesses::cpu.data 3887 # number of StoreCondReq accesses(hits+misses)
system.cpu.dcache.StoreCondReq_accesses::total 3887 # number of StoreCondReq accesses(hits+misses)
system.cpu.dcache.demand_accesses::cpu.data 27248576 # number of demand (read+write) accesses
system.cpu.dcache.demand_accesses::total 27248576 # number of demand (read+write) accesses
system.cpu.dcache.overall_accesses::cpu.data 27249088 # number of overall (read+write) accesses
system.cpu.dcache.overall_accesses::total 27249088 # number of overall (read+write) accesses
system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.040640 # miss rate for ReadReq accesses
system.cpu.dcache.ReadReq_miss_rate::total 0.040640 # miss rate for ReadReq accesses
system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.015688 # miss rate for WriteReq accesses
system.cpu.dcache.WriteReq_miss_rate::total 0.015688 # miss rate for WriteReq accesses
system.cpu.dcache.demand_accesses::cpu.data 27244118 # number of demand (read+write) accesses
system.cpu.dcache.demand_accesses::total 27244118 # number of demand (read+write) accesses
system.cpu.dcache.overall_accesses::cpu.data 27244630 # number of overall (read+write) accesses
system.cpu.dcache.overall_accesses::total 27244630 # number of overall (read+write) accesses
system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.040647 # miss rate for ReadReq accesses
system.cpu.dcache.ReadReq_miss_rate::total 0.040647 # miss rate for ReadReq accesses
system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.015690 # miss rate for WriteReq accesses
system.cpu.dcache.WriteReq_miss_rate::total 0.015690 # miss rate for WriteReq accesses
system.cpu.dcache.SoftPFReq_miss_rate::cpu.data 0.007812 # miss rate for SoftPFReq accesses
system.cpu.dcache.SoftPFReq_miss_rate::total 0.007812 # miss rate for SoftPFReq accesses
system.cpu.dcache.demand_miss_rate::cpu.data 0.036304 # miss rate for demand accesses
system.cpu.dcache.demand_miss_rate::total 0.036304 # miss rate for demand accesses
system.cpu.dcache.overall_miss_rate::cpu.data 0.036303 # miss rate for overall accesses
system.cpu.dcache.overall_miss_rate::total 0.036303 # miss rate for overall accesses
system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 13026.956871 # average ReadReq miss latency
system.cpu.dcache.ReadReq_avg_miss_latency::total 13026.956871 # average ReadReq miss latency
system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 34214.665536 # average WriteReq miss latency
system.cpu.dcache.WriteReq_avg_miss_latency::total 34214.665536 # average WriteReq miss latency
system.cpu.dcache.demand_avg_miss_latency::cpu.data 14617.985172 # average overall miss latency
system.cpu.dcache.demand_avg_miss_latency::total 14617.985172 # average overall miss latency
system.cpu.dcache.overall_avg_miss_latency::cpu.data 14617.926064 # average overall miss latency
system.cpu.dcache.overall_avg_miss_latency::total 14617.926064 # average overall miss latency
system.cpu.dcache.demand_miss_rate::cpu.data 0.036309 # miss rate for demand accesses
system.cpu.dcache.demand_miss_rate::total 0.036309 # miss rate for demand accesses
system.cpu.dcache.overall_miss_rate::cpu.data 0.036309 # miss rate for overall accesses
system.cpu.dcache.overall_miss_rate::total 0.036309 # miss rate for overall accesses
system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 13027.220234 # average ReadReq miss latency
system.cpu.dcache.ReadReq_avg_miss_latency::total 13027.220234 # average ReadReq miss latency
system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 34224.172511 # average WriteReq miss latency
system.cpu.dcache.WriteReq_avg_miss_latency::total 34224.172511 # average WriteReq miss latency
system.cpu.dcache.demand_avg_miss_latency::cpu.data 14619.128563 # average overall miss latency
system.cpu.dcache.demand_avg_miss_latency::total 14619.128563 # average overall miss latency
system.cpu.dcache.overall_avg_miss_latency::cpu.data 14619.069450 # average overall miss latency
system.cpu.dcache.overall_avg_miss_latency::total 14619.069450 # average overall miss latency
system.cpu.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
system.cpu.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked
system.cpu.dcache.blocked::no_mshrs 0 # number of cycles access was blocked
@ -476,109 +476,109 @@ system.cpu.dcache.avg_blocked_cycles::no_mshrs nan
system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
system.cpu.dcache.fast_writes 0 # number of fast writes performed
system.cpu.dcache.cache_copies 0 # number of cache copies performed
system.cpu.dcache.writebacks::writebacks 943289 # number of writebacks
system.cpu.dcache.writebacks::total 943289 # number of writebacks
system.cpu.dcache.ReadReq_mshr_hits::cpu.data 11509 # number of ReadReq MSHR hits
system.cpu.dcache.ReadReq_mshr_hits::total 11509 # number of ReadReq MSHR hits
system.cpu.dcache.WriteReq_mshr_hits::cpu.data 27516 # number of WriteReq MSHR hits
system.cpu.dcache.WriteReq_mshr_hits::total 27516 # number of WriteReq MSHR hits
system.cpu.dcache.demand_mshr_hits::cpu.data 39025 # number of demand (read+write) MSHR hits
system.cpu.dcache.demand_mshr_hits::total 39025 # number of demand (read+write) MSHR hits
system.cpu.dcache.overall_mshr_hits::cpu.data 39025 # number of overall MSHR hits
system.cpu.dcache.overall_mshr_hits::total 39025 # number of overall MSHR hits
system.cpu.dcache.ReadReq_mshr_misses::cpu.data 903434 # number of ReadReq MSHR misses
system.cpu.dcache.ReadReq_mshr_misses::total 903434 # number of ReadReq MSHR misses
system.cpu.dcache.WriteReq_mshr_misses::cpu.data 46767 # number of WriteReq MSHR misses
system.cpu.dcache.WriteReq_mshr_misses::total 46767 # number of WriteReq MSHR misses
system.cpu.dcache.writebacks::writebacks 943278 # number of writebacks
system.cpu.dcache.writebacks::total 943278 # number of writebacks
system.cpu.dcache.ReadReq_mshr_hits::cpu.data 11501 # number of ReadReq MSHR hits
system.cpu.dcache.ReadReq_mshr_hits::total 11501 # number of ReadReq MSHR hits
system.cpu.dcache.WriteReq_mshr_hits::cpu.data 27526 # number of WriteReq MSHR hits
system.cpu.dcache.WriteReq_mshr_hits::total 27526 # number of WriteReq MSHR hits
system.cpu.dcache.demand_mshr_hits::cpu.data 39027 # number of demand (read+write) MSHR hits
system.cpu.dcache.demand_mshr_hits::total 39027 # number of demand (read+write) MSHR hits
system.cpu.dcache.overall_mshr_hits::cpu.data 39027 # number of overall MSHR hits
system.cpu.dcache.overall_mshr_hits::total 39027 # number of overall MSHR hits
system.cpu.dcache.ReadReq_mshr_misses::cpu.data 903425 # number of ReadReq MSHR misses
system.cpu.dcache.ReadReq_mshr_misses::total 903425 # number of ReadReq MSHR misses
system.cpu.dcache.WriteReq_mshr_misses::cpu.data 46765 # number of WriteReq MSHR misses
system.cpu.dcache.WriteReq_mshr_misses::total 46765 # number of WriteReq MSHR misses
system.cpu.dcache.SoftPFReq_mshr_misses::cpu.data 3 # number of SoftPFReq MSHR misses
system.cpu.dcache.SoftPFReq_mshr_misses::total 3 # number of SoftPFReq MSHR misses
system.cpu.dcache.demand_mshr_misses::cpu.data 950201 # number of demand (read+write) MSHR misses
system.cpu.dcache.demand_mshr_misses::total 950201 # number of demand (read+write) MSHR misses
system.cpu.dcache.overall_mshr_misses::cpu.data 950204 # number of overall MSHR misses
system.cpu.dcache.overall_mshr_misses::total 950204 # number of overall MSHR misses
system.cpu.dcache.ReadReq_mshr_miss_latency::cpu.data 10865211000 # number of ReadReq MSHR miss cycles
system.cpu.dcache.ReadReq_mshr_miss_latency::total 10865211000 # number of ReadReq MSHR miss cycles
system.cpu.dcache.WriteReq_mshr_miss_latency::cpu.data 1480610000 # number of WriteReq MSHR miss cycles
system.cpu.dcache.WriteReq_mshr_miss_latency::total 1480610000 # number of WriteReq MSHR miss cycles
system.cpu.dcache.demand_mshr_misses::cpu.data 950190 # number of demand (read+write) MSHR misses
system.cpu.dcache.demand_mshr_misses::total 950190 # number of demand (read+write) MSHR misses
system.cpu.dcache.overall_mshr_misses::cpu.data 950193 # number of overall MSHR misses
system.cpu.dcache.overall_mshr_misses::total 950193 # number of overall MSHR misses
system.cpu.dcache.ReadReq_mshr_miss_latency::cpu.data 10865257500 # number of ReadReq MSHR miss cycles
system.cpu.dcache.ReadReq_mshr_miss_latency::total 10865257500 # number of ReadReq MSHR miss cycles
system.cpu.dcache.WriteReq_mshr_miss_latency::cpu.data 1481584500 # number of WriteReq MSHR miss cycles
system.cpu.dcache.WriteReq_mshr_miss_latency::total 1481584500 # number of WriteReq MSHR miss cycles
system.cpu.dcache.SoftPFReq_mshr_miss_latency::cpu.data 156500 # number of SoftPFReq MSHR miss cycles
system.cpu.dcache.SoftPFReq_mshr_miss_latency::total 156500 # number of SoftPFReq MSHR miss cycles
system.cpu.dcache.demand_mshr_miss_latency::cpu.data 12345821000 # number of demand (read+write) MSHR miss cycles
system.cpu.dcache.demand_mshr_miss_latency::total 12345821000 # number of demand (read+write) MSHR miss cycles
system.cpu.dcache.overall_mshr_miss_latency::cpu.data 12345977500 # number of overall MSHR miss cycles
system.cpu.dcache.overall_mshr_miss_latency::total 12345977500 # number of overall MSHR miss cycles
system.cpu.dcache.ReadReq_mshr_miss_rate::cpu.data 0.040128 # mshr miss rate for ReadReq accesses
system.cpu.dcache.ReadReq_mshr_miss_rate::total 0.040128 # mshr miss rate for ReadReq accesses
system.cpu.dcache.WriteReq_mshr_miss_rate::cpu.data 0.009877 # mshr miss rate for WriteReq accesses
system.cpu.dcache.WriteReq_mshr_miss_rate::total 0.009877 # mshr miss rate for WriteReq accesses
system.cpu.dcache.demand_mshr_miss_latency::cpu.data 12346842000 # number of demand (read+write) MSHR miss cycles
system.cpu.dcache.demand_mshr_miss_latency::total 12346842000 # number of demand (read+write) MSHR miss cycles
system.cpu.dcache.overall_mshr_miss_latency::cpu.data 12346998500 # number of overall MSHR miss cycles
system.cpu.dcache.overall_mshr_miss_latency::total 12346998500 # number of overall MSHR miss cycles
system.cpu.dcache.ReadReq_mshr_miss_rate::cpu.data 0.040136 # mshr miss rate for ReadReq accesses
system.cpu.dcache.ReadReq_mshr_miss_rate::total 0.040136 # mshr miss rate for ReadReq accesses
system.cpu.dcache.WriteReq_mshr_miss_rate::cpu.data 0.009876 # mshr miss rate for WriteReq accesses
system.cpu.dcache.WriteReq_mshr_miss_rate::total 0.009876 # mshr miss rate for WriteReq accesses
system.cpu.dcache.SoftPFReq_mshr_miss_rate::cpu.data 0.005859 # mshr miss rate for SoftPFReq accesses
system.cpu.dcache.SoftPFReq_mshr_miss_rate::total 0.005859 # mshr miss rate for SoftPFReq accesses
system.cpu.dcache.demand_mshr_miss_rate::cpu.data 0.034872 # mshr miss rate for demand accesses
system.cpu.dcache.demand_mshr_miss_rate::total 0.034872 # mshr miss rate for demand accesses
system.cpu.dcache.overall_mshr_miss_rate::cpu.data 0.034871 # mshr miss rate for overall accesses
system.cpu.dcache.overall_mshr_miss_rate::total 0.034871 # mshr miss rate for overall accesses
system.cpu.dcache.ReadReq_avg_mshr_miss_latency::cpu.data 12026.568626 # average ReadReq mshr miss latency
system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 12026.568626 # average ReadReq mshr miss latency
system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 31659.289670 # average WriteReq mshr miss latency
system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 31659.289670 # average WriteReq mshr miss latency
system.cpu.dcache.demand_mshr_miss_rate::cpu.data 0.034877 # mshr miss rate for demand accesses
system.cpu.dcache.demand_mshr_miss_rate::total 0.034877 # mshr miss rate for demand accesses
system.cpu.dcache.overall_mshr_miss_rate::cpu.data 0.034876 # mshr miss rate for overall accesses
system.cpu.dcache.overall_mshr_miss_rate::total 0.034876 # mshr miss rate for overall accesses
system.cpu.dcache.ReadReq_avg_mshr_miss_latency::cpu.data 12026.739906 # average ReadReq mshr miss latency
system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 12026.739906 # average ReadReq mshr miss latency
system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 31681.481877 # average WriteReq mshr miss latency
system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 31681.481877 # average WriteReq mshr miss latency
system.cpu.dcache.SoftPFReq_avg_mshr_miss_latency::cpu.data 52166.666667 # average SoftPFReq mshr miss latency
system.cpu.dcache.SoftPFReq_avg_mshr_miss_latency::total 52166.666667 # average SoftPFReq mshr miss latency
system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 12992.852039 # average overall mshr miss latency
system.cpu.dcache.demand_avg_mshr_miss_latency::total 12992.852039 # average overall mshr miss latency
system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 12992.975719 # average overall mshr miss latency
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system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 12994.076974 # average overall mshr miss latency
system.cpu.dcache.demand_avg_mshr_miss_latency::total 12994.076974 # average overall mshr miss latency
system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 12994.200652 # average overall mshr miss latency
system.cpu.dcache.overall_avg_mshr_miss_latency::total 12994.200652 # average overall mshr miss latency
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system.cpu.icache.tags.tagsinuse 690.428077 # Cycle average of tags in use
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system.cpu.icache.tags.tagsinuse 689.439690 # Cycle average of tags in use
system.cpu.icache.tags.total_refs 27770466 # Total number of references to valid blocks.
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system.cpu.icache.tags.avg_refs 34626.516209 # Average number of references to valid blocks.
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system.cpu.icache.tags.occ_percent::total 0.337123 # Average percentage of cache occupancy
system.cpu.icache.tags.occ_task_id_blocks::1024 798 # Occupied blocks per task id
system.cpu.icache.tags.occ_blocks::cpu.inst 689.439690 # Average occupied blocks per requestor
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system.cpu.icache.tags.occ_percent::total 0.336640 # Average percentage of cache occupancy
system.cpu.icache.tags.occ_task_id_blocks::1024 797 # Occupied blocks per task id
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system.cpu.icache.tags.age_task_id_blocks_1024::2 15 # Occupied blocks per task id
system.cpu.icache.tags.age_task_id_blocks_1024::4 741 # Occupied blocks per task id
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system.cpu.icache.tags.data_accesses 55588102 # Number of data accesses
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system.cpu.icache.tags.data_accesses 55543338 # Number of data accesses
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system.cpu.icache.ReadReq_hits::total 27770466 # number of ReadReq hits
system.cpu.icache.demand_hits::cpu.inst 27770466 # number of demand (read+write) hits
system.cpu.icache.demand_hits::total 27770466 # number of demand (read+write) hits
system.cpu.icache.overall_hits::cpu.inst 27770466 # number of overall hits
system.cpu.icache.overall_hits::total 27770466 # number of overall hits
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system.cpu.icache.ReadReq_misses::total 802 # number of ReadReq misses
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system.cpu.icache.ReadReq_miss_latency::total 59599500 # number of ReadReq miss cycles
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system.cpu.icache.demand_miss_latency::total 59599500 # number of demand (read+write) miss cycles
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system.cpu.icache.overall_miss_latency::total 59599500 # number of overall miss cycles
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system.cpu.icache.overall_miss_latency::total 60107000 # number of overall miss cycles
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system.cpu.icache.demand_avg_miss_latency::cpu.inst 74946.384040 # average overall miss latency
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system.cpu.icache.overall_avg_miss_latency::cpu.inst 74946.384040 # average overall miss latency
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system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked
@ -593,38 +593,38 @@ system.cpu.icache.demand_mshr_misses::cpu.inst 802
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system.cpu.icache.demand_mshr_miss_latency::cpu.inst 59305000 # number of demand (read+write) MSHR miss cycles
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system.cpu.icache.overall_mshr_miss_latency::total 59305000 # number of overall MSHR miss cycles
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system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 73313.591022 # average ReadReq mshr miss latency
system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 73313.591022 # average ReadReq mshr miss latency
system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 73313.591022 # average overall mshr miss latency
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system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 73313.591022 # average overall mshr miss latency
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system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 73946.384040 # average ReadReq mshr miss latency
system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 73946.384040 # average ReadReq mshr miss latency
system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 73946.384040 # average overall mshr miss latency
system.cpu.icache.demand_avg_mshr_miss_latency::total 73946.384040 # average overall mshr miss latency
system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 73946.384040 # average overall mshr miss latency
system.cpu.icache.overall_avg_mshr_miss_latency::total 73946.384040 # average overall mshr miss latency
system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate
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system.cpu.l2cache.tags.tagsinuse 10245.543243 # Cycle average of tags in use
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system.cpu.l2cache.tags.occ_blocks::writebacks 9356.530979 # Average occupied blocks per requestor
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system.cpu.l2cache.tags.occ_percent::cpu.inst 0.020583 # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_blocks::writebacks 9355.642515 # Average occupied blocks per requestor
system.cpu.l2cache.tags.occ_blocks::cpu.inst 674.444420 # Average occupied blocks per requestor
system.cpu.l2cache.tags.occ_blocks::cpu.data 215.456307 # Average occupied blocks per requestor
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system.cpu.l2cache.tags.occ_task_id_blocks::1024 15557 # Occupied blocks per task id
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@ -632,22 +632,22 @@ system.cpu.l2cache.tags.age_task_id_blocks_1024::2 526
system.cpu.l2cache.tags.age_task_id_blocks_1024::3 1095 # Occupied blocks per task id
system.cpu.l2cache.tags.age_task_id_blocks_1024::4 13876 # Occupied blocks per task id
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system.cpu.l2cache.Writeback_hits::writebacks 943278 # number of Writeback hits
system.cpu.l2cache.Writeback_hits::total 943278 # number of Writeback hits
system.cpu.l2cache.ReadExReq_hits::cpu.data 32221 # number of ReadExReq hits
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@ -660,34 +660,34 @@ system.cpu.l2cache.demand_misses::total 15582 # nu
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system.cpu.l2cache.ReadExReq_avg_miss_latency::cpu.data 73339.383938 # average ReadExReq miss latency
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system.cpu.l2cache.ReadCleanReq_avg_miss_latency::total 73866.623711 # average ReadCleanReq miss latency
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system.cpu.l2cache.demand_avg_miss_latency::cpu.inst 73866.623711 # average overall miss latency
system.cpu.l2cache.demand_avg_miss_latency::cpu.data 73511.009050 # average overall miss latency
system.cpu.l2cache.demand_avg_miss_latency::total 73528.719035 # average overall miss latency
system.cpu.l2cache.overall_avg_miss_latency::cpu.inst 73866.623711 # average overall miss latency
system.cpu.l2cache.overall_avg_miss_latency::cpu.data 73511.009050 # average overall miss latency
system.cpu.l2cache.overall_avg_miss_latency::total 73528.719035 # average overall miss latency
system.cpu.l2cache.ReadExReq_avg_miss_latency::cpu.data 73407.625138 # average ReadExReq miss latency
system.cpu.l2cache.ReadExReq_avg_miss_latency::total 73407.625138 # average ReadExReq miss latency
system.cpu.l2cache.ReadCleanReq_avg_miss_latency::cpu.inst 74520.618557 # average ReadCleanReq miss latency
system.cpu.l2cache.ReadCleanReq_avg_miss_latency::total 74520.618557 # average ReadCleanReq miss latency
system.cpu.l2cache.ReadSharedReq_avg_miss_latency::cpu.data 83643.129771 # average ReadSharedReq miss latency
system.cpu.l2cache.ReadSharedReq_avg_miss_latency::total 83643.129771 # average ReadSharedReq miss latency
system.cpu.l2cache.demand_avg_miss_latency::cpu.inst 74520.618557 # average overall miss latency
system.cpu.l2cache.demand_avg_miss_latency::cpu.data 73588.747805 # average overall miss latency
system.cpu.l2cache.demand_avg_miss_latency::total 73635.155949 # average overall miss latency
system.cpu.l2cache.overall_avg_miss_latency::cpu.inst 74520.618557 # average overall miss latency
system.cpu.l2cache.overall_avg_miss_latency::cpu.data 73588.747805 # average overall miss latency
system.cpu.l2cache.overall_avg_miss_latency::total 73635.155949 # average overall miss latency
system.cpu.l2cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
system.cpu.l2cache.blocked_cycles::no_targets 0 # number of cycles access was blocked
system.cpu.l2cache.blocked::no_mshrs 0 # number of cycles access was blocked
@ -740,73 +740,73 @@ system.cpu.l2cache.demand_mshr_misses::total 15574
system.cpu.l2cache.overall_mshr_misses::cpu.inst 774 # number of overall MSHR misses
system.cpu.l2cache.overall_mshr_misses::cpu.data 14800 # number of overall MSHR misses
system.cpu.l2cache.overall_mshr_misses::total 15574 # number of overall MSHR misses
system.cpu.l2cache.ReadExReq_mshr_miss_latency::cpu.data 921208000 # number of ReadExReq MSHR miss cycles
system.cpu.l2cache.ReadExReq_mshr_miss_latency::total 921208000 # number of ReadExReq MSHR miss cycles
system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::cpu.inst 49433000 # number of ReadCleanReq MSHR miss cycles
system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::total 49433000 # number of ReadCleanReq MSHR miss cycles
system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::cpu.data 18805000 # number of ReadSharedReq MSHR miss cycles
system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::total 18805000 # number of ReadSharedReq MSHR miss cycles
system.cpu.l2cache.demand_mshr_miss_latency::cpu.inst 49433000 # number of demand (read+write) MSHR miss cycles
system.cpu.l2cache.demand_mshr_miss_latency::cpu.data 940013000 # number of demand (read+write) MSHR miss cycles
system.cpu.l2cache.demand_mshr_miss_latency::total 989446000 # number of demand (read+write) MSHR miss cycles
system.cpu.l2cache.overall_mshr_miss_latency::cpu.inst 49433000 # number of overall MSHR miss cycles
system.cpu.l2cache.overall_mshr_miss_latency::cpu.data 940013000 # number of overall MSHR miss cycles
system.cpu.l2cache.overall_mshr_miss_latency::total 989446000 # number of overall MSHR miss cycles
system.cpu.l2cache.ReadExReq_mshr_miss_rate::cpu.data 0.310989 # mshr miss rate for ReadExReq accesses
system.cpu.l2cache.ReadExReq_mshr_miss_rate::total 0.310989 # mshr miss rate for ReadExReq accesses
system.cpu.l2cache.ReadExReq_mshr_miss_latency::cpu.data 922200500 # number of ReadExReq MSHR miss cycles
system.cpu.l2cache.ReadExReq_mshr_miss_latency::total 922200500 # number of ReadExReq MSHR miss cycles
system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::cpu.inst 49941000 # number of ReadCleanReq MSHR miss cycles
system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::total 49941000 # number of ReadCleanReq MSHR miss cycles
system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::cpu.data 18963500 # number of ReadSharedReq MSHR miss cycles
system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::total 18963500 # number of ReadSharedReq MSHR miss cycles
system.cpu.l2cache.demand_mshr_miss_latency::cpu.inst 49941000 # number of demand (read+write) MSHR miss cycles
system.cpu.l2cache.demand_mshr_miss_latency::cpu.data 941164000 # number of demand (read+write) MSHR miss cycles
system.cpu.l2cache.demand_mshr_miss_latency::total 991105000 # number of demand (read+write) MSHR miss cycles
system.cpu.l2cache.overall_mshr_miss_latency::cpu.inst 49941000 # number of overall MSHR miss cycles
system.cpu.l2cache.overall_mshr_miss_latency::cpu.data 941164000 # number of overall MSHR miss cycles
system.cpu.l2cache.overall_mshr_miss_latency::total 991105000 # number of overall MSHR miss cycles
system.cpu.l2cache.ReadExReq_mshr_miss_rate::cpu.data 0.311002 # mshr miss rate for ReadExReq accesses
system.cpu.l2cache.ReadExReq_mshr_miss_rate::total 0.311002 # mshr miss rate for ReadExReq accesses
system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::cpu.inst 0.965087 # mshr miss rate for ReadCleanReq accesses
system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::total 0.965087 # mshr miss rate for ReadCleanReq accesses
system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::cpu.data 0.000283 # mshr miss rate for ReadSharedReq accesses
system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::total 0.000283 # mshr miss rate for ReadSharedReq accesses
system.cpu.l2cache.demand_mshr_miss_rate::cpu.inst 0.965087 # mshr miss rate for demand accesses
system.cpu.l2cache.demand_mshr_miss_rate::cpu.data 0.015576 # mshr miss rate for demand accesses
system.cpu.l2cache.demand_mshr_miss_rate::total 0.016376 # mshr miss rate for demand accesses
system.cpu.l2cache.demand_mshr_miss_rate::total 0.016377 # mshr miss rate for demand accesses
system.cpu.l2cache.overall_mshr_miss_rate::cpu.inst 0.965087 # mshr miss rate for overall accesses
system.cpu.l2cache.overall_mshr_miss_rate::cpu.data 0.015576 # mshr miss rate for overall accesses
system.cpu.l2cache.overall_mshr_miss_rate::total 0.016376 # mshr miss rate for overall accesses
system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data 63339.383938 # average ReadExReq mshr miss latency
system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 63339.383938 # average ReadExReq mshr miss latency
system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::cpu.inst 63866.925065 # average ReadCleanReq mshr miss latency
system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::total 63866.925065 # average ReadCleanReq mshr miss latency
system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.data 73457.031250 # average ReadSharedReq mshr miss latency
system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total 73457.031250 # average ReadSharedReq mshr miss latency
system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 63866.925065 # average overall mshr miss latency
system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 63514.391892 # average overall mshr miss latency
system.cpu.l2cache.demand_avg_mshr_miss_latency::total 63531.912161 # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 63866.925065 # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 63514.391892 # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::total 63531.912161 # average overall mshr miss latency
system.cpu.l2cache.overall_mshr_miss_rate::total 0.016377 # mshr miss rate for overall accesses
system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data 63407.625138 # average ReadExReq mshr miss latency
system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 63407.625138 # average ReadExReq mshr miss latency
system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::cpu.inst 64523.255814 # average ReadCleanReq mshr miss latency
system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::total 64523.255814 # average ReadCleanReq mshr miss latency
system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.data 74076.171875 # average ReadSharedReq mshr miss latency
system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total 74076.171875 # average ReadSharedReq mshr miss latency
system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 64523.255814 # average overall mshr miss latency
system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 63592.162162 # average overall mshr miss latency
system.cpu.l2cache.demand_avg_mshr_miss_latency::total 63638.435855 # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 64523.255814 # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 63592.162162 # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::total 63638.435855 # average overall mshr miss latency
system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate
system.cpu.toL2Bus.trans_dist::ReadResp 904239 # Transaction distribution
system.cpu.toL2Bus.trans_dist::Writeback 943289 # Transaction distribution
system.cpu.toL2Bus.trans_dist::CleanEvict 2672 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExReq 46767 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExResp 46767 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadResp 904230 # Transaction distribution
system.cpu.toL2Bus.trans_dist::Writeback 943278 # Transaction distribution
system.cpu.toL2Bus.trans_dist::CleanEvict 2674 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExReq 46765 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExResp 46765 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadCleanReq 802 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadSharedReq 903437 # Transaction distribution
system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 1607 # Packet count per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 2846366 # Packet count per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_count::total 2847973 # Packet count per connected master and slave (bytes)
system.cpu.toL2Bus.trans_dist::ReadSharedReq 903428 # Transaction distribution
system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 1608 # Packet count per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 2846334 # Packet count per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_count::total 2847942 # Packet count per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 51328 # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 121183552 # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_size::total 121234880 # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 121182144 # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_size::total 121233472 # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.snoops 0 # Total snoops (count)
system.cpu.toL2Bus.snoop_fanout::samples 1897118 # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::samples 1897097 # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::mean 1 # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::stdev 0 # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::1 1897118 100.00% 100.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::1 1897097 100.00% 100.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::2 0 0.00% 100.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::min_value 1 # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::max_value 1 # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::total 1897118 # Request fanout histogram
system.cpu.toL2Bus.reqLayer0.occupancy 1891848000 # Layer occupancy (ticks)
system.cpu.toL2Bus.snoop_fanout::total 1897097 # Request fanout histogram
system.cpu.toL2Bus.reqLayer0.occupancy 1891826500 # Layer occupancy (ticks)
system.cpu.toL2Bus.reqLayer0.utilization 3.1 # Layer utilization (%)
system.cpu.toL2Bus.respLayer0.occupancy 1203998 # Layer occupancy (ticks)
system.cpu.toL2Bus.respLayer0.utilization 0.0 # Layer utilization (%)
system.cpu.toL2Bus.respLayer1.occupancy 1425308994 # Layer occupancy (ticks)
system.cpu.toL2Bus.respLayer1.occupancy 1425292494 # Layer occupancy (ticks)
system.cpu.toL2Bus.respLayer1.utilization 2.3 # Layer utilization (%)
system.membus.trans_dist::ReadResp 1030 # Transaction distribution
system.membus.trans_dist::ReadExReq 14544 # Transaction distribution
@ -827,9 +827,9 @@ system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Re
system.membus.snoop_fanout::min_value 0 # Request fanout histogram
system.membus.snoop_fanout::max_value 0 # Request fanout histogram
system.membus.snoop_fanout::total 15574 # Request fanout histogram
system.membus.reqLayer0.occupancy 21740500 # Layer occupancy (ticks)
system.membus.reqLayer0.occupancy 21739500 # Layer occupancy (ticks)
system.membus.reqLayer0.utilization 0.0 # Layer utilization (%)
system.membus.respLayer1.occupancy 82134000 # Layer occupancy (ticks)
system.membus.respLayer1.occupancy 82130500 # Layer occupancy (ticks)
system.membus.respLayer1.utilization 0.1 # Layer utilization (%)
---------- End Simulation Statistics ----------

10
tests/long/se/10.mcf/ref/arm/linux/o3-timing/config.ini
View file

@ -149,7 +149,7 @@ instShiftAmt=2
numThreads=1
[system.cpu.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -490,7 +490,7 @@ opLat=4
pipelined=true
[system.cpu.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -600,7 +600,7 @@ sys=system
port=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
type=Cache
children=prefetcher tags
addr_ranges=0:18446744073709551615
assoc=16
@ -688,9 +688,9 @@ env=
errout=cerr
euid=100
eventq_index=0
executable=/home/stever/m5/dist/cpu2000/binaries/arm/linux/mcf
executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/mcf
gid=100
input=/home/stever/m5/dist/cpu2000/data/mcf/smred/input/mcf.in
input=/scratch/nilay/GEM5/dist/m5/cpu2000/data/mcf/smred/input/mcf.in
kvmInSE=false
max_stack_size=67108864
output=cout

13
tests/long/se/10.mcf/ref/arm/linux/o3-timing/simout
View file

@ -1,13 +1,14 @@
Redirecting stdout to build/ARM/tests/opt/long/se/10.mcf/arm/linux/o3-timing/simout
Redirecting stderr to build/ARM/tests/opt/long/se/10.mcf/arm/linux/o3-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Apr 22 2015 10:58:25
gem5 started Apr 22 2015 11:34:28
gem5 executing on phenom
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/10.mcf/arm/linux/o3-timing -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ARM/tests/opt/long/se/10.mcf/arm/linux/o3-timing
gem5 compiled Sep 14 2015 23:29:19
gem5 started Sep 15 2015 02:12:41
gem5 executing on ribera.cs.wisc.edu
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/10.mcf/arm/linux/o3-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/long/se/10.mcf/arm/linux/o3-timing
Global frequency set at 1000000000000 ticks per second
0: system.cpu.isa: ISA system set to: 0 0x299b730
info: Entering event queue @ 0. Starting simulation...
MCF SPEC version 1.6.I
@ -25,4 +26,4 @@ simplex iterations : 2663
flow value : 3080014995
checksum : 68389
optimal
Exiting @ tick 58202727500 because target called exit()
Exiting @ tick 58182114500 because target called exit()

6
tests/long/se/10.mcf/ref/sparc/linux/simple-timing/config.ini
View file

@ -78,7 +78,7 @@ dcache_port=system.cpu.dcache.cpu_side
icache_port=system.cpu.icache.cpu_side
[system.cpu.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -118,7 +118,7 @@ eventq_index=0
size=64
[system.cpu.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -166,7 +166,7 @@ eventq_index=0
size=64
[system.cpu.l2cache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8

13
tests/long/se/10.mcf/ref/sparc/linux/simple-timing/simout
View file

@ -1,10 +1,13 @@
Redirecting stdout to build/SPARC/tests/opt/long/se/10.mcf/sparc/linux/simple-timing/simout
Redirecting stderr to build/SPARC/tests/opt/long/se/10.mcf/sparc/linux/simple-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Jan 22 2014 17:04:27
gem5 started Jan 22 2014 19:43:22
gem5 executing on u200540-lin
command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/long/se/10.mcf/sparc/linux/simple-timing -re tests/run.py build/SPARC/tests/opt/long/se/10.mcf/sparc/linux/simple-timing
gem5 compiled Sep 14 2015 22:05:26
gem5 started Sep 14 2015 22:06:13
gem5 executing on ribera.cs.wisc.edu
command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/long/se/10.mcf/sparc/linux/simple-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/SPARC/tests/opt/long/se/10.mcf/sparc/linux/simple-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
@ -23,4 +26,4 @@ simplex iterations : 2663
flow value : 3080014995
checksum : 68389
optimal
Exiting @ tick 361488530000 because target called exit()
Exiting @ tick 361488535500 because target called exit()

10
tests/long/se/10.mcf/ref/x86/linux/o3-timing/config.ini
View file

@ -156,7 +156,7 @@ localPredictorSize=2048
numThreads=1
[system.cpu.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -513,7 +513,7 @@ opLat=3
pipelined=false
[system.cpu.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -579,7 +579,7 @@ system=system
port=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8
@ -642,9 +642,9 @@ env=
errout=cerr
euid=100
eventq_index=0
executable=/home/stever/m5/dist/cpu2000/binaries/x86/linux/mcf
executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/x86/linux/mcf
gid=100
input=/home/stever/m5/dist/cpu2000/data/mcf/smred/input/mcf.in
input=/scratch/nilay/GEM5/dist/m5/cpu2000/data/mcf/smred/input/mcf.in
kvmInSE=false
max_stack_size=67108864
output=cout

14
tests/long/se/10.mcf/ref/x86/linux/o3-timing/simout
View file

@ -1,10 +1,12 @@
Redirecting stdout to build/X86/tests/opt/long/se/10.mcf/x86/linux/o3-timing/simout
Redirecting stderr to build/X86/tests/opt/long/se/10.mcf/x86/linux/o3-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Apr 22 2015 08:10:29
gem5 started Apr 22 2015 09:28:24
gem5 executing on phenom
command line: build/X86/gem5.opt -d build/X86/tests/opt/long/se/10.mcf/x86/linux/o3-timing -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/X86/tests/opt/long/se/10.mcf/x86/linux/o3-timing
gem5 compiled Sep 14 2015 22:13:36
gem5 started Sep 14 2015 22:43:54
gem5 executing on ribera.cs.wisc.edu
command line: build/X86/gem5.opt -d build/X86/tests/opt/long/se/10.mcf/x86/linux/o3-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/X86/tests/opt/long/se/10.mcf/x86/linux/o3-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
@ -17,12 +19,12 @@ All Rights Reserved.
nodes : 500
active arcs : 1905
simplex iterations : 1502
info: Increasing stack size by one page.
flow value : 4990014995
new implicit arcs : 23867
active arcs : 25772
simplex iterations : 2663
info: Increasing stack size by one page.
flow value : 3080014995
checksum : 68389
optimal
Exiting @ tick 62113055500 because target called exit()
Exiting @ tick 61602395500 because target called exit()

1426
tests/long/se/10.mcf/ref/x86/linux/o3-timing/stats.txt
View file

File diff suppressed because it is too large Load diff

6
tests/long/se/10.mcf/ref/x86/linux/simple-timing/config.ini
View file

@ -84,7 +84,7 @@ clk_domain=system.cpu_clk_domain
eventq_index=0
[system.cpu.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -134,7 +134,7 @@ system=system
port=system.cpu.toL2Bus.slave[3]
[system.cpu.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -200,7 +200,7 @@ system=system
port=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8

13
tests/long/se/10.mcf/ref/x86/linux/simple-timing/simout
View file

@ -1,10 +1,13 @@
Redirecting stdout to build/X86/tests/opt/long/se/10.mcf/x86/linux/simple-timing/simout
Redirecting stderr to build/X86/tests/opt/long/se/10.mcf/x86/linux/simple-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Jan 22 2014 17:10:34
gem5 started Jan 22 2014 20:18:36
gem5 executing on u200540-lin
command line: build/X86/gem5.opt -d build/X86/tests/opt/long/se/10.mcf/x86/linux/simple-timing -re tests/run.py build/X86/tests/opt/long/se/10.mcf/x86/linux/simple-timing
gem5 compiled Sep 14 2015 22:13:36
gem5 started Sep 14 2015 23:02:52
gem5 executing on ribera.cs.wisc.edu
command line: build/X86/gem5.opt -d build/X86/tests/opt/long/se/10.mcf/x86/linux/simple-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/X86/tests/opt/long/se/10.mcf/x86/linux/simple-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
@ -23,4 +26,4 @@ simplex iterations : 2663
flow value : 3080014995
checksum : 68389
optimal
Exiting @ tick 365989065000 because target called exit()
Exiting @ tick 365988859500 because target called exit()

6
tests/long/se/20.parser/ref/alpha/tru64/minor-timing/config.ini
View file

@ -125,7 +125,7 @@ localPredictorSize=2048
numThreads=1
[system.cpu.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -548,7 +548,7 @@ eventq_index=0
opClass=InstPrefetch
[system.cpu.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -597,7 +597,7 @@ eventq_index=0
size=48
[system.cpu.l2cache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8

6
tests/long/se/20.parser/ref/alpha/tru64/minor-timing/simerr Normal file → Executable file
View file

@ -1,10 +1,6 @@
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes)
warn: Sockets disabled, not accepting gdb connections
warn: Prefetch instructions in Alpha do not do anything
warn: Prefetch instructions in Alpha do not do anything
warn: Prefetch instructions in Alpha do not do anything
warn: system.cpu.execute.inFlightInsts: No space to push data into queue of capacity 26, pushing anyway
warn: system.cpu.execute.inFlightInsts: No space to push data into queue of capacity 26, pushing anyway
warn: system.cpu.execute.inFlightInsts: No space to push data into queue of capacity 26, pushing anyway
warn: system.cpu.execute.inFlightInsts: No space to push data into queue of capacity 26, pushing anyway
warn: system.cpu.execute.inFlightInsts: No space to push data into queue of capacity 26, pushing anyway
warn: ignoring syscall sigprocmask(1, ...)

11
tests/long/se/20.parser/ref/alpha/tru64/minor-timing/simout Normal file → Executable file
View file

@ -3,10 +3,11 @@ Redirecting stderr to build/ALPHA/tests/opt/long/se/20.parser/alpha/tru64/minor-
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled May 7 2014 10:41:53
gem5 started May 7 2014 16:13:15
gem5 executing on cz3212c2d7
command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/se/20.parser/alpha/tru64/minor-timing -re tests/run.py build/ALPHA/tests/opt/long/se/20.parser/alpha/tru64/minor-timing
gem5 compiled Sep 14 2015 20:54:01
gem5 started Sep 14 2015 21:15:04
gem5 executing on ribera.cs.wisc.edu
command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/se/20.parser/alpha/tru64/minor-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA/tests/opt/long/se/20.parser/alpha/tru64/minor-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
info: Increasing stack size by one page.
@ -68,4 +69,4 @@ Echoing of input sentence turned on.
about 2 million people attended
the five best costumes got prizes
No errors!
Exiting @ tick 409513954500 because target called exit()
Exiting @ tick 412080064500 because target called exit()

1112
tests/long/se/20.parser/ref/alpha/tru64/minor-timing/stats.txt
View file

File diff suppressed because it is too large Load diff

10
tests/long/se/20.parser/ref/arm/linux/minor-timing/config.ini
View file

@ -127,7 +127,7 @@ localPredictorSize=2048
numThreads=1
[system.cpu.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -586,7 +586,7 @@ eventq_index=0
opClass=InstPrefetch
[system.cpu.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -696,7 +696,7 @@ sys=system
port=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8
@ -759,9 +759,9 @@ env=
errout=cerr
euid=100
eventq_index=0
executable=/dist/m5/cpu2000/binaries/arm/linux/parser
executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/parser
gid=100
input=/dist/m5/cpu2000/data/parser/mdred/input/parser.in
input=/scratch/nilay/GEM5/dist/m5/cpu2000/data/parser/mdred/input/parser.in
kvmInSE=false
max_stack_size=67108864
output=cout

14
tests/long/se/20.parser/ref/arm/linux/minor-timing/simout
View file

@ -1,12 +1,14 @@
Redirecting stdout to build/ARM/tests/opt/long/se/20.parser/arm/linux/minor-timing/simout
Redirecting stderr to build/ARM/tests/opt/long/se/20.parser/arm/linux/minor-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Mar 15 2015 20:30:55
gem5 started Mar 15 2015 20:31:14
gem5 executing on zizzer2
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/20.parser/arm/linux/minor-timing -re /z/stever/hg/gem5/tests/run.py build/ARM/tests/opt/long/se/20.parser/arm/linux/minor-timing
gem5 compiled Sep 14 2015 23:29:19
gem5 started Sep 15 2015 03:04:52
gem5 executing on ribera.cs.wisc.edu
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/20.parser/arm/linux/minor-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/long/se/20.parser/arm/linux/minor-timing
Global frequency set at 1000000000000 ticks per second
0: system.cpu.isa: ISA system set to: 0 0x3275620
info: Entering event queue @ 0. Starting simulation...
Reading the dictionary files: *************************************************
@ -68,4 +70,4 @@ info: Increasing stack size by one page.
about 2 million people attended
the five best costumes got prizes
No errors!
Exiting @ tick 366358475500 because target called exit()
Exiting @ tick 363605295500 because target called exit()

1177
tests/long/se/20.parser/ref/arm/linux/minor-timing/stats.txt
View file

File diff suppressed because it is too large Load diff

10
tests/long/se/20.parser/ref/arm/linux/o3-timing/config.ini
View file

@ -149,7 +149,7 @@ instShiftAmt=2
numThreads=1
[system.cpu.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -490,7 +490,7 @@ opLat=4
pipelined=true
[system.cpu.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -600,7 +600,7 @@ sys=system
port=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
type=Cache
children=prefetcher tags
addr_ranges=0:18446744073709551615
assoc=16
@ -688,9 +688,9 @@ env=
errout=cerr
euid=100
eventq_index=0
executable=/home/stever/m5/dist/cpu2000/binaries/arm/linux/parser
executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/parser
gid=100
input=/home/stever/m5/dist/cpu2000/data/parser/mdred/input/parser.in
input=/scratch/nilay/GEM5/dist/m5/cpu2000/data/parser/mdred/input/parser.in
kvmInSE=false
max_stack_size=67108864
output=cout

6
tests/long/se/20.parser/ref/arm/linux/simple-timing/config.ini
View file

@ -80,7 +80,7 @@ dcache_port=system.cpu.dcache.cpu_side
icache_port=system.cpu.icache.cpu_side
[system.cpu.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -156,7 +156,7 @@ sys=system
port=system.cpu.toL2Bus.slave[3]
[system.cpu.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -266,7 +266,7 @@ sys=system
port=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8

10
tests/long/se/20.parser/ref/x86/linux/o3-timing/config.ini
View file

@ -156,7 +156,7 @@ localPredictorSize=2048
numThreads=1
[system.cpu.dcache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -513,7 +513,7 @@ opLat=3
pipelined=false
[system.cpu.icache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=2
@ -579,7 +579,7 @@ system=system
port=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8
@ -642,9 +642,9 @@ env=
errout=cerr
euid=100
eventq_index=0
executable=/home/stever/m5/dist/cpu2000/binaries/x86/linux/parser
executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/x86/linux/parser
gid=100
input=/home/stever/m5/dist/cpu2000/data/parser/mdred/input/parser.in
input=/scratch/nilay/GEM5/dist/m5/cpu2000/data/parser/mdred/input/parser.in
kvmInSE=false
max_stack_size=67108864
output=cout

30
tests/long/se/20.parser/ref/x86/linux/o3-timing/simout
View file

@ -3,17 +3,17 @@ Redirecting stderr to build/X86/tests/opt/long/se/20.parser/x86/linux/o3-timing/
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Jul 5 2015 17:24:59
gem5 started Jul 5 2015 17:25:16
gem5 compiled Sep 14 2015 22:13:36
gem5 started Sep 14 2015 22:14:29
gem5 executing on ribera.cs.wisc.edu
command line: build/X86/gem5.opt -d build/X86/tests/opt/long/se/20.parser/x86/linux/o3-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/X86/tests/opt/long/se/20.parser/x86/linux/o3-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
Reading the dictionary files: *********info: Increasing stack size by one page.
info: Increasing stack size by one page.
**********************************info: Increasing stack size by one page.
Reading the dictionary files: **info: Increasing stack size by one page.
*******info: Increasing stack size by one page.
******************************info: Increasing stack size by one page.
info: Increasing stack size by one page.
info: Increasing stack size by one page.
info: Increasing stack size by one page.
@ -25,7 +25,7 @@ info: Increasing stack size by one page.
info: Increasing stack size by one page.
info: Increasing stack size by one page.
info: Increasing stack size by one page.
******
**********
58924 words stored in 3784810 bytes
@ -37,18 +37,18 @@ Processing sentences in batch mode
Echoing of input sentence turned on.
* as had expected the party to be a success , it was a success
info: Increasing stack size by one page.
info: Increasing stack size by one page.
info: Increasing stack size by one page.
info: Increasing stack size by one page.
info: Increasing stack size by one page.
info: Increasing stack size by one page.
info: Increasing stack size by one page.
info: Increasing stack size by one page.
* do you know where John 's
* he said that , finding that it was impossible to get work as a waiter , he would work as a janitor
* how fast the program is it
* I am wondering whether to invite to the party
info: Increasing stack size by one page.
info: Increasing stack size by one page.
info: Increasing stack size by one page.
info: Increasing stack size by one page.
info: Increasing stack size by one page.
info: Increasing stack size by one page.
info: Increasing stack size by one page.
info: Increasing stack size by one page.
* I gave him for his birthday it
* I thought terrible after our discussion
* I wonder how much money have you earned
@ -91,4 +91,4 @@ info: Increasing stack size by one page.
about 2 million people attended
the five best costumes got prizes
No errors!
Exiting @ tick 417250627500 because target called exit()
Exiting @ tick 403706643500 because target called exit()

Some files were not shown because too many files have changed in this diff Show more