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114 commits

Author SHA1 Message Date
Brandon Potter
3886c4a8f2 syscall_emul: [patch 5/22] remove LiveProcess class and use Process instead 
The EIOProcess class was removed recently and it was the only other class
which derived from Process. Since every Process invocation is also a
LiveProcess invocation, it makes sense to simplify the organization by
combining the fields from LiveProcess into Process.
 2016-11-09 14:27:40 -06:00
Andreas Hansson
ebd9018a13 stats: Update stats to reflect cache changes 2016-12-05 16:48:34 -05:00
Andreas Hansson
6ed567d600 alpha: Remove ALPHA tru64 support and associated tests 
No one appears to be using it, and it is causing build issues
and increases the development and maintenance effort.
 2016-11-17 04:54:14 -05:00
Andreas Hansson
607c277291 stats: Update stats to reflect recent changes to floats 
Mostly just splitting out the floats ops and corresponding
reads/writes.
 2016-10-19 06:20:04 -04:00
Curtis Dunham
c87b717dbd stats: update references 2016-10-13 23:21:40 +01:00
Andreas Sandberg
55ed9609f1 stats: Update to match classic memory changes 2016-08-12 14:12:59 +01:00
Curtis Dunham
ae445c0348 stats: update references 2016-08-02 11:34:32 +01:00
Curtis Dunham
84f138ba96 stats: update references 2016-07-21 17:19:18 +01:00
Andreas Sandberg
85997e66a0 stats: Add power stats to test references 
Change-Id: Ic827213134b199446822f128b81d4a480e777fee
 2016-06-06 17:16:44 +01:00
Andreas Sandberg
1d933447fc stats: Update to match ARM ISA changes 2016-06-02 14:14:36 +01:00
Curtis Dunham
dafec4a515 stats: update and fix e273e86a873d 2016-05-31 16:55:47 +01:00
Curtis Dunham
62b6ff22ec stats: update for snoop filter tweak 
--HG--
extra : source : 2323557eb4f4866fa1ea1575a9f5969e0022adc1
 2016-05-31 11:07:18 +01:00
Andreas Hansson
b006ad26d4 stats: Update stats to reflect cache changes 
Removed unused stats, now counting WriteLineReq, and changed how
uncacheable writes are handled while responses are outstanding.
 2016-04-21 04:48:24 -04:00
Andreas Hansson
d9193d1b20 stats: Match current behaviour 
Small changes to the branch predictor and BTB caused stats changes
throughout.
 2016-04-09 12:13:40 -04:00
Steve Reinhardt
d7c083864c stats: update stats for ld.so support 
Additional auxv entries leads to more instructions in start-up
while walking the list, along with different cache conflicts
wrt stack entries.
 2016-03-17 10:32:53 -07:00
Steve Reinhardt
4fc69db8f8 stats: update stats for mmap changes 2016-03-17 10:30:58 -07:00
Steve Reinhardt
9d8fec0d90 stats: update stats for mmap() change. 
SE O3 runs see an additional reg read per mmap() call.
 2016-03-17 10:25:11 -07:00
Steve Reinhardt
f5d1dd75e5 stats: overdue updates to long regressions 2016-03-16 13:03:49 -07:00
Andreas Hansson
c6cede244b stats: Update stats to reflect changes to cache and crossbar 2016-02-10 04:08:27 -05:00
Andreas Hansson
00b2bd7437 stats: Bump stats to match current behaviour 2015-12-02 09:58:24 -05:00
Nilay Vaish
de489e1997 stats: updates due to recent chagnesets 2015-11-16 05:08:57 -06:00
Nilay Vaish
e1385784f2 stats: remove wb_penalized and wb_penalized_rate 2015-11-16 04:58:29 -06:00
Andreas Hansson
324bc9771d stats: Update stats to match cache changes 2015-11-06 03:26:50 -05:00
Andreas Hansson
806e1fbf0f stats: Update stats to reflect snoop-filter changes 2015-09-25 07:27:03 -04:00
Nilay Vaish
0d6a6dfd7b stats: updates due to recent changesets including d0934b57735a 2015-09-15 08:14:09 -05:00
Andreas Hansson
646994e599 stats: Reflect current behaviour 
Not sure what went wrong in the pushing of the Ruby patches, but
somehow these regressions are not updated.
 2015-08-05 04:36:29 -04:00
Andreas Hansson
d8f732273e stats: Update stats for clean eviction addition 2015-07-30 03:42:27 -04:00
Andreas Hansson
222d920d6b stats: Bump stats to match current behaviour 
Somehow this one seems to have slipped through. Perhaps
non-determinism somewhere?
 2015-07-30 03:41:36 -04:00
Nilay Vaish
c47001de8c stats: x86: updates due to patch on vex 2015-07-18 15:07:35 -05:00
Nilay Vaish
381e9191dd stats: x86: update stats missed out on in preivous changeset 2015-07-05 20:26:18 -05:00
Nilay Vaish
9954eb74df stats: update stale config.ini files, eio and few other stats. 2015-07-04 10:43:47 -05:00
Andreas Hansson
25e1b1c1f5 stats: Update stats for cache, crossbar and DRAM changes 
This update includes the changes to whole-line writes, the refinement
of Read to ReadClean and ReadShared, the introduction of CleanEvict
for snoop-filter tracking, and updates to the DRAM command scheduler
for bank-group-aware scheduling.

Needless to say, almost every regression is affected.
 2015-07-03 10:15:03 -04:00
Andreas Hansson
4bc7dfb697 stats: Update MinorCPU regressions after accounting fix 2015-05-26 03:21:39 -04:00
Andreas Hansson
80cd107e51 stats: Update stats to reflect cache changes 2015-05-05 03:22:39 -04:00
Nilay Vaish
f71fa17157 stats: arm: updates 2015-04-30 14:17:43 -05:00
Nilay Vaish
42fe2df354 stats: x86: updates due to change in div latency 2015-04-29 22:35:23 -05:00
Steve Reinhardt
0cf36d9409 stats: update for previous changeset 
Very small differences in IQ-specific O3 stats.
 2015-04-22 20:22:29 -07:00
Nilay Vaish
172385ae9f stats: x86: changes due to recent patches 
The change in 20.parser is from new x87 instructions.  The change to
pc-o3-timing is not clear to me.  It seems that this test might be invoking
some undefined behavior.
 2015-04-14 11:01:11 -05:00
Steve Reinhardt
1483496803 stats: update Minor stats due to PF bug fix 
A recent changeset of mine (http://repo.gem5.org/gem5/rev/4cfe55719da5)
inadvertently fixed a bug in the Minor CPU model which caused it to treat
software prefetches as regular loads.  Prior to this changeset, Minor
did an ad-hoc generation of memory commands that left out the PF check;
because it now uses the common code that the other CPU models use,
it generates prefetches properly.  These stat changes reflect the fact
that the Minor model now issues SoftPFReqs.
 2015-03-19 08:41:32 -04:00
Nilay Vaish
99fb8f8140 stats: changes to due to recent set of patches 2015-03-09 09:39:09 -05:00
Andreas Hansson
8909843a76 stats: Update stats to reflect cache and interconnect changes 
This is a bulk update of stats to match the changes to cache timing,
interconnect timing, and a few minor changes to the o3 CPU.
 2015-03-02 05:04:20 -05:00
Nilay Vaish
e76442e203 stats: changes due to recent changesets. 2015-01-10 18:06:43 -06:00
Nilay Vaish
e979e8d75e stats: changes due to recent changesets. 2015-01-04 13:02:12 -06:00
Andreas Hansson
df8df4fd0a stats: Bump stats for decoder, TLB, prefetcher and DRAM changes 
Changes due to speculative execution of an unaligned PC, introduction
of TLB stats, changes and re-work of the prefetcher, and the
introduction of rank-wise refresh in the DRAM controller.
 2014-12-23 09:31:20 -05:00
Andreas Hansson
6489598fb4 stats: Bump stats for fixes, mostly TLB and WriteInvalidate 2014-12-02 06:08:25 -05:00
Nilay Vaish
d2a0f60b69 stats: updates due to previous mmap and exit_group patches. 2014-10-20 16:48:19 -05:00
Nilay Vaish
1efe42fa97 stats: updates due to changes to x86, stale configs. 2014-10-11 16:18:51 -05:00
Andreas Hansson
0746e92cd3 stats: Add DRAM power statistics to reference output 2014-10-09 17:52:13 -04:00
Andreas Hansson
c4e91289ae stats: Bump stats for filter, crossbar and config changes 
This patch bumps the stats to reflect the addition of the snoop filter
and snoop stats, the change from bus to crossbar, and the updates to
the ARM regressions that are now using a different CPU and cache
configuration. Lastly, some minor changes are expected due to the
activation cleanup of the CPUs.
 2014-09-20 17:18:53 -04:00
Andreas Hansson
a217eba078 stats: Update stats for CPU and cache changes 
This patch updates the stats to reflect the fixes and changes to the
CPU (mainly the o3), and the caches.
 2014-09-03 07:42:59 -04:00