Matt DeVuyst
18dc80e07b
MIPS: Beef up process initialization.
2009-12-31 15:30:51 -05:00
Gabe Black
ecaa7070e6
MIPS: Implement the SE mode version of rdhwr.
2009-12-31 15:30:51 -05:00
Gabe Black
c70f3c93af
MIPS: Fix decoding of the rdhwr instruction.
2009-12-31 15:30:51 -05:00
Gabe Black
134937b594
MIPS: Implement the set_thread_area system call.
2009-12-31 15:30:50 -05:00
Gabe Black
d3ed32b989
MIPS: Create an artificial control register to hold the thread pointer.
...
In Linux, the set_thread_area system call stores the address of the thread
local storage area into a field of the current thread_info structure. Later,
to access that value, the program uses the rdhwr instruction to read a
"hardware register" with index 29. The 64 bit MIPS manual, volume II, says
that index 29 is reserved for a future ABI extension and should cause a
"Reserved Instruction Exception". In Linux (and potentially other ISAs) that
exception is trapped and emulated to return the value stored by
set_thread_area as if that were actually stored by a physical register.
The tp_value address (as named in the Linux kernel) is ironically stored as a
control register so that it goes with a particular ThreadContext. Syscall
emulation will use that to emulate storing to the OS's thread info structure,
and rdhwr will emulate faulting and returning that value from software by
returning the value itself, as if it was in hardware. In other words, we fake
faking the register in SE mode. In an FS mode implementation it should
work as specified in the manual.
2009-12-31 15:30:50 -05:00
Gabe Black
cc07dcf026
MIPS: Extract CPU pointer from the thread context in scheduleCP0 setMiscReg.
...
The MIPS ISA object expects to be constructed with a CPU pointer it uses to
look at other thread contexts and allow them to be manipulated with control
registers. Unfortunately, that differs from all the other ISA classes and
would complicate their implementation.
This change makes the event constructor use a CPU pointer pulled out of the
thread context passed to setMiscReg instead.
2009-12-31 15:30:50 -05:00
Gabe Black
1261f1d8db
MIPS: Add missing syscall slots.
...
These are all after the existing ones, suggesting they were added after the
original list was created.
2009-12-21 14:59:40 -08:00
Soumyaroop Roy
1bd0f772f1
Alpha: Implement MVI and remaining BWX instructions.
2009-12-20 15:03:23 -06:00
Gabe Black
3e1cda5080
X86: Add a latency that describes how long an interrupt takes to propagate through the IO APIC.
2009-12-19 01:50:06 -08:00
Gabe Black
c7ca1d3c8a
X86: Add a common named flag for signed media operations.
2009-12-19 01:48:31 -08:00
Gabe Black
2554511533
X86: Create a common flag with a name to indicate high multiplies.
2009-12-19 01:48:07 -08:00
Gabe Black
e474079ddc
X86: Create a common flag with a name to indicate scalar media instructions.
2009-12-19 01:47:30 -08:00
Derek Hower
5aa104e072
ruby: cleaned up ruby-lang configuration
2009-12-04 13:12:40 -06:00
Brad Beckmann
5d8a669539
Resurrection of the CMP token protocol to GEM5
2009-11-18 16:34:33 -08:00
Brad Beckmann
dcac2ec24c
ruby: removed the chip pointer from MessageBuffer
...
The Chip object no longer exists and thus is removed from the MessageBuffer
constructor.
2009-11-18 16:34:32 -08:00
Brad Beckmann
c9764b1ff1
ruby: added error message to isinstance check
...
Added error message when a symbol is not an instance of a particular expected
type.
2009-11-18 16:34:32 -08:00
Brad Beckmann
20f872ed2a
ruby: Added boolean to State Machine parameters
...
* * *
ruby: Removed primitive .hh includes
2009-11-18 16:34:32 -08:00
Brad Beckmann
8011e80725
ruby: The persistent table files from GEMS
...
These files are need by the MOESI_CMP_token protocol.
2009-11-18 16:34:32 -08:00
Brad Beckmann
cef3c56163
ruby: MOESI hammer support for DMA reads and writes
2009-11-18 16:34:32 -08:00
Brad Beckmann
dbb2c111cc
ruby: Added a memory controller feature to MOESI hammer
2009-11-18 16:34:32 -08:00
Brad Beckmann
bc12b8432d
ruby: Hammer ruby configuration support
2009-11-18 16:34:32 -08:00
Brad Beckmann
877be2009c
ruby: Changes necessary to get the hammer protocol to work in GEM5
2009-11-18 16:34:32 -08:00
Brad Beckmann
b0973035b4
ruby: added the original hammer protocols from old ruby
2009-11-18 16:34:31 -08:00
Brad Beckmann
2783a7b9ad
ruby: returns the number of LLC needed for broadcast
...
Added feature to CacheMemory to return the number of last level caches.
This count is need for broadcast protocols such as MOESI_hammer.
2009-11-18 16:34:31 -08:00
Brad Beckmann
7b8fcecf11
ruby: cache configuration fix to use bytes
...
Changed cache size to be in bytes instead of kb so that testers can use very
small caches and increase the chance of writeback races.
2009-11-18 16:34:31 -08:00
Brad Beckmann
99338a7460
ruby: fix CacheMemory destructor
2009-11-18 16:33:35 -08:00
Brad Beckmann
7ab484624f
ruby: split CacheMemory.hh into a .hh and a .cc
2009-11-18 16:33:35 -08:00
Brad Beckmann
8b0f970084
ruby: Added default names to message buffers
...
Added default names to message buffers created by the simple network.
2009-11-18 13:55:58 -08:00
Brad Beckmann
ed54ecf1c8
ruby: slicc method error fix
...
Added error message when a method call is not supported by an object.
2009-11-18 13:55:58 -08:00
Brad Beckmann
994169327a
ruby: slicc action error fix
...
Small fix to the State Machine error message when duplicate actions are defined.
2009-11-18 13:55:58 -08:00
Brad Beckmann
cc2db929cb
ruby: slicc state machine error fixes
...
Added error messages when:
- a state does not exist in a machine's list of known states.
- an event does not exist in a machine
- the actions of a certain machine have not been declared
2009-11-18 13:55:58 -08:00
Brad Beckmann
e84881b7a3
ruby: Removed unused action z_stall
2009-11-18 13:55:58 -08:00
Brad Beckmann
b5d2052fa0
m5: Fixed bug in atomic cpu destructor
2009-11-18 13:55:58 -08:00
Brad Beckmann
faf1d97f24
ruby: fixed dma mi example to work with multiple dma ports
2009-11-18 13:55:58 -08:00
Brad Beckmann
f54790977b
m5: removed master and slave deletions.
...
The unresolved destructor call caused a seg fault when called.
2009-11-18 13:55:58 -08:00
Brad Beckmann
4d731a522d
m5: fixed destructor to deschedule the tickEvent and event
2009-11-18 13:55:58 -08:00
Brad Beckmann
93f0069dd5
ruby: getPort function fix
...
Fixed RubyMemory::getPort function to not pass in a -1 for the idx parameter
2009-11-18 13:55:58 -08:00
Brad Beckmann
204d1776ca
ruby: Fixed Directory memory destructor
2009-11-18 13:55:58 -08:00
Brad Beckmann
6e1dc2546c
m5: Added isValidSrc and isValidDest calls to packet.hh
2009-11-18 13:55:58 -08:00
Brad Beckmann
90d6e2652f
ruby: included ruby config parameter ports per core
...
Slightly improved the major hack need to correctly assign the number of ports
per core. CPUs have two ports: icache + dcache. MemTester has one port.
2009-11-18 13:55:58 -08:00
Brad Beckmann
dce53610c3
ruby: Added error check for openning the ruby config file
2009-11-18 13:55:58 -08:00
Brad Beckmann
3cf24f9716
ruby: Support for merging ALPHA_FS and ruby
...
Connects M5 cpu and dma ports directly to ruby sequencers and dma
sequencers. Rubymem also includes a pio port so that pio requests
and be forwarded to a special pio bus connecting to device pio
ports.
2009-11-18 13:55:58 -08:00
Brad Beckmann
d7a4f665ed
ruby: Added more info to bridge error message
2009-11-18 13:55:57 -08:00
Brad Beckmann
17e14efa7e
ruby: Ruby 64-bit address output fixes.
2009-11-18 13:55:57 -08:00
Brad Beckmann
b7cc66af31
ruby: Ruby destruction fix.
2009-11-18 13:55:57 -08:00
Brad Beckmann
5492f71755
ruby: Ruby debug print fixes.
2009-11-18 13:55:57 -08:00
Derek Hower
9ef5e72917
ruby: added sequencer stats to track what requests are waiting on
2009-11-18 11:55:30 -06:00
Derek Hower
d11dd6ed2c
ruby: turned off randomization by default, turned on memory controller random arbitrate
2009-11-18 11:53:43 -06:00
Ali Saidi
422f0d9f10
ARM: Begin implementing CP15
2009-11-17 18:02:09 -06:00
Ali Saidi
0916c376a9
ARM: Differentiate between LDM exception return and LDM user regs.
2009-11-17 18:02:08 -06:00
Ali Saidi
1470dae8e9
ARM: Boilerplate full-system code.
...
--HG--
rename : src/arch/sparc/interrupts.hh => src/arch/arm/interrupts.hh
rename : src/arch/sparc/kernel_stats.hh => src/arch/arm/kernel_stats.hh
rename : src/arch/sparc/stacktrace.cc => src/arch/arm/stacktrace.cc
rename : src/arch/sparc/system.cc => src/arch/arm/system.cc
rename : src/arch/sparc/system.hh => src/arch/arm/system.hh
rename : src/dev/sparc/T1000.py => src/dev/arm/Versatile.py
rename : src/dev/sparc/t1000.cc => src/dev/arm/versatile.cc
rename : src/dev/sparc/t1000.hh => src/dev/arm/versatile.hh
2009-11-17 18:02:08 -06:00
Ali Saidi
171e7f7b24
imported patch isa_fixes2.diff
2009-11-16 11:37:03 -06:00
Gabe Black
9127ee5ac8
ARM: Make the exception return form of ldm restore CPSR.
2009-11-15 00:23:14 -08:00
Gabe Black
903fb8c73d
ARM: Create a new type of load uop that restores spsr into cpsr.
2009-11-15 00:15:42 -08:00
Gabe Black
b41725f723
ARM: Check in the actual change from the last commit.
...
The last commit was somehow empty. This was what was supposed to go in it.
2009-11-14 21:03:10 -08:00
Gabe Black
c4042985d7
ARM: Fix up the implmentation of the msr instruction.
2009-11-14 19:22:30 -08:00
Gabe Black
e2ab64543b
ARM: Define a mask to differentiate purely CPSR bits from CondCodes bits.
2009-11-14 19:22:30 -08:00
Gabe Black
425ebf6bd7
ARM: Add a bitfield to indicate if an immediate should be used.
2009-11-14 19:22:30 -08:00
Gabe Black
e543f16247
ARM: Write some functions to write to the CPSR and SPSR for instructions.
2009-11-14 19:22:30 -08:00
Gabe Black
812e390693
ARM: Fix up the implmentation of the mrs instruction.
2009-11-14 19:22:29 -08:00
Gabe Black
1df0025e28
ARM: More accurately describe the effects of using the control operands.
2009-11-14 19:22:29 -08:00
Gabe Black
50b9149c75
ARM: Hook up the moded versions of the SPSR.
...
These registers can be accessed directly, or through MISCREG_SPSR which will
act as whichever SPSR is appropriate for the current mode.
2009-11-14 19:22:29 -08:00
Ali Saidi
4e9ce1805e
SE: Fix SE mode OS X compilation.
2009-11-14 11:49:01 -06:00
Ali Saidi
48bc573f5f
ARM: Move around decoder to properly decode CP15
2009-11-14 11:25:00 -06:00
Derek Hower
2f5839832e
ruby: added -A option to TwoLevel_SplitL1UnifiedL2 to set the L1 cache size
2009-11-13 09:45:23 -06:00
Derek Hower
f7f475a6f4
ruby: gave ALIASED_REQUEST priority over BUFFER_FULL in sequencer
2009-11-13 09:44:51 -06:00
Derek Hower
2ee04d6587
ruby: reduce the memory usage of ruby by making memory vector page based
2009-11-13 09:43:39 -06:00
Derek Hower
ceb8fde914
ruby: cache memory bugfix
2009-11-13 09:42:47 -06:00
Vince Weaver
8f6744c19c
X86: add ULL to 1's being shifted in 64-bit values
...
Some of the micro-ops weren't casting 1 to ULL before shifting,
which can cause problems. On the perl makerand input this
caused some values to be negative that shouldn't have been.
The casts are done as ULL(1) instead of 1ULL to match others
in the m5 code base.
2009-11-11 17:49:09 -05:00
Gabe Black
5524af83ef
ARM: Fix some bugs in the ISA desc and fill out some instructions.
2009-11-10 23:44:05 -08:00
Gabe Black
850eb54a7c
Merge with the head.
2009-11-10 21:12:53 -08:00
Gabe Black
b8120f6c38
Mem: Eliminate the NO_FAULT request flag.
2009-11-10 21:10:18 -08:00
Gabe Black
2e28da5583
ARM: Implement fault classes.
...
Implement some fault classes using the curriously recurring template pattern,
similar to SPARCs.
2009-11-10 20:34:38 -08:00
Gabe Black
4779020e13
ARM: Fix the integer register indexes.
...
The PC indexes in the various register sets was defined in the section for
unaliased registers which was throwing off the indexing. This moves those
where they belong. Also, to make detecting accesses to the PC easier and
because it's in the same place in all modes, the intRegForceUser function
now passes it through as index 15.
2009-11-10 20:19:55 -08:00
Vince Weaver
53e27c0277
X86: Fix bugs in movd implementation.
...
Unfortunately my implementation of the movd instruction had two bugs.
In one case, when moving a 32-bit value into an xmm register, the
lower half of the xmm register was not zero extended.
The other case is that xmm was used instead of xmmlm as the source
for a register move. My test case didn't notice this at first
as it moved xmm0 to eax, which both have the same register
number.
2009-11-10 11:29:30 -05:00
Vince Weaver
e81cc233a6
X86: Remove double-cast in Cvtf2i micro-op
...
This double cast led to rounding errors which caused
some benchmarks to get the wrong values, most notably lucas
which failed spectacularly due to CVTTSD2SI returning an
off-by-one value. equake was also broken.
2009-11-10 11:18:23 -05:00
Vince Weaver
7da221ca82
syscall: missing initializer in getcwd call
...
This one case was missed during the update to stack-based arguments.
Without this fix, m5 will crash during a gwtcwd call, at least
with X86.
2009-11-09 10:02:55 -05:00
Gabe Black
bbbfdee2ed
X86: Don't panic on faults on prefetches in SE mode.
2009-11-08 22:49:58 -08:00
Gabe Black
44e912c6bd
X86: Explain what really didn't work with unmapped addresses in SE mode.
2009-11-08 22:49:57 -08:00
Gabe Black
53086dfefe
X86: Make x86 use PREFETCH instead of PF_EXCLUSIVE.
2009-11-08 22:49:57 -08:00
Nathan Binkert
b1a1f9aec8
automerge
2009-11-08 20:15:54 -08:00
Steve Reinhardt
374d337693
scons: deal with generated .py files properly
2009-11-08 17:35:49 -08:00
Gabe Black
8a4af3668d
ARM: Support forcing load/store multiple to use user registers.
2009-11-08 15:49:03 -08:00
Gabe Black
bb903b6514
ARM: Simplify the load/store multiple generation code.
...
Specifically, get rid of the big switch statement so more cases can be
handled. Enumerating all the possible settings doesn't scale well. Also do
some minor style clean up.
2009-11-08 15:16:59 -08:00
Nathan Binkert
708faa7677
compile: wrap 64bit numbers with ULL() so 32bit compiles work
...
In the isa_parser, we need to check case statements.
2009-11-08 13:31:59 -08:00
Gabe Black
48525f581c
ARM: Split the condition codes out of the CPSR.
...
This allows those bits to be renamed while allowing the other fields to
control the behavior of the processor.
2009-11-08 02:08:40 -08:00
Gabe Black
d188821d37
ARM: Add in more bits for the mon mode.
2009-11-08 02:01:02 -08:00
Gabe Black
3a3e846151
ARM: Get rid of NumInternalProcRegs.
...
That constant is a carry over from Alpha and doesn't do anything in ARM.
2009-11-08 02:00:55 -08:00
Gabe Black
78bd8fe44f
ARM: Add back in spots for Rhi and Rlo, and use a named constant for LR.
2009-11-08 01:59:20 -08:00
Gabe Black
f63c260d89
ARM: Get rid of the Raddr operand.
2009-11-08 01:57:34 -08:00
Gabe Black
43e9209c21
ARM: Initialize processes in user mode.
...
I accidentally left in a change to test using int registers in system mode.
This change reverts that.
2009-11-08 00:54:32 -08:00
Gabe Black
a2b76516c4
ARM: Implement the shadow registers using register flattening.
2009-11-08 00:07:49 -08:00
Gabe Black
4a454c4f47
ARM: Set up an intregs.hh for ARM.
...
Add constants for all the modes and registers, maps for aliasing, functions
that use the maps and range check, and use a named constant instead of a magic
number for the microcode register.
2009-11-08 00:07:35 -08:00
Gabe Black
18b21c1eca
ARM: Get rid of some unneeded register indexes.
2009-11-07 22:34:33 -08:00
Vince Weaver
5cf2e7ccf0
X86: Fix problem with movhps instruction
...
This problem is like the one fixed with movhpd a few weeks ago.
A +8 displacement is used to access memory when there should
be none.
This fix is needed for the perlbmk spec2k benchmark to run.
2009-11-04 13:22:15 -05:00
Steve Reinhardt
9098010e3f
slicc: tweak file enumeration for scons
...
Right now .cc and .hh files are handled separately, but then
they're just munged together at the end by scons, so it
doesn't buy us anything. Might as well munge from the start
since we'll eventually be adding generated Python files
to the list too.
2009-11-05 11:11:06 -08:00
Steve Reinhardt
058ccfc7fe
slicc: whack some of Nate's leftover debug code
2009-11-05 11:11:05 -08:00
Nathan Binkert
2c5fe6f95e
build: fix compile problems pointed out by gcc 4.4
2009-11-04 16:57:01 -08:00
Steve Reinhardt
fbfe92b5b8
o3: get rid of unused physmem pointer
2009-11-04 14:23:25 -08:00
Vince Weaver
a1042db290
X86: Enable x86_64 vsyscall support
...
64-bit vsyscall is different than 32-bit.
There are only two syscalls, time and gettimeofday.
On a real system, there is complicated code that implements these
without entering the kernel. That would be complicated to implement in m5.
Instead we just place code that calls the regular syscalls (this is how
tools such as valgrind handle this case).
This is needed for the perlbmk spec2k benchmark.
2009-11-04 00:47:12 -05:00
Vince Weaver
9b0a747dd4
X86: Hook up time syscall on X86
...
This has been tested and verified that it works.
2009-11-04 00:19:15 -05:00
Vince Weaver
a12557439b
X86: Add support for x86 psrldq and pslldq instructions
...
These are complicated instructions and the micro-code might be suboptimal.
This has been tested with some small sample programs (attached)
The psrldq instruction is needed by various spec2k programs.
2009-10-30 12:49:37 -04:00
Vince Weaver
5873ec2238
X86: Implement movd_Vo_Edp on X86
...
This patch implements the movd_Vo_Edp series of instructions.
It addresses various concerns by Gabe Black about which file the
instruction belonged in, as well as supporting REX prefixed
instructions properly.
This instruction is needed for some of the spec2k benchmarks, most
notably bzip2.
2009-10-30 15:52:33 -04:00
Vince Weaver
b2067840a6
X86: Implement the X86 sse2 haddpd instruction
...
This patch implements the haddpd instruction.
It fixes the problem in the previous version (pointed out by Gabe Black)
where an incorrect result would happen if you issue the instruction
with the same argument twice, i.e. "haddpd %xmm0,%xmm0"
This instruction is used by many spec2k benchmarks.
2009-10-30 14:19:06 -04:00
Vince Weaver
cf269025f9
X86: Hookup truncate/ftruncate syscalls on X86
...
This patch hooks up the truncate, ftruncate, truncate64 and ftruncate64
system calls on 32-bit and 64-bit X86.
These have been tested on both architectures.
ftruncate/ftruncate64 is needed for the f90 spec2k benchmarks.
2009-10-30 12:51:13 -04:00
Vince Weaver
9ad3acab5e
SysCalls: Implement truncate64 system call
...
This uses the new stack-based argument infrastructure.
Tested on x86 and x86_64.
2009-10-30 12:31:55 -04:00
Gabe Black
d6ff7929b3
Syscalls: Fix a warning turned error about an unused variable in m5.fast.
2009-10-31 13:20:22 -07:00
Gabe Black
3f722b991f
Syscalls: Make system calls access arguments like a stack, not an array.
...
When accessing arguments for a syscall, the position of an argument depends on
the policies of the ISA, how much space preceding arguments took up, and the
"alignment" of the index for this particular argument into the number of
possible storate locations. This change adjusts getSyscallArg to take its
index parameter by reference instead of value and to adjust it to point to the
possible location of the next argument on the stack, basically just after the
current one. This way, the rules for the new argument can be applied locally
without knowing about other arguments since those have already been taken into
account implicitly.
All system calls have also been changed to reflect the new interface. In a
number of cases this made the implementation clearer since it encourages
arguments to be collected in one place in order and then used as necessary
later, as opposed to scattering them throughout the function or using them in
place in long expressions. It also discourages using getSyscallArg over and
over to retrieve the same value when a temporary would do the job.
2009-10-30 00:44:55 -07:00
Nathan Binkert
25d9328689
license: Fix license on network model code
...
This mostly was a matter of changing the license owner to Princeton
which is as it should have been. The code was originally licensed
under the GPL but was relicensed as BSD by Li-Shiuan Peh on July 27,
2009. This relicensing was in an explicit e-mail to Nathan Binkert,
Brad Beckmann, Mark Hill, David Wood, and Steve Reinhardt.
2009-10-28 11:56:56 -07:00
Gabe Black
f9624e49f6
X86: Replace "DISPLACEMENT" with disp in movhpd.
2009-10-27 23:50:25 -07:00
Vince Weaver
87b97f28bd
Fix problem with the x86 sse movhpd instruction.
...
The movhpd instruction was writing to the wrong memory offset.
2009-10-27 14:11:06 -04:00
Vince Weaver
14691148cd
Implement X86 sse2 movdqu and movdqa instructions
...
The movdqa instruction should enforce 16-byte alignment.
This implementation does not do that.
These instructions are needed for most of x86_64 spec2k to run.
2009-10-21 13:40:43 -04:00
Vince Weaver
5b6f707a00
hook up stat syscall on 64-bit x86_SE
2009-10-20 16:48:00 -04:00
Derek Hower
22d9a53080
ruby: removed obsolete configuration files
2009-10-20 15:29:02 -05:00
Vince Weaver
2b473cb099
hook up stat64 syscall on 32-bit X86_SE
2009-10-20 14:44:51 -04:00
Vince Weaver
776f9405fa
Fix stat64 structure on 32-bit X86_SE
...
The st_size entry was in the wrong place
(see linux-2.6.29/arch/x86/include/asm/stat.h )
Also, the packed attribute is needed when compiling on a
64-bit machine, otherwise gcc adds extra padding that
break the layout of the structure.
2009-10-20 15:15:37 -04:00
Timothy M. Jones
835a55e7f3
POWER: Add support for the Power ISA
...
This adds support for the 32-bit, big endian Power ISA. This supports both
integer and floating point instructions based on the Power ISA Book I v2.06.
2009-10-27 09:24:39 -07:00
Brad Beckmann
0fdfc82bde
fixed error message generation bug in SLICC ast files
2009-10-26 17:06:32 -07:00
Timothy M. Jones
1b2d75d6d2
syscall: Addition of an ioctl command code for Power.
2009-10-24 10:53:59 -07:00
Timothy M. Jones
03da1e53c2
syscall: Zero out memory that already exists during the brk system call.
...
Glibc often assumes that memory it receives from the kernel after a brk
system call will contain only zeros. This is important during a calloc,
because it won't clear the new memory itself. In the simulator, if the
new page exists, it will be cleared using this patch, to mimic the kernel's
functionality.
2009-10-24 10:53:58 -07:00
Timothy M. Jones
cc21f862e2
syscall: Fix conversion of the stat64 buffer during system calls.
2009-10-24 10:53:58 -07:00
Timothy M. Jones
c32d919bc0
syscall: Implementation of the ftruncate64 system call.
2009-10-24 10:53:58 -07:00
Timothy M. Jones
7cdd5316ab
syscall: Implementation of the time system call.
2009-10-24 10:53:57 -07:00
Timothy M. Jones
6c60db8ce9
syscall: Implementation of the times system call
2009-10-24 10:53:57 -07:00
Vince Weaver
56154cff5e
Enable getuid and getgid related syscalls on X86_SE
...
I've tested these on x86 and they work as expected.
In theory for 32-bit x86 we should have some sort of special
handling for the legacy 16-bit uid/gid syscalls, but in practice
modern toolchains don't use the 16-bit versions, and m5 sets the uid
and gid values to be less than 16-bits anyway.
This fix is needed for the perl spec2k benchmarks to run.
2009-10-19 17:29:34 -04:00
Derek Hower
909bac6840
ruby: add parameter to config to set # of l2 banks
2009-10-16 16:31:16 -05:00
Vince Weaver
22dc2b5595
Ignore rt_sigaction() syscalls on x86 and x86_64
...
This is currently how alpha handles this syscall.
This is needed for the gcc spec2k benchmarks to run.
2009-10-16 13:54:20 -04:00
Gabe Black
010b13c937
ISA: Fix compilation.
2009-10-17 01:13:41 -07:00
Brad Beckmann
28204b2a96
fixed MC146818 checkpointing bug and added isa serialization calls to simple_thread
2009-10-15 15:15:24 -07:00
Vince Weaver
30a185dcd0
Hook up the munmap() syscall for 32-bit x86.
...
This is straightforward, as munmapFunc() doesn't do anything.
I've tested it with code running munmap() just in case.
2009-10-10 22:31:56 -07:00
Derek Hower
4505216282
merge
2009-10-07 15:48:26 -05:00
Steve Reinhardt
8a761c44af
bus: add assertion to catch illegal retry
...
on mem-inhibited transaction.
2009-10-03 18:07:39 -07:00
Gabe Black
44ceb80c2d
X86: Make successive anonymous mmaps move down in 32 bit SE mode Linux.
2009-10-02 01:32:58 -07:00
Gabe Black
86f3bec76d
SE mode: Make the direction anonymous mmaps move through memory configurable.
2009-10-02 01:32:00 -07:00
Korey Sewell
f09f84da6e
inorder-debug: print out workload
2009-10-01 09:35:06 -04:00
Lisa Hsu
1290a5f340
commit Soumyaroop's bug catch about max_insts_all_threads
2009-09-29 18:03:10 -04:00
Nathan Binkert
160bcf4442
python: Fix m5.defines so grabbing flags works correctly
2009-09-26 12:51:37 -07:00
Steve Reinhardt
4bec4702e9
O3: Add flag to control whether faulting instructions are traced.
...
When enabled, faulting instructions appear in the trace twice
(once when they fault and again when they're re-executed).
This flag is set by the Exec compound flag for backwards compatibility.
2009-09-26 10:50:50 -07:00
Steve Reinhardt
f679630788
Minor cleanup: Use the blockAlign() method where it applies in the cache.
2009-09-26 10:50:50 -07:00
Steve Reinhardt
72cfed4164
Force prefetches to check cache and MSHRs immediately prior to issue.
...
This prevents redundant prefetches from being issued, solving the
occasional 'needsExclusive && !blk->isWritable()' assertion failure
in cache_impl.hh that several people have run into.
Eliminates "prefetch_cache_check_push" flag, neither setting of
which really solved the problem.
2009-09-26 10:50:50 -07:00
Steve Reinhardt
f28ea7a6c9
O3: Mark fetch stage as active if it faults.
...
Otherwise if the rest of the pipeline is idle then
fault will never propagate to commit to be handled,
causing CPU to deadlock.
2009-09-26 10:50:50 -07:00
Derek Hower
d9a2450054
protocol: cleaned up MESI...got rid of unneccessary virtual networks
2009-09-25 17:51:51 -05:00
Derek Hower
83a9dc2939
ruby: more helpful config error message
2009-09-25 17:51:12 -05:00
Derek Hower
26990dc492
slicc: removed unused atomics code from StateMachine
2009-09-25 17:47:38 -05:00
Korey Sewell
25d1f2728a
inorder-debug: fix cpu tick debug message
2009-09-25 11:18:55 -04:00
Nathan Binkert
baca1f0566
isa_parser: Turn the ISA Parser into a subclass of Grammar.
...
This is to prepare for future cleanup where we allow SCons to create a
separate grammar class for each ISA
2009-09-23 18:28:29 -07:00
Nathan Binkert
bae6a4a4d9
ply grammar: Fixup Tokenizer class so you can get lexer arguments
2009-09-23 18:28:29 -07:00
Nathan Binkert
be0d74d6f6
ruby: Disable all debug output by default
2009-09-23 18:17:11 -07:00
Nathan Binkert
d9f39c8ce7
arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh
2009-09-23 08:34:21 -07:00
Nathan Binkert
2278363015
slicc: Pure python implementation of slicc.
...
This is simply a translation of the C++ slicc into python with very minimal
reorganization of the code. The output can be verified as nearly identical
by doing a "diff -wBur".
Slicc can easily be run manually by using util/slicc
2009-09-22 18:12:39 -07:00
Nathan Binkert
30d5d95b6a
params: small cleanup to param description internals
2009-09-22 15:24:16 -07:00
Nathan Binkert
e9288b2cd3
scons: add slicc and ply to sys.path and PYTHONPATH so everyone has access
2009-09-22 15:24:16 -07:00
Nathan Binkert
9a8cb7db7e
python: Move more code into m5.util allow SCons to use that code.
...
Get rid of misc.py and just stick misc things in __init__.py
Move utility functions out of SCons files and into m5.util
Move utility type stuff from m5/__init__.py to m5/util/__init__.py
Remove buildEnv from m5 and allow access only from m5.defines
Rename AddToPath to addToPath while we're moving it to m5.util
Rename read_command to readCommand while we're moving it
Rename compare_versions to compareVersions while we're moving it.
--HG--
rename : src/python/m5/convert.py => src/python/m5/util/convert.py
rename : src/python/m5/smartdict.py => src/python/m5/util/smartdict.py
2009-09-22 15:24:16 -07:00
Nathan Binkert
0d58d32ad5
multiattrdict: make multilevel nesting work properly
2009-09-22 15:24:16 -07:00
Nathan Binkert
eec67312b5
attrdict: add pickle support to attrdict
2009-09-22 15:24:16 -07:00
Nathan Binkert
aa78db4ada
code_formatter: use __builtin__ which is correct, not __builtins__
2009-09-22 15:24:16 -07:00
Polina Dudnik
4f463b3a26
Atomics bug fix
2009-09-21 13:04:52 -05:00
Polina Dudnik
114d8724dd
Functionality migrated to sequencer.
2009-09-17 17:39:52 -05:00
Korey Sewell
b7094ec38b
mips: fix command line arguments
...
arguments were not being saved correctly into M5 memory
2009-09-17 15:59:43 -04:00
Korey Sewell
6f7e196113
inorder-mdu: multiplier latency fix
...
mdu was workign incorrectly for 4+ latency due to incorrectly assuming
multiply was finished the next stage
2009-09-17 15:45:27 -04:00
Gabe Black
931405da2f
X86: Fix the expected size of the immediate offset in MOV_MI.
2009-09-17 02:56:06 -07:00
Gabe Black
c876a781a5
X86: Sign extend the immediate of wripi like the register version.
2009-09-16 19:29:51 -07:00
Gabe Black
7a0ef6c36f
X86: Make the imm8 member of immediate microops really 8 bits consistently.
2009-09-16 19:28:57 -07:00
Gabe Black
239f1dea31
X86: Fix checking the NT bit during an IRET.
2009-09-16 19:28:30 -07:00
Gabe Black
eec6bfaa9d
X86: Fix setting the busy bit in the task descriptor in LTR.
2009-09-16 19:28:01 -07:00
Soumyaroop Roy
83eebe0464
inorder-smt: remove hardcoded values
...
allows for the 2T hello world example to work in inorder model
2009-09-16 09:47:38 -04:00
Vince Weaver
9b8e61beb3
Syscalls: Implement sysinfo() syscall.
2009-09-15 22:36:47 -07:00
Derek Hower
31a3ef03cb
ruby: improve libruby_issue_request feedback
2009-09-15 21:37:40 -05:00
Derek Hower
144459032a
removed isReady from the library interface
2009-09-15 20:49:54 -05:00
Derek Hower
20da0f788c
ruby: added broadcast mechanism
2009-09-15 20:39:00 -05:00
Derek Hower
a06cfa199f
ruby: added unified assert script
2009-09-15 11:32:11 -05:00
Derek Hower
803cf3b434
ruby: made configuration parameters uniform
2009-09-15 09:47:11 -05:00
Vince Weaver
0f569b4d9d
SPARC: Make resTemp in udivcc wide enough to hold all the bits we need.
2009-09-15 05:48:20 -07:00
Vince Weaver
9900ac95b5
[mq]: x86syscalls.patch
2009-09-15 05:30:08 -07:00
Korey Sewell
badb2382a8
inorder-alpha-fs: edit inorder model to compile FS mode
2009-09-15 01:44:48 -04:00
Derek Hower
11f3f83068
ruby:removed unused code from CacheMemory
2009-09-14 17:52:46 -05:00
Derek Hower
18e328cb63
ruby: configuration updates
2009-09-14 17:11:02 -05:00
Derek Hower
62b06f4a70
ruby: removed stray printf
2009-09-14 17:09:26 -05:00
Derek Hower
75c2baa81c
merge
2009-09-11 16:23:17 -05:00
Derek Hower
6fc2a4cadc
ruby: cleaned up unified MESI/MOESI configuration
2009-09-11 16:22:59 -05:00
Polina Dudnik
c7f0cf9803
Added new MESI files
2009-09-11 16:19:31 -05:00
Derek Hower
bd770274b0
merge
2009-09-11 14:17:21 -05:00
Polina Dudnik
8cdd7265ce
Config adjustments for MESI
2009-09-11 11:07:22 -05:00
Polina Dudnik
fc9ebc60db
Somayeh's MESI protocol with Polina's bug fixes
2009-09-11 11:04:55 -05:00
Polina Dudnik
7ef3e3b2c2
MI data corruption bug fix
2009-09-11 10:59:35 -05:00
Polina Dudnik
353a69eae7
Object print bug fix
2009-09-11 10:59:08 -05:00
Polina Dudnik
2af2e590e1
MOESI data corruption bug fix
2009-09-11 10:58:37 -05:00
Derek Hower
1e40ee4ea0
Automated merge with ssh://hg@m5sim.org/m5
2009-09-10 22:02:13 -05:00
Derek Hower
0637fe0bfd
ruby: removed SMT-related Sequencer assert
2009-09-10 21:19:54 -05:00
Derek Hower
ef87b6dc82
ruby: made randomization true by default
2009-09-10 21:19:34 -05:00
Derek Hower
26acdd4f34
protocol: made MI_example work with unordered networks
2009-09-10 21:18:09 -05:00
Derek Hower
e6e3ccf5c0
ruby: made L2 request/response latency based on cache latency by default
2009-09-10 13:32:16 -05:00
Derek Hower
3bb2fcfc84
ruby: made Locked read/write atomic requests within ruby
2009-09-09 12:39:10 -05:00
Polina Dudnik
ca0e0c3683
SCons fix to always make MemTest object
2009-09-01 10:38:25 -05:00
Derek Hower
edd522b30a
Automated merge with ssh://hg@m5sim.org/m5
2009-09-01 09:36:53 -05:00
Derek Hower
849bad7ad7
ruby: fixed config assertion failure
2009-09-01 09:35:48 -05:00
Polina Dudnik
041a8cefc7
[mq]: MOESI_patch
2009-08-31 16:38:22 -05:00
Polina Dudnik
a02dbd61f9
Reset the atomics flags if RMW_Read is not followed by a RMW_Read or RMW_Write
2009-08-28 15:09:41 -05:00
Polina Dudnik
95da6dc84c
imported patch mi_patch
2009-08-28 15:04:55 -05:00
Derek Hower
15aa180570
merge
2009-08-25 10:37:21 -05:00
Derek Hower
6cd552483b
Automated merge with ssh://hg@m5sim.org/m5
2009-08-25 10:10:23 -05:00
Derek Hower
03bf748ac7
ruby: CacheMemory tag lookup uses a hash instead of a loop
2009-08-25 10:09:47 -05:00
Gabe Black
e251b42c59
Merge with head.
2009-08-23 14:19:14 -07:00
Gabe Black
d0d597004f
X86: Preserve the NO_ACCESS flag when giving CDA a specialized interface.
2009-08-23 14:16:58 -07:00
Gabe Black
ce63e50364
Atomic CPU: Respect the NO_ACCESS request flag.
2009-08-23 14:15:15 -07:00
Polina Dudnik
a4fc1bad94
[mq]: first_patch
2009-08-21 15:52:46 -05:00
Nathan Binkert
890be77362
X86: fix some simple compile issues
...
static should not be used for constants that are not inside a class definition.
2009-08-21 09:10:25 -07:00
Gabe Black
f6bb7ec4eb
RTC: Make calls to writeData update the RTCs internal representation of time.
2009-08-20 23:09:03 -07:00
Gabe Black
da3c3bfa98
X86: Make the real time clock actually keep track of time.
2009-08-20 00:42:43 -07:00
Gabe Black
e8c0ca5cd1
X86: Fix the decoding for and fill out FST and FSTP.
2009-08-20 00:42:14 -07:00
Gabe Black
843d064668
X86: Add microassembler symbols for floating point stack register operands.
2009-08-20 00:41:27 -07:00
Gabe Black
bc67396ada
X86: Don't insist on binary encoding for the RTC since we implement BCD.
2009-08-20 00:40:14 -07:00
Derek Hower
efc1dddbd8
ruby: added random seed option to config scripts
2009-08-18 16:24:09 -05:00
Gabe Black
ed088ed15e
X86: Decode the immediate byte opcode extension for 3dNow! instructions.
2009-08-18 00:52:47 -07:00
Gabe Black
fd45c04cad
X86: Decode three byte opcodes.
2009-08-18 00:52:45 -07:00
Gabe Black
a1ea10d7ba
Merge with head.
2009-08-17 22:39:10 -07:00
Gabe Black
8f49cd1123
X86: Move the simulated date in X86_FS forward to 2012.
2009-08-17 20:25:15 -07:00
Gabe Black
9df74ab401
X86: Double check the two byte portion of the decoder and fix bugs/clean up.
2009-08-17 20:25:15 -07:00
Gabe Black
92867cac95
X86: Implement MOVNTI.
2009-08-17 20:25:15 -07:00
Gabe Black
6415252a0f
X86: Initialize the MXCSR in SE mode.
2009-08-17 20:25:14 -07:00
Gabe Black
56d87cdc08
X86: Implement MOVQ2DQ.
2009-08-17 20:25:14 -07:00
Gabe Black
317a9ac6d1
X86: Implement MOVDQ2Q.
2009-08-17 20:25:14 -07:00
Gabe Black
1606663aa9
X86: Implement the media instructions that convert fp values to ints.
2009-08-17 20:25:14 -07:00
Gabe Black
e3ef432a55
X86: Implement a microop for converting fp values to ints.
2009-08-17 20:25:14 -07:00
Gabe Black
123ea3b229
X86: Implement the instructions that compare fp values and write a mask as a result.
2009-08-17 20:25:14 -07:00
Gabe Black
288f428632
X86: Implement a microop that compares fp values and writes a mask as a result.
2009-08-17 20:25:14 -07:00
Gabe Black
87ad677209
X86: Implement the instructions that compare fp values and write to rflags.
2009-08-17 20:25:14 -07:00
Gabe Black
2c9ee52c37
X86: Implement a microop that compares fp values and writes to rflags.
2009-08-17 20:25:14 -07:00
Gabe Black
7d4db7266e
X86: Implement MOVSS.
2009-08-17 20:25:14 -07:00
Gabe Black
179fd4e536
X86: Implement LDMXCSR.
2009-08-17 20:25:14 -07:00
Gabe Black
b315c3effc
X86: Implement STMXCSR.
2009-08-17 20:25:13 -07:00
Gabe Black
7fbd9e1296
X86: Implement the shuffle media instructions.
2009-08-17 20:25:13 -07:00
Gabe Black
1fed0161d9
X86: Implement a shuffle media microop.
2009-08-17 20:25:13 -07:00
Gabe Black
d9970f139a
X86: Implement the mask move instructions.
2009-08-17 20:22:56 -07:00
Gabe Black
75528a497c
X86: Implement a mask move microop.
2009-08-17 20:22:56 -07:00
Gabe Black
90dc1abd0b
X86: Implement the instructions that move sign bits.
2009-08-17 20:22:56 -07:00
Gabe Black
90786e43fc
X86: Implement a microop that moves sign bits.
2009-08-17 20:22:56 -07:00
Gabe Black
4c23e631f2
X86: Implement the insert/extract instructions.
2009-08-17 20:22:56 -07:00
Gabe Black
c0e850c77a
X86: Fix a bug in the decoder where the insert/extract instructions go.
2009-08-17 20:22:56 -07:00
Gabe Black
965e546df3
X86: Extend mov2int and mov2fp so they can support insert and extract instructions.
2009-08-17 20:22:56 -07:00
Gabe Black
2beab367d7
X86: Implement the media average instructions.
2009-08-17 20:15:16 -07:00
Gabe Black
f6b12bfa8d
X86: Implement a media average microop.
2009-08-17 20:15:16 -07:00
Gabe Black
45bae0c70f
X86: Implement the multiply and add instructions.
2009-08-17 20:15:16 -07:00
Gabe Black
200fed31de
X86: Let the integer multiply microop use every other possible source value.
2009-08-17 20:15:16 -07:00
Gabe Black
cf2fc2613d
X86: Implement the media shifts that operate on 64 bits or less at a time.
2009-08-17 20:15:16 -07:00
Gabe Black
c8a0cf5df7
X86: Implement the media shift microops. These don't handle full 128 bit wide shifts.
2009-08-17 20:15:16 -07:00
Gabe Black
dabbc7d9d3
X86: Implement the sum of absolute differences instructions.
2009-08-17 20:15:16 -07:00
Gabe Black
470dcef229
X86: Implement a "sum of absolute differences" microop.
2009-08-17 20:15:16 -07:00
Gabe Black
31d29ee3f8
X86: Implement the media integer subtract instructions.
2009-08-17 20:15:15 -07:00
Gabe Black
a4437f8f14
X86: Implement an integer media subtract microop.
2009-08-17 20:15:15 -07:00