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Author SHA1 Message Date
Steve Reinhardt
29be31ce31 Fix handling of writeback-induced writebacks in atomic mode. 
--HG--
extra : convert_revision : 4fa64f8a929f1aa36a9d5a71b8d1816b497aca4c
 2008-03-25 10:01:21 -04:00
Steve Reinhardt
623dd7ed3a Delete the Request for a no-response Packet 
when the Packet is deleted, since the requester
can't possibly do it.

--HG--
extra : convert_revision : 8571b144ecb3c70efc06d09faa8b3161fb58352d
 2008-03-24 01:08:02 -04:00
Steve Reinhardt
93ab43288a Don't FastAlloc MSHRs since we don't allocate them on the fly. 
--HG--
extra : convert_revision : 02775cfb460afe6df0df0938c62cccd93a71e775
 2008-03-24 01:08:02 -04:00
Steve Reinhardt
407710d387 Fix cache problem with writes to tempBlock 
getting wrong writeback address.

--HG--
extra : convert_revision : 023dfb69c227c13a69bfe2744c6af75a45828b0b
 2008-03-22 22:17:15 -04:00
Steve Reinhardt
b051ae6acc Fix a few Packet memory leaks. 
--HG--
extra : convert_revision : 00db19f0698c0786f0dff561eea9217860a5a05a
 2008-03-17 03:08:28 -04:00
Steve Reinhardt
131c65f429 Restructure bus timing calcs to cope with pkt being deleted by target. 
--HG--
extra : convert_revision : db8497e73a44f2a06aab121e797e88b4c0c31330
 2008-03-17 03:07:38 -04:00
Steve Reinhardt
19c367fa8f Fix subtle cache bug where read could return stale data 
if a prior write miss arrived while an even earlier
read miss was still outstanding.

--HG--
extra : convert_revision : 4924e145829b2ecf4610b88d33f4773510c6801a
 2008-03-15 05:03:55 -07:00
Steve Reinhardt
e6d6adc731 Revamp cache timing access mshr check to make stats sane again. 
--HG--
extra : convert_revision : 37009b8ee536807073b5a5ca07ed1d097a496aea
 2008-02-26 22:03:28 -08:00
Steve Reinhardt
bdf3323915 Cache: better comments particularly regarding writeback situation. 
--HG--
extra : convert_revision : 59ff9ee63ee0fec5a7dfc27b485b737455ccf362
 2008-02-26 20:17:26 -08:00
Gabe Black
ec1a4cbbc7 Bus: Fix the bus timing to be more realistic. 
--HG--
extra : convert_revision : acd70dc98ab840e55b114706fbb6afb2a95e54bc
 2008-02-26 02:20:08 -05:00
Steve Reinhardt
4597a71cef Make L2+ caches allocate new block for writeback misses 
instead of forwarding down the line.

--HG--
extra : convert_revision : b0d6e7862c92ea7a2d21f817d30398735e7bb8ba
 2008-02-16 14:58:03 -05:00
Nicolas Zea
4c7eb21119 Bus: Only update port cache when there is an item to update it with. 
--HG--
extra : convert_revision : 84848fd48bb9e6693a0518c862364142b1969aa8
 2008-02-10 19:41:03 -05:00
Steve Reinhardt
9d7a69c582 Fix #include lines for renamed cache files. 
--HG--
extra : convert_revision : b5008115dc5b34958246608757e69a3fa43b85c5
 2008-02-10 14:45:25 -08:00
Steve Reinhardt
d56e77c180 Rename cache files for brevity and consistency with rest of tree. 
--HG--
rename : src/mem/cache/base_cache.cc => src/mem/cache/base.cc
rename : src/mem/cache/base_cache.hh => src/mem/cache/base.hh
rename : src/mem/cache/cache_blk.cc => src/mem/cache/blk.cc
rename : src/mem/cache/cache_blk.hh => src/mem/cache/blk.hh
rename : src/mem/cache/cache_builder.cc => src/mem/cache/builder.cc
rename : src/mem/cache/miss/mshr.cc => src/mem/cache/mshr.cc
rename : src/mem/cache/miss/mshr.hh => src/mem/cache/mshr.hh
rename : src/mem/cache/miss/mshr_queue.cc => src/mem/cache/mshr_queue.cc
rename : src/mem/cache/miss/mshr_queue.hh => src/mem/cache/mshr_queue.hh
rename : src/mem/cache/prefetch/base_prefetcher.cc => src/mem/cache/prefetch/base.cc
rename : src/mem/cache/prefetch/base_prefetcher.hh => src/mem/cache/prefetch/base.hh
rename : src/mem/cache/prefetch/ghb_prefetcher.cc => src/mem/cache/prefetch/ghb.cc
rename : src/mem/cache/prefetch/ghb_prefetcher.hh => src/mem/cache/prefetch/ghb.hh
rename : src/mem/cache/prefetch/stride_prefetcher.cc => src/mem/cache/prefetch/stride.cc
rename : src/mem/cache/prefetch/stride_prefetcher.hh => src/mem/cache/prefetch/stride.hh
rename : src/mem/cache/prefetch/tagged_prefetcher.cc => src/mem/cache/prefetch/tagged.cc
rename : src/mem/cache/prefetch/tagged_prefetcher.hh => src/mem/cache/prefetch/tagged.hh
rename : src/mem/cache/tags/base_tags.cc => src/mem/cache/tags/base.cc
rename : src/mem/cache/tags/base_tags.hh => src/mem/cache/tags/base.hh
rename : src/mem/cache/tags/Repl.py => src/mem/cache/tags/iic_repl/Repl.py
rename : src/mem/cache/tags/repl/gen.cc => src/mem/cache/tags/iic_repl/gen.cc
rename : src/mem/cache/tags/repl/gen.hh => src/mem/cache/tags/iic_repl/gen.hh
rename : src/mem/cache/tags/repl/repl.hh => src/mem/cache/tags/iic_repl/repl.hh
extra : convert_revision : ff7a35cc155a8d80317563c45cebe405984eac62
 2008-02-10 14:15:42 -08:00
Stephen Hines
6cc1573923 Make the Event::description() a const function 
--HG--
extra : convert_revision : c7768d54d3f78685e93920069f5485083ca989c0
 2008-02-06 16:32:40 -05:00
Geoffrey Blake
f9c54d5a4b Temporary fix for ll/sc bug see flyspray task for more info: 
http://www.m5sim.org/flyspray/task/197

Signed-off by: Ali Saidi <saidi@eecs.umich.edu>

--HG--
extra : convert_revision : cdeece7e3163de9abf2c6c7435f1bc93570fab81
 2008-01-06 00:19:45 -05:00
Steve Reinhardt
6c5a3ab8b2 Add ReadRespWithInvalidate to handle multi-level coherence situation 
where we defer a response to a read from a far-away cache A, then later
defer a ReadExcl from a cache B on the same bus as us.  We'll assert
MemInhibit in both cases, but in the latter case MemInhibit will keep
the invalidation from reaching cache A.  This special response tells
cache A that it gets the block to satisfy its read, but must immediately
invalidate it.

--HG--
extra : convert_revision : f85c8b47bb30232da37ac861b50a6539dc81161b
 2008-01-02 15:22:38 -08:00
Steve Reinhardt
bf9b3821bd Mark cache-to-cache MSHRs as downstreamPending when necessary. 
Don't mark upstream MSHR as pending if downstream MSHR is already in service.

--HG--
extra : convert_revision : e1c135ff00217291db58ce8a06ccde34c403d37f
 2008-01-02 15:18:33 -08:00
Steve Reinhardt
538da9e24d Don't DPRINTF in the middle of a PrintReq. 
--HG--
extra : convert_revision : 6358c014d14a19a34111c39827b05987507544bb
 2008-01-02 14:42:42 -08:00
Steve Reinhardt
87e5fd1755 Bug fix: functional cache port now needs otherPort set. 
--HG--
extra : convert_revision : fb007df73a77535a5dba19341f7b0b32e8c99548
 2008-01-02 14:42:24 -08:00
Steve Reinhardt
cde5a79eab Additional comments and helper functions for PrintReq. 
--HG--
extra : convert_revision : 7eadf9b7db8c0289480f771271b6efe2400006d4
 2008-01-02 13:46:22 -08:00
Steve Reinhardt
3952e41ab1 Add functional PrintReq command for memory-system debugging. 
--HG--
extra : convert_revision : 73b753e57c355b7e6873f047ddc8cb371c3136b7
 2008-01-02 12:20:15 -08:00
Steve Reinhardt
659aef3eb8 Fix formatting and comments in cache_impl.hh 
--HG--
extra : convert_revision : 26d71cca5420ad03e16bf174e15dabe7f902da41
 2008-01-02 12:15:48 -08:00
Gabe Black
8a020d40d3 Make ports that aren't connected to anything fail more gracefully. 
--HG--
extra : convert_revision : 3803b28fb2fdfd729f01f1a44df2ae02ef83a2fc
 2007-11-28 14:39:19 -08:00
Ali Saidi
8026ecbb8e Memory: Cache the physical memory start and size so we don't need a dynamic cast on every access. 
--HG--
extra : convert_revision : d6c3e93718991e7b68248242c80d8e6ac637ac51
 2007-11-19 18:23:43 -05:00
Steve Reinhardt
7d83cf35e1 Tweak check for writable block fill. 
--HG--
extra : convert_revision : c04281bcfc4cd23c7613aeccb21dc74452bcc951
 2007-11-16 20:10:33 -08:00
Steve Reinhardt
f03a62008a Fix bug on exclusive response to ReadReq with pending WriteReq. 
--HG--
extra : convert_revision : 5429cd7ca84cf6348813a4607fa16f76aa5df7e0
 2007-11-16 20:10:32 -08:00
Korey Sewell
375ddf8d25 branch merge 
--HG--
extra : convert_revision : 1c56f3c6f2c50d642d2de5ddde83a55234455cec
 2007-11-15 00:14:20 -05:00
Ali Saidi
7c8e4ca3a3 Checkpointing: Name SE page table entries better so that there isn't a problem if multiple workloads are being run at once. 
--HG--
extra : convert_revision : 3bac9bd7fd93fcadf764e2991c5b029f2c745c08
 2007-11-14 23:42:08 -05:00
Korey Sewell
bfdd2f379b remove unnecessary debug messages I added 
--HG--
extra : convert_revision : 5c23218fd1b899fa7fe42701f7cb2f6033f7a583
 2007-11-14 06:18:58 -05:00
Korey Sewell
2692590049 Add in files from merge-bare-iron, get them compiling in FS and SE mode 
--HG--
extra : convert_revision : d4e19afda897bc3797868b40469ce2ec7ec7d251
 2007-11-13 16:58:16 -05:00
Ali Saidi
c8123cef1b Cache: Fix for OS X 10.5 compiling. 
--HG--
extra : convert_revision : ba3c33ed524367280eefc096177d767168ac2cf6
 2007-11-04 18:57:36 -05:00
Ali Saidi
333ac6cc32 DRAM: Make latency parameters be Param.Latency instead of ints. 
--HG--
extra : convert_revision : 553b86cc4653da089d7aa0045a3f3bdcabf6c4d8
 2007-11-01 17:30:50 -04:00
Steve Reinhardt
90f42bf3ad Merge in bus DPRINTF changes. 
--HG--
extra : convert_revision : 3bbd7c0745b31bb2a628b604ab1627cd9c61643c
 2007-10-31 00:39:16 -07:00
Ali Saidi
538fae951b Traceflags: Add SCons function to created a traceflag instead of having one file with them all. 
--HG--
extra : convert_revision : 427f6bd8f050861ace3bc0d354a1afa5fc8319e6
 2007-10-31 01:21:54 -04:00
Gabe Black
fddfa71658 TLB: Fix serialization issues with the tlb entries and make the page table store the process, not the system. 
--HG--
extra : convert_revision : 2421af11f62f60fb48faeee6bddadac2987df0e8
 2007-10-25 19:04:44 -07:00
Ali Saidi
0711f4f17a SE: Fix page table and system serialization, don't reinit process if this is a checkpoint restore. 
--HG--
extra : convert_revision : 03dcf3c088e57b7abab60efe700d947117888306
 2007-10-25 20:13:35 -04:00
Steve Reinhardt
76c4c5fabc mem: clean up bus/cache DPRINTFs a bit 
Not so much noise on failed sends, and more complete
info when grepping a trace using an address.

--HG--
extra : convert_revision : 05a8261c9452072ca08b906200c6322b33e2b9f1
 2007-09-16 16:46:38 -07:00
Ali Saidi
bf7c01d43d Bus: Fix drain code; old method could return 1 in atomic mode and never call de->process(). 
--HG--
extra : convert_revision : 35990e5eaf93f7a95a0ec72e9f92034a042def3e
 2007-09-05 17:12:41 -04:00
Miles Kaufmann
54cc0053f0 params: Deprecate old-style constructors; update most SimObject constructors. 
SimObjects not yet updated:
- Process and subclasses
- BaseCPU and subclasses

The SimObject(const std::string &name) constructor was removed.  Subclasses
that still rely on that behavior must call the parent initializer as
  : SimObject(makeParams(name))

--HG--
extra : convert_revision : d6faddde76e7c3361ebdbd0a7b372a40941c12ed
 2007-08-30 15:16:59 -04:00
Gabe Black
7227ab5f22 Merge with head 
--HG--
extra : convert_revision : cc73b9aaf73e9dacf52f3350fa591e67ca4ccee6
 2007-08-26 21:45:40 -07:00
Gabe Black
9b49a78cfd Address translation: Make the page table more flexible. 
The page table now stores actual page table entries. It is still a templated
class here, but this will be corrected in the near future.

--HG--
extra : convert_revision : 804dcc6320414c2b3ab76a74a15295bd24e1d13d
 2007-08-26 20:33:57 -07:00
Ali Saidi
02353a60ee MemorySystem: Fix the use of ?: to produce correct results. 
--HG--
extra : convert_revision : 31aad7170b35556a4c984f4ebc013137d55d85eb
 2007-08-12 19:43:54 -04:00
Ali Saidi
06a9f58c68 DMA: Add IOCache and fix bus bridge to optionally only send requests one 
way so a cache can handle partial block requests for i/o devices.

--HG--
extra : convert_revision : a68b5ae826731bc87ed93eb7ef326a2393053964
 2007-08-10 16:14:01 -04:00
Ali Saidi
5c38668ed6 Bus: Only call end() on an stl object once in a loop 
--HG--
extra : convert_revision : 238dcd6da7577b533e52ada2107591c4e9168ebd
 2007-08-10 16:14:01 -04:00
Vincentius Robby
3d40cba8d4 Port, StaticInst: Revert unnecessary changes. 
--HG--
extra : convert_revision : e6ef262bbbc5ad53498e55caac1897e6cc2a61e6
 2007-08-08 14:54:02 -04:00
Vincentius Robby
13d10e844c alpha: Make the TLB cache to actually work. 
Improve MRU checking for StaticInst, Bus, TLB

--HG--
extra : convert_revision : 9116b5655cd2986aeb4205438aad4a0f5a440006
 2007-08-08 14:18:09 -04:00
Vincentius Robby
1db9e1fb8f port: Implement cache for port interfaces and ranges 
--HG--
extra : convert_revision : d7cbec7c277fb8f4d8846203caae36ce629602d5
 2007-08-04 16:05:55 -04:00
Steve Reinhardt
62aa1d7f55 cache: get rid of obsolete params from python. 
--HG--
extra : convert_revision : cd40e0ef938ef6da1cccedf7be01c3ac5b4883fb
 2007-08-03 03:51:13 -04:00
Steve Reinhardt
2f93db6f95 memory system: fix functional access bug. 
Make sure not to keep processing functional accesses
after they've been responded to.
Also use checkFunctional() return value instead of checking
packet command field where possible, mostly just for consistency.

--HG--
extra : convert_revision : 29fc76bc18731bd93a4ed05a281297827028ef75
 2007-07-29 20:17:03 -07:00
Steve Reinhardt
4a7d0c4b79 bus: take out response prioritization (timing was messed up). 
Also make express snoops not occupy bus (since they're magic).

--HG--
extra : convert_revision : 75aa5211a59380026d1e3f122778425e48e2edcd
 2007-07-29 13:24:48 -07:00
Steve Reinhardt
8705b0799b packet: get rid of unused intersect() function. 
--HG--
extra : convert_revision : f0a2947ccc49e0d18bc17a59371fa396d9ebd6c0
 2007-07-27 12:46:55 -07:00
Steve Reinhardt
0cbcb715e0 cache/memtest: fixes for functional accesses. 
--HG--
extra : convert_revision : 688ba4d882cad2c96cf44c9e46999f74266e02ee
 2007-07-27 12:46:45 -07:00
Steve Reinhardt
01c9d34a0b cache: Get rid of unused variable. 
--HG--
extra : convert_revision : 394adc12fbd7ea10280a1b8d6bc3cb15ee019f27
 2007-07-27 03:51:15 -04:00
Nathan Binkert
f0fef8f850 Merge python and x86 changes with cache branch 
--HG--
extra : convert_revision : e06a950964286604274fba81dcca362d75847233
 2007-07-26 23:15:49 -07:00
Steve Reinhardt
6b73ff43ff Have owner respond to UpgradeReq to avoid race. 
--HG--
extra : convert_revision : 30916fca6978c73d8a14558f2d7288c1eab54ad4
 2007-07-26 17:04:17 -07:00
Steve Reinhardt
c3bf59dcb9 Add downward express snoops for invalidations. 
--HG--
extra : convert_revision : 4916fa9721d727d8416ad8c07df3a8171d02b2b4
 2007-07-26 17:04:17 -07:00
Steve Reinhardt
f1b5c8fb57 Continue snooping after a writeback is encountered. 
--HG--
extra : convert_revision : 8411338a6c0fdd7072dd32bdffacdace62d5de90
 2007-07-26 17:04:16 -07:00
Steve Reinhardt
58250b8e5f bus: Fix default port handling. 
--HG--
extra : convert_revision : 121b6e31cddff17c51fc4f3df20e7e2bde87d04f
 2007-07-26 17:04:12 -07:00
Steve Reinhardt
c1097d06f7 Can't block on memInhibit packets 
(now that bus no longer filters them for us).

--HG--
extra : convert_revision : 34e7eaf5ee1e739f5557a2d417e569ed2ceb14b3
 2007-07-25 07:47:37 -07:00
Steve Reinhardt
de52eebd3b Integrate snoop loop functions into their respective call sites. 
Also some additional cleanup of Bus::recvTiming().

--HG--
extra : convert_revision : 156814119f75d04c2e954aec2d7ed6fdc186c26f
 2007-07-24 22:37:41 -07:00
Steve Reinhardt
d094f9cf27 Don't delete request at target... requester still needs it. 
--HG--
extra : convert_revision : 76377ca2e4d7ea70d1d54d325a63ce710e260b93
 2007-07-24 22:36:10 -07:00
Steve Reinhardt
1f9ea6e122 A couple more minor bug fixes for multilevel coherence. 
--HG--
extra : convert_revision : 370f9e34911157765be6fd49e826fa1af589b466
 2007-07-23 22:28:40 -07:00
Nathan Binkert
abc76f20cb Major changes to how SimObjects are created and initialized. Almost all 
creation and initialization now happens in python.  Parameter objects
are generated and initialized by python.  The .ini file is now solely for
debugging purposes and is not used in construction of the objects in any
way.

--HG--
extra : convert_revision : 7e722873e417cb3d696f2e34c35ff488b7bff4ed
 2007-07-23 21:51:38 -07:00
Steve Reinhardt
82e2a35576 Replace lowerMSHRPending flag with more robust scheme 
based on following Packet senderState links.

--HG--
extra : convert_revision : 9027d59bd7242aa0e4275bf94d8b1fb27bd59d79
 2007-07-22 21:43:38 -07:00
Steve Reinhardt
1c2d5f5e64 Replace DeferredSnoop flag with LowerMSHRPending flag. 
Turns out DeferredSnoop isn't quite the right bit of info
we needed... see new comment in cache_impl.hh.

--HG--
extra : convert_revision : a38de8c1677a37acafb743b7074ef88b21d3b7be
 2007-07-22 08:09:24 -07:00
Steve Reinhardt
1edd143b68 A few minor non-debug compilation issues. 
--HG--
extra : convert_revision : d59a5cad6187a2229dddd1a48282ebd2923d1d8d
 2007-07-22 03:07:26 -04:00
Steve Reinhardt
92ce2b5974 Deal with invalidations intersecting outstanding upgrades. 
If the invalidation beats the upgrade at a lower level
then the upgrade must be converted to a read exclusive
"in the field".
Restructure target list & deferred target list to
factor out some common code.

--HG--
extra : convert_revision : 7bab4482dd6c48efdb619610f0d3778c60ff777a
 2007-07-21 18:18:42 -07:00
Steve Reinhardt
9117860094 Several more fixes for multi-level timing coherence. 
- Add "deferred snoop" flag to Packet so upper-level caches
  can distinguish whether lower-level cache request was
  in-service or not at the time of the original snoop.
- Revamp response handling to properly handle deferred snoops
  on non-cache-fill requests (i.e. upgrades).
- Make sure forwarded writebacks are kept in write buffer at
  lower-level caches so they get snooped properly.

--HG--
extra : convert_revision : 17f8a3772a1ae31a16991a53f8225ddf54d31fc9
 2007-07-21 13:45:17 -07:00
Steve Reinhardt
a67a0025b3 Make sure responses never get blocked. 
--HG--
extra : convert_revision : 29f359d743994a94dc403aa0621ba72cd137d1a1
 2007-07-17 08:15:23 -07:00
Steve Reinhardt
a25f3ac67f Forward cache-to-cache responses through other caches. 
--HG--
extra : convert_revision : 5b6a02255bccd98b00949703cf4ba4b221553cea
 2007-07-17 06:33:28 -07:00
Steve Reinhardt
ff13827ccb Assert that an mshr has a target in getTarget(). 
--HG--
extra : convert_revision : 08091670fc319876012ed139fcd2584c364a980c
 2007-07-17 06:23:11 -07:00
Steve Reinhardt
884807a68a Fix up a bunch of multilevel coherence issues. 
Atomic mode seems to work.  Timing is closer but not there yet.

--HG--
extra : convert_revision : 0dea5c3d4b973d009e9d4a4c21b9cad15961d56f
 2007-07-15 20:11:06 -07:00
Steve Reinhardt
f790f34fe3 Make Bus::findPort() a little more useful. 
Move check for loops outside, since half the call sites
end up working around it anyway.  Return integer port ID
instead of port object pointer.

--HG--
extra : convert_revision : 4c31fe9930f4d1aa4919e764efb7c50d43792ea3
 2007-07-15 20:09:03 -07:00
Steve Reinhardt
15a51d0cae Add CacheRepl trace flag and move a couple DPRINTFs to it. 
--HG--
extra : convert_revision : 31724d19ebdf2cdc2a2bafff83d17845b3a0b183
 2007-07-14 13:28:52 -07:00
Steve Reinhardt
abd194df5c Move a couple of DPRINTFs from Cache to CachePort. 
--HG--
extra : convert_revision : 55a0d26660aeb8f63b41897d53e6b2d1f0a163be
 2007-07-14 13:16:58 -07:00
Steve Reinhardt
3b4ff75939 Fix bug in copying packet with static data pointer. 
--HG--
extra : convert_revision : 2fcf99f050d73e007433c1db2475f2893c5961a0
 2007-07-14 13:14:53 -07:00
Steve Reinhardt
a51e16dc89 Merge of DPRINTF fixes from head. 
--HG--
extra : convert_revision : f99a33b2df6a6c5592856d17d00e73ee83267442
 2007-07-14 12:09:37 -07:00
Steve Reinhardt
7cd6c7ee05 Fix & tweak DPRINTFs for tracediff w/new cache code. 
Note that we should *not* print pointer values in DPRINTFs as
these needlessly clutter tracediff output.

--HG--
extra : convert_revision : 25a448f1b3ac8d453a717a104ad6dc0112fb30bb
 2007-07-14 11:48:30 -07:00
Steve Reinhardt
4738649e32 Delete packets when we're done with them. 
--HG--
extra : convert_revision : b8894d26e1ca7a6c9b736500accdaa53bfb09558
 2007-07-03 00:40:31 -04:00
Steve Reinhardt
4b68652c87 Couple more minor bug fixes for FS timing mode. 
src/cpu/simple/timing.cc:
    Fix another SC problem.
src/mem/cache/cache_impl.hh:
    Forgot to call makeTimingResponse() on uncached timing responses.

--HG--
extra : convert_revision : 5a5a58ca2053e4e8de2133205bfd37de15eb4209
 2007-07-02 13:57:45 -07:00
Steve Reinhardt
e9c04dad60 Fix a couple LL/SC bugs that only affected timing mode. 
src/cpu/simple/timing.cc:
    Fix swap/stq_c command bug.
src/mem/packet.cc:
    Fix incorrect LoadLockedReq command response field.

--HG--
extra : convert_revision : 7a4523be900bc2c9b1bdf2d372ce55f89ae58ae5
 2007-07-02 09:26:36 -07:00
Steve Reinhardt
ffd697e149 bus.cc: 
Fix atomic timing issue.

src/mem/bus.cc:
    Fix atomic timing issue.

--HG--
extra : convert_revision : a22ff80cd75f83c785b0604c2a4fde2e2e9f71ef
 2007-07-02 01:02:35 -07:00
Steve Reinhardt
5e59739416 Don't propagate snoops across bridges. Wouldn't work anyway. 
--HG--
extra : convert_revision : af29fc7d0c134f5e89dd2e814c819151350fcb38
 2007-06-30 18:03:17 -07:00
Steve Reinhardt
07f091d6ed Get rid of remaining traces of obsolete CoherenceProtocol object. 
--HG--
extra : convert_revision : c5555b00bef1b304a84886188ad2c0dcb4d7c5b9
 2007-06-30 17:59:45 -07:00
Steve Reinhardt
d10a843723 Get rid of obsolete fixPacket() functions. 
Handled by Packet::checkFunctional() now.

--HG--
extra : convert_revision : 63642254e2789c80a369ac269f317ec054ffe3c0
 2007-06-30 17:51:29 -07:00
Steve Reinhardt
ee54ad318a Event descriptions should not end in "event" 
(they function as adjectives not nouns)

--HG--
extra : convert_revision : 6506474ff3356ae8c80ed276c3608d8a4680bfdb
 2007-06-30 17:45:58 -07:00
Steve Reinhardt
f0c4dd7920 Factor out a little more common code. 
--HG--
extra : convert_revision : 626255a91679d534030c91bcdb4fc1bed36ceb9b
 2007-06-30 13:56:25 -07:00
Steve Reinhardt
6babda7123 Fix up a few statistics problems. 
Stats pretty much line up with old code, except:
- bug in old code included L1 latency in L2 miss time, making it too high
- UniCoherence did cache-to-cache transfers even from non-owner caches,
so occasionally the icache would get a block from the dcache not the L2
- L2 can now receive ReadExReq from L1 since L1s have coherence

--HG--
extra : convert_revision : 5052c1a1767b5a662f30a88f16012165a73b791c
 2007-06-30 13:34:16 -07:00
Steve Reinhardt
6ab53415ef Get rid of Packet result field. Error responses are 
now encoded in cmd field.

--HG--
extra : convert_revision : d67819b7e3ee4b9a5bf08541104de0a89485e90b
 2007-06-30 10:16:18 -07:00
Steve Reinhardt
9117c94f9c Get rid of coherence protocol object. 
--HG--
extra : convert_revision : 4ff144342dca23af9a12a2169ca318a002654b42
 2007-06-27 20:54:13 -07:00
Steve Reinhardt
c4903e0882 Revamp replacement-of-upgrade handling. 
--HG--
extra : convert_revision : 9bc09d8ae6d50e6dfbb4ab21514612f9aa102a2e
 2007-06-26 23:30:30 -07:00
Steve Reinhardt
1b20df5607 Handle deferred snoops better. 
--HG--
extra : convert_revision : 703da6128832eb0d5cfed7724e5105f4b3fe4f90
 2007-06-26 22:23:10 -07:00
Steve Reinhardt
69ff6d9163 cache_impl.hh: 
Change target overflow from assertion to warning.

src/mem/cache/cache_impl.hh:
    Change target overflow from assertion to warning.

--HG--
extra : convert_revision : ceca990ed916bbf96dedd4836c40df522803f173
 2007-06-26 18:01:22 -04:00
Steve Reinhardt
7dacbcf492 Handle replacement of block with pending upgrade. 
src/mem/cache/tags/lru.cc:
    Add some replacement DPRINTFs

--HG--
extra : convert_revision : 7993ec24d6af7e7774d04ce36f20e3f43f887fd9
 2007-06-26 14:53:15 -07:00
Steve Reinhardt
f697e959a1 Couple minor bug fixes... 
src/mem/cache/cache_impl.hh:
    Handle grants with no packet.
src/mem/cache/miss/mshr.cc:
    Fix MSHR snoop hit handling.

--HG--
extra : convert_revision : f365283afddaa07cb9e050b2981ad6a898c14451
 2007-06-25 22:23:29 -07:00
Steve Reinhardt
529f12a531 Get rid of requestCauses. Use timestamped queue to make 
sure we don't re-request bus prematurely.  Use callback to
avoid calling sendRetry() recursively within recvTiming.

--HG--
extra : convert_revision : a907a2781b4b00aa8eb1ea7147afc81d6b424140
 2007-06-25 06:47:05 -07:00
Steve Reinhardt
47bce8ef78 Better handling of deferred targets. 
--HG--
extra : convert_revision : 0fbc28c32c1eeb3dd672df14c1d53bd516f81d0f
 2007-06-24 17:32:31 -07:00
Steve Reinhardt
57ff2604e5 Minor fix plus new assertion to catch similar bugs. 
src/cpu/memtest/memtest.cc:
    Need to set packet source field so that response from cache
    doesn't run into assertion failure when copying source to dest.
src/mem/packet.hh:
    Copy source field when copying packets.
    Assert that source is valid before copying it to dest
    when turning packets around.

--HG--
extra : convert_revision : 09e3cfda424aa89fe170e21e955b295746832bf8
 2007-06-23 13:24:33 -07:00
Steve Reinhardt
bdd5fd20fb Fixes to hitLatency, blocking, buffer allocation. 
Single-cpu timing mode seems to work now.

--HG--
extra : convert_revision : 720f6172df18a1c941e5bd0e8fdfbd686c13c7ad
 2007-06-22 09:24:07 -07:00