sanchayanmaity/gem5
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity
gem5/tests/long/se/10.mcf/ref/sparc/linux/simple-timing/config.ini

366 lines
7.1 KiB
INI
Raw Normal View History

Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
[root]
type=Root
children=system
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
full_system=false
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
sim_quantum=0
Stats: Re update stats.
2011-02-08 04:23:13 +01:00
time_sync_enable=false
time_sync_period=100000000000
time_sync_spin_threshold=100000000
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
[system]
type=System
stats: updates due to recent ruby and x86 changes Also updates many out of date config files.
2014-09-01 23:55:52 +02:00
children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
boot_osflags=a
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
cache_line_size=64
clk_domain=system.clk_domain
stats: update references
2016-07-21 18:19:18 +02:00
default_p_state=UNDEFINED
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
stats: update references
2016-07-21 18:19:18 +02:00
exit_on_work_items=false
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
init_param=0
kernel=
stats: updates due to recent ruby and x86 changes Also updates many out of date config files.
2014-09-01 23:55:52 +02:00
kernel_addr_check=true
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
load_addr_mask=1099511627775
stats: updates due to recent ruby and x86 changes Also updates many out of date config files.
2014-09-01 23:55:52 +02:00
load_offset=0
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
mem_mode=timing
mem_ranges=
SPARC: update SE stats for FP fix --HG-- extra : rebase_source : 954a009a9f8eef6cae6050ee99f264e0fb456f85
2011-12-01 00:57:11 +01:00
memories=system.physmem
stats: update stale config.ini files, eio and few other stats.
2015-07-04 17:43:47 +02:00
mmap_using_noreserve=false
stats: update references
2016-07-21 18:19:18 +02:00
multi_thread=false
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
num_work_ids=16
stats: update references
2016-07-21 18:19:18 +02:00
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
readfile=
symbolfile=
stats: update references
2016-07-21 18:19:18 +02:00
thermal_components=
thermal_model=Null
Stats: Re update stats.
2011-02-08 04:23:13 +01:00
work_begin_ckpt_count=0
work_begin_cpu_id_exit=-1
work_begin_exit_count=0
work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
system_port=system.membus.slave[0]
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
[system.clk_domain]
type=SrcClockDomain
clock=1000
stats: updates due to recent ruby and x86 changes Also updates many out of date config files.
2014-09-01 23:55:52 +02:00
domain_id=-1
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
stats: updates due to recent ruby and x86 changes Also updates many out of date config files.
2014-09-01 23:55:52 +02:00
init_perf_level=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
voltage_domain=system.voltage_domain
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
[system.cpu]
type=TimingSimpleCPU
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload
stats: updates due to recent ruby and x86 changes Also updates many out of date config files.
2014-09-01 23:55:52 +02:00
branchPred=Null
Update stats for new prefetching fixes. Prefetching is not enabled in any of our regressions, so no significant stat values have changed, but zero-valued prefetch stats no longer show up when prefetching is disabled so there are noticable changes in the reference stat files anyway.
2009-02-16 18:09:45 +01:00
checker=Null
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.cpu_clk_domain
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
cpu_id=0
stats: update references
2016-07-21 18:19:18 +02:00
default_p_state=UNDEFINED
Update stats for new prefetching fixes. Prefetching is not enabled in any of our regressions, so no significant stat values have changed, but zero-valued prefetch stats no longer show up when prefetching is disabled so there are noticable changes in the reference stat files anyway.
2009-02-16 18:09:45 +01:00
do_checkpoint_insts=true
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
do_quiesce=true
Update stats for new prefetching fixes. Prefetching is not enabled in any of our regressions, so no significant stat values have changed, but zero-valued prefetch stats no longer show up when prefetching is disabled so there are noticable changes in the reference stat files anyway.
2009-02-16 18:09:45 +01:00
do_statistics_insts=true
Stats: Update the stats. --HG-- extra : convert_revision : 888b6e3bcd432a9318d4b8741a8b274c6f37f1a8
2007-08-27 05:27:53 +02:00
dtb=system.cpu.dtb
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
function_trace=false
function_trace_start=0
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
interrupts=system.cpu.interrupts
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
isa=system.cpu.isa
Stats: Update the stats. --HG-- extra : convert_revision : 888b6e3bcd432a9318d4b8741a8b274c6f37f1a8
2007-08-27 05:27:53 +02:00
itb=system.cpu.itb
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
max_insts_all_threads=0
max_insts_any_thread=0
max_loads_all_threads=0
max_loads_any_thread=0
tests: Update all tests for small outstanding changes. Little differences have accumulated over time and it's worth getting things back in sync for the stable release.
2008-09-28 23:16:26 +02:00
numThreads=1
stats: update references
2016-07-21 18:19:18 +02:00
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
profile=0
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
progress_interval=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
simpoint_start_insts=
stats: updates due to recent ruby and x86 changes Also updates many out of date config files.
2014-09-01 23:55:52 +02:00
socket_id=0
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
switched_out=false
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
system=system
Regression: Update stats for cache changes. --HG-- extra : convert_revision : 005672e722dec00cb4c38501b5189b4eb7515ca1
2007-08-13 01:43:55 +02:00
tracer=system.cpu.tracer
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
workload=system.cpu.workload
dcache_port=system.cpu.dcache.cpu_side
icache_port=system.cpu.icache.cpu_side
[system.cpu.dcache]
stats: updates due to recent changesets including d0934b57735a
2015-09-15 15:14:09 +02:00
type=Cache
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
children=tags
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
addr_ranges=0:18446744073709551615
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
assoc=2
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.cpu_clk_domain
stats: update references
2016-07-21 18:19:18 +02:00
clusivity=mostly_incl
default_p_state=UNDEFINED
stats: update stale config.ini files, eio and few other stats.
2015-07-04 17:43:47 +02:00
demand_mshr_reserve=1
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
hit_latency=2
stats: update stale config.ini files, eio and few other stats.
2015-07-04 17:43:47 +02:00
is_read_only=false
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
max_miss_count=0
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
mshrs=4
stats: update references
2016-07-21 18:19:18 +02:00
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
Update stats for new prefetching fixes. Prefetching is not enabled in any of our regressions, so no significant stat values have changed, but zero-valued prefetch stats no longer show up when prefetching is disabled so there are noticable changes in the reference stat files anyway.
2009-02-16 18:09:45 +01:00
prefetch_on_access=false
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
prefetcher=Null
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
response_latency=2
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
sequential_access=false
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
size=262144
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
system=system
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
tags=system.cpu.dcache.tags
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
tgts_per_mshr=20
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
write_buffers=8
stats: update references
2016-07-21 18:19:18 +02:00
writeback_clean=false
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
cpu_side=system.cpu.dcache_port
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
mem_side=system.cpu.toL2Bus.slave[1]
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
[system.cpu.dcache.tags]
type=LRU
assoc=2
block_size=64
clk_domain=system.cpu_clk_domain
stats: update references
2016-07-21 18:19:18 +02:00
default_p_state=UNDEFINED
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
hit_latency=2
stats: update references
2016-07-21 18:19:18 +02:00
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
sequential_access=false
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
size=262144
Stats: Update the stats. --HG-- extra : convert_revision : 888b6e3bcd432a9318d4b8741a8b274c6f37f1a8
2007-08-27 05:27:53 +02:00
[system.cpu.dtb]
tests: update tests for TLB unification
2009-04-09 07:21:30 +02:00
type=SparcTLB
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
Stats: Update the stats. --HG-- extra : convert_revision : 888b6e3bcd432a9318d4b8741a8b274c6f37f1a8
2007-08-27 05:27:53 +02:00
size=64
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
[system.cpu.icache]
stats: updates due to recent changesets including d0934b57735a
2015-09-15 15:14:09 +02:00
type=Cache
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
children=tags
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
addr_ranges=0:18446744073709551615
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
assoc=2
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.cpu_clk_domain
stats: update references
2016-07-21 18:19:18 +02:00
clusivity=mostly_incl
default_p_state=UNDEFINED
stats: update stale config.ini files, eio and few other stats.
2015-07-04 17:43:47 +02:00
demand_mshr_reserve=1
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
hit_latency=2
stats: update stale config.ini files, eio and few other stats.
2015-07-04 17:43:47 +02:00
is_read_only=true
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
max_miss_count=0
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
mshrs=4
stats: update references
2016-07-21 18:19:18 +02:00
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
Update stats for new prefetching fixes. Prefetching is not enabled in any of our regressions, so no significant stat values have changed, but zero-valued prefetch stats no longer show up when prefetching is disabled so there are noticable changes in the reference stat files anyway.
2009-02-16 18:09:45 +01:00
prefetch_on_access=false
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
prefetcher=Null
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
response_latency=2
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
sequential_access=false
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
size=131072
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
system=system
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
tags=system.cpu.icache.tags
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
tgts_per_mshr=20
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
write_buffers=8
stats: update references
2016-07-21 18:19:18 +02:00
writeback_clean=true
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
cpu_side=system.cpu.icache_port
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
mem_side=system.cpu.toL2Bus.slave[0]
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
[system.cpu.icache.tags]
type=LRU
assoc=2
block_size=64
clk_domain=system.cpu_clk_domain
stats: update references
2016-07-21 18:19:18 +02:00
default_p_state=UNDEFINED
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
hit_latency=2
stats: update references
2016-07-21 18:19:18 +02:00
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
sequential_access=false
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
size=131072
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
[system.cpu.interrupts]
type=SparcInterrupts
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
[system.cpu.isa]
type=SparcISA
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
Stats: Update the stats. --HG-- extra : convert_revision : 888b6e3bcd432a9318d4b8741a8b274c6f37f1a8
2007-08-27 05:27:53 +02:00
[system.cpu.itb]
tests: update tests for TLB unification
2009-04-09 07:21:30 +02:00
type=SparcTLB
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
Stats: Update the stats. --HG-- extra : convert_revision : 888b6e3bcd432a9318d4b8741a8b274c6f37f1a8
2007-08-27 05:27:53 +02:00
size=64
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
[system.cpu.l2cache]
stats: updates due to recent changesets including d0934b57735a
2015-09-15 15:14:09 +02:00
type=Cache
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
children=tags
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
addr_ranges=0:18446744073709551615
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
assoc=8
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.cpu_clk_domain
stats: update references
2016-07-21 18:19:18 +02:00
clusivity=mostly_incl
default_p_state=UNDEFINED
stats: update stale config.ini files, eio and few other stats.
2015-07-04 17:43:47 +02:00
demand_mshr_reserve=1
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
hit_latency=20
stats: update stale config.ini files, eio and few other stats.
2015-07-04 17:43:47 +02:00
is_read_only=false
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
max_miss_count=0
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
mshrs=20
stats: update references
2016-07-21 18:19:18 +02:00
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
Update stats for new prefetching fixes. Prefetching is not enabled in any of our regressions, so no significant stat values have changed, but zero-valued prefetch stats no longer show up when prefetching is disabled so there are noticable changes in the reference stat files anyway.
2009-02-16 18:09:45 +01:00
prefetch_on_access=false
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
prefetcher=Null
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
response_latency=20
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
sequential_access=false
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
size=2097152
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
system=system
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
tags=system.cpu.l2cache.tags
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
tgts_per_mshr=12
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
write_buffers=8
stats: update references
2016-07-21 18:19:18 +02:00
writeback_clean=false
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
[system.cpu.l2cache.tags]
type=LRU
assoc=8
block_size=64
clk_domain=system.cpu_clk_domain
stats: update references
2016-07-21 18:19:18 +02:00
default_p_state=UNDEFINED
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
hit_latency=20
stats: update references
2016-07-21 18:19:18 +02:00
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
sequential_access=false
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
size=2097152
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
[system.cpu.toL2Bus]
stats: updates due to changes to x86, stale configs.
2014-10-11 23:18:51 +02:00
type=CoherentXBar
stats: update references
2016-07-21 18:19:18 +02:00
children=snoop_filter
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.cpu_clk_domain
stats: update references
2016-07-21 18:19:18 +02:00
default_p_state=UNDEFINED
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
stats: update stale config.ini files, eio and few other stats.
2015-07-04 17:43:47 +02:00
forward_latency=0
frontend_latency=1
stats: update references
2016-07-21 18:19:18 +02:00
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
point_of_coherency=false
power_model=Null
stats: update stale config.ini files, eio and few other stats.
2015-07-04 17:43:47 +02:00
response_latency=1
stats: update references
2016-07-21 18:19:18 +02:00
snoop_filter=system.cpu.toL2Bus.snoop_filter
stats: update stale config.ini files, eio and few other stats.
2015-07-04 17:43:47 +02:00
snoop_response_latency=1
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
system=system
tests: update reference config.ini files for previous cset Rename 'responder_set' to 'use_default_range'.
2010-08-17 14:06:22 +02:00
use_default_range=false
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
width=32
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
stats: update references
2016-07-21 18:19:18 +02:00
[system.cpu.toL2Bus.snoop_filter]
type=SnoopFilter
eventq_index=0
lookup_latency=0
max_capacity=8388608
system=system
Regression: Update stats for cache changes. --HG-- extra : convert_revision : 005672e722dec00cb4c38501b5189b4eb7515ca1
2007-08-13 01:43:55 +02:00
[system.cpu.tracer]
type=ExeTracer
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
Regression: Update stats for cache changes. --HG-- extra : convert_revision : 005672e722dec00cb4c38501b5189b4eb7515ca1
2007-08-13 01:43:55 +02:00
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
[system.cpu.workload]
type=LiveProcess
cmd=mcf mcf.in
stats: Update stats for syscall emulation Linux kernel changes.
2012-08-15 16:38:05 +02:00
cwd=build/SPARC/tests/opt/long/se/10.mcf/sparc/linux/simple-timing
stats: update stale config.ini files, eio and few other stats.
2015-07-04 17:43:47 +02:00
drivers=
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
egid=100
env=
regress: update regressions for tty emulation fix.
2008-07-25 01:31:54 +02:00
errout=cerr
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
euid=100
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
stats: update references
2016-07-21 18:19:18 +02:00
executable=/arm/projectscratch/randd/systems/dist/cpu2000/binaries/sparc/linux/mcf
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
gid=100
stats: update references
2016-07-21 18:19:18 +02:00
input=/arm/projectscratch/randd/systems/dist/cpu2000/data/mcf/smred/input/mcf.in
stats: update stale config.ini files, eio and few other stats.
2015-07-04 17:43:47 +02:00
kvmInSE=false
SPARC: Combine the 64 and 32 bit process initialization code. Alignment is done as it was for 32 bit processes. --HG-- extra : convert_revision : 9368ad40dcc7911f8fc7ec1468c6a28aa92d196f
2007-11-29 09:00:02 +01:00
max_stack_size=67108864
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
output=cout
pid=100
ppid=99
tests: update config.ini and stdout for the various tests. These files were a bit too out of date and resulted in a bit of confusion.
2008-07-22 23:00:18 +02:00
simpoint=55300000000
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
system=system
uid=100
stats: updates due to changes to x86, stale configs.
2014-10-11 23:18:51 +02:00
useArchPT=false
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
[system.cpu_clk_domain]
type=SrcClockDomain
clock=500
stats: updates due to recent ruby and x86 changes Also updates many out of date config files.
2014-09-01 23:55:52 +02:00
domain_id=-1
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
stats: updates due to recent ruby and x86 changes Also updates many out of date config files.
2014-09-01 23:55:52 +02:00
init_perf_level=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
voltage_domain=system.voltage_domain
stats: updates due to recent ruby and x86 changes Also updates many out of date config files.
2014-09-01 23:55:52 +02:00
[system.dvfs_handler]
type=DVFSHandler
domains=
enable=false
eventq_index=0
sys_clk_domain=system.clk_domain
transition_latency=100000000
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
[system.membus]
stats: updates due to changes to x86, stale configs.
2014-10-11 23:18:51 +02:00
type=CoherentXBar
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.clk_domain
stats: update references
2016-07-21 18:19:18 +02:00
default_p_state=UNDEFINED
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
stats: update stale config.ini files, eio and few other stats.
2015-07-04 17:43:47 +02:00
forward_latency=4
frontend_latency=3
stats: update references
2016-07-21 18:19:18 +02:00
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
point_of_coherency=true
power_model=Null
stats: update stale config.ini files, eio and few other stats.
2015-07-04 17:43:47 +02:00
response_latency=2
stats: updates due to changes to x86, stale configs.
2014-10-11 23:18:51 +02:00
snoop_filter=Null
stats: update stale config.ini files, eio and few other stats.
2015-07-04 17:43:47 +02:00
snoop_response_latency=4
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
system=system
tests: update reference config.ini files for previous cset Rename 'responder_set' to 'use_default_range'.
2010-08-17 14:06:22 +02:00
use_default_range=false
stats: update stale config.ini files, eio and few other stats.
2015-07-04 17:43:47 +02:00
width=16
stats: Update stats for syscall emulation Linux kernel changes.
2012-08-15 16:38:05 +02:00
master=system.physmem.port
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
slave=system.system_port system.cpu.l2cache.mem_side
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
[system.physmem]
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
type=SimpleMemory
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
bandwidth=73.000000
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.clk_domain
conf_table_reported=true
stats: update references
2016-07-21 18:19:18 +02:00
default_p_state=UNDEFINED
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
in_addr_map=true
Make default PhysicalMemory latency slightly more realistic. Also update stats to reflect change.
2008-08-04 00:13:29 +02:00
latency=30000
tests: update config.ini and stdout for the various tests. These files were a bit too out of date and resulted in a bit of confusion.
2008-07-22 23:00:18 +02:00
latency_var=0
null=false
stats: update references
2016-07-21 18:19:18 +02:00
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
SPARC: Combine the 64 and 32 bit process initialization code. Alignment is done as it was for 32 bit processes. --HG-- extra : convert_revision : 9368ad40dcc7911f8fc7ec1468c6a28aa92d196f
2007-11-29 09:00:02 +01:00
range=0:268435455
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
port=system.membus.master[0]
Added a SPARC_SE simple timing mcf regression. --HG-- extra : convert_revision : d8fea11c37bd3f0b5f5e8880c92b711892ee8125
2007-03-30 00:39:34 +02:00
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
[system.voltage_domain]
type=VoltageDomain
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
voltage=1.000000
Reference in a new issue Copy permalink