81a735a716
Time to make the ide device work
arch/alpha/system.cc:
write the machine type and rev in the correct place
cpu/simple/cpu.cc:
reset the packet structure every time it's reused... wow the
simple cpu code for talking to memory is getting horrible.
dev/alpha_console.cc:
move the setAlphaAccess to startup() to make sure that the console
binary is loaded
dev/tsunami_cchip.cc:
dev/tsunami_pchip.cc:
dev/uart8250.cc:
fix a couple of bugs injected in the newmem fixes
mem/bus.cc:
More verbose bus tracing
mem/packet.hh:
Add a constructor to packet to set the result to unknown and a reset
method in the case it's being reused
mem/vport.hh:
don't need are own read/write methods since the base functional port
ones call writeBlob readBlob which do the translation for us
--HG--
extra : convert_revision : 8d0e2b782bfbf13dc5c59dab1a79a084d2a7da0a
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|---|---|---|
| .. | ||
| memtest | ||
| o3 | ||
| ozone | ||
| simple | ||
| trace | ||
| base.cc | ||
| base.hh | ||
| base_dyn_inst.cc | ||
| base_dyn_inst.hh | ||
| cpu_exec_context.cc | ||
| cpu_exec_context.hh | ||
| cpu_models.py | ||
| exec_context.hh | ||
| exetrace.cc | ||
| exetrace.hh | ||
| inst_seq.hh | ||
| intr_control.cc | ||
| intr_control.hh | ||
| op_class.cc | ||
| op_class.hh | ||
| pc_event.cc | ||
| pc_event.hh | ||
| profile.cc | ||
| profile.hh | ||
| SConscript | ||
| smt.hh | ||
| static_inst.cc | ||
| static_inst.hh | ||