Andreas Hansson
a4329af937
stats: Update stats for DMA port send
...
This patch updates the stats after removing the zero-time send used in
the DMA port.
2012-10-23 04:49:48 -04:00
Andreas Hansson
d52adc4eb6
Stats: Update stats for cache timings in cycles
...
This patch updates the stats to reflect the change in how cache
latencies are expressed. In addition, the latencies are now rounded to
multiples of the clock period, thus also affecting other stats.
2012-10-15 08:12:21 -04:00
Andreas Hansson
54227f9e57
Stats: Update stats for new default L1-to-L2 bus clock and width
...
This patch updates the stats to reflect the changes in the clock speed
and width for the bus connecting the L1 and L2 caches.
2012-10-15 08:09:54 -04:00
Andreas Hansson
a850fc916f
Stats: Update stats for use of two-level builder
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This patch updates the name of the l2 stats.
2012-10-15 08:08:06 -04:00
Ali Saidi
91e74beee6
ARM: update stats for bp and squash fixes.
2012-09-25 11:49:41 -05:00
Andreas Hansson
d2b57a7473
Stats: Update stats to reflect SimpleMemory bandwidth
...
This patch simply bumps the stats to reflect the introduction of a
bandwidth limit of 12.8GB/s for SimpleMemory.
2012-09-18 10:30:04 -04:00
Andreas Hansson
ae1652b813
Stats: Remove the reference stats that are no longer present
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This patch simply removes the commitCommittedInsts and
commitCommittedOps from the reference statistics, following their
removal from the CPU.
2012-09-13 08:02:55 -04:00
Andreas Hansson
d628344574
Device: Update stats for PIO and PCI latency change
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This patch merely updates the regression stats to reflect the change
in PIO and PCI latency.
2012-09-10 11:57:37 -04:00
Andreas Hansson
fb5dd28420
Checker: Bump the realview-o3-checker regression
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This patch bumps the stats for the realview-o3-checker after fixing
the checker CPU in the previous patch.
2012-08-28 14:30:25 -04:00
Ali Saidi
b1a58933e0
stats: update stats for icache change not allowing dirty data
2012-07-27 16:08:05 -04:00
Andreas Hansson
fda338f8d3
Stats: Updates due to bus changes
...
This patch bumps all the stats to reflect the bus changes, i.e. the
introduction of the state variable, the division into a request and
response layer, and the new default bus width of 8 bytes.
2012-07-09 12:35:41 -04:00
Ali Saidi
3965ecc36b
Stats: Update stats for RAS and LRU fixes.
2012-06-29 11:19:03 -04:00
Ali Saidi
c49e739352
all: Update stats for memory per master and total fix.
2012-06-05 01:23:16 -04:00
Ali Saidi
e62beaaa8f
ARM: update stats for clock frequency fix.
2012-05-10 18:04:29 -05:00
Nathan Binkert
4a644767c5
stats: update stats for no_value -> nan
...
Lots of accumulated older changes too.
2012-05-09 11:52:14 -07:00
Ali Saidi
3c666083c6
ARM: Update stats for IT and conditional branch changes
2012-03-21 10:36:45 -05:00
Ali Saidi
470051345a
ARM: Update stats for CBNZ fix.
2012-03-09 15:33:07 -05:00
Ali Saidi
927bba9d60
ARM: Update stats for valgrind fix and replace config.inis which are out of date.
2012-03-09 09:59:29 -05:00
Geoffrey Blake
da0d67c3d6
CheckerCPU: Make some basic regression tests for CheckerCPU
...
Adds regression tests for the CheckerCPU. ARM ISA support
only at this point.
2012-03-09 09:59:28 -05:00
