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ARM: Update stats for CBNZ fix.

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This commit is contained in:
Ali Saidi 2012-03-09 15:33:07 -05:00
parent 9a9a4a0780
commit 470051345a
86 changed files with 7323 additions and 7282 deletions
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12
tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/simout
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@ -1,15 +1,15 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Mar 9 2012 08:32:03
gem5 started Mar 9 2012 08:34:27
gem5 executing on u200540-lin
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3-checker -re tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3-checker
gem5 compiled Mar 9 2012 10:15:20
gem5 started Mar 9 2012 10:47:04
gem5 executing on zizzer
command line: build/ARM/gem5.fast -d build/ARM/tests/fast/long/fs/10.linux-boot/arm/linux/realview-o3-checker -re tests/run.py build/ARM/tests/fast/long/fs/10.linux-boot/arm/linux/realview-o3-checker
The currently selected ARM platforms doesn't support
the amount of DRAM you've selected. Please try
another platform
Global frequency set at 1000000000000 ticks per second
info: kernel located at: /projects/pd/randd/dist/binaries/vmlinux.arm.smp.fb.2.6.38.8
info: kernel located at: /dist/m5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8
info: Using bootloader at address 0x80000000
info: Entering event queue @ 0. Starting simulation...
Exiting @ tick 2503289265500 because m5_exit instruction encountered
Exiting @ tick 2503099557500 because m5_exit instruction encountered

1358
tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/stats.txt
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File diff suppressed because it is too large Load diff

12
tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/simout
View file

@ -1,15 +1,15 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Mar 9 2012 08:32:03
gem5 started Mar 9 2012 08:35:13
gem5 executing on u200540-lin
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3-dual -re tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3-dual
gem5 compiled Mar 9 2012 10:15:20
gem5 started Mar 9 2012 10:49:08
gem5 executing on zizzer
command line: build/ARM/gem5.fast -d build/ARM/tests/fast/long/fs/10.linux-boot/arm/linux/realview-o3-dual -re tests/run.py build/ARM/tests/fast/long/fs/10.linux-boot/arm/linux/realview-o3-dual
The currently selected ARM platforms doesn't support
the amount of DRAM you've selected. Please try
another platform
Global frequency set at 1000000000000 ticks per second
info: kernel located at: /projects/pd/randd/dist/binaries/vmlinux.arm.smp.fb.2.6.38.8
info: kernel located at: /dist/m5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8
info: Using bootloader at address 0x80000000
info: Entering event queue @ 0. Starting simulation...
Exiting @ tick 2572328372500 because m5_exit instruction encountered
Exiting @ tick 2572151538500 because m5_exit instruction encountered

2586
tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/stats.txt
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File diff suppressed because it is too large Load diff

2
tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/status
View file

@ -1 +1 @@
build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3-dual FAILED!
build/ARM/tests/fast/long/fs/10.linux-boot/arm/linux/realview-o3-dual FAILED!

6
tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/config.ini
View file

@ -10,13 +10,13 @@ time_sync_spin_threshold=100000000
type=LinuxArmSystem
children=bridge cf0 cpu intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver
atags_addr=256
boot_loader=/projects/pd/randd/dist/binaries/boot.arm
boot_loader=/dist/m5/system/binaries/boot.arm
boot_loader_mem=system.realview.nvmem
boot_osflags=earlyprintk console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1
flags_addr=268435504
gic_cpu_addr=520093952
init_param=0
kernel=/projects/pd/randd/dist/binaries/vmlinux.arm.smp.fb.2.6.38.8
kernel=/dist/m5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8
load_addr_mask=268435455
machine_type=RealView_PBX
mem_mode=timing
@ -63,7 +63,7 @@ table_size=65536
[system.cf0.image.child]
type=RawDiskImage
image_file=/projects/pd/randd/dist/disks/linux-arm-ael.img
image_file=/dist/m5/system/disks/linux-arm-ael.img
read_only=true
[system.cpu]

12
tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/simout
View file

@ -1,15 +1,15 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Mar 9 2012 08:32:03
gem5 started Mar 9 2012 08:34:20
gem5 executing on u200540-lin
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3 -re tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3
gem5 compiled Mar 9 2012 10:15:20
gem5 started Mar 9 2012 10:45:32
gem5 executing on zizzer
command line: build/ARM/gem5.fast -d build/ARM/tests/fast/long/fs/10.linux-boot/arm/linux/realview-o3 -re tests/run.py build/ARM/tests/fast/long/fs/10.linux-boot/arm/linux/realview-o3
The currently selected ARM platforms doesn't support
the amount of DRAM you've selected. Please try
another platform
Global frequency set at 1000000000000 ticks per second
info: kernel located at: /projects/pd/randd/dist/binaries/vmlinux.arm.smp.fb.2.6.38.8
info: kernel located at: /dist/m5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8
info: Using bootloader at address 0x80000000
info: Entering event queue @ 0. Starting simulation...
Exiting @ tick 2503289265500 because m5_exit instruction encountered
Exiting @ tick 2503099557500 because m5_exit instruction encountered

1332
tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/stats.txt
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File diff suppressed because it is too large Load diff

28
tests/long/se/00.gzip/ref/arm/linux/o3-timing/config.ini
View file

@ -26,7 +26,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
system_port=system.membus.port[0]
system_port=system.membus.slave[0]
[system.cpu]
type=DerivO3CPU
@ -127,7 +127,7 @@ icache_port=system.cpu.icache.cpu_side
[system.cpu.dcache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -148,7 +148,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.port[1]
mem_side=system.cpu.toL2Bus.slave[1]
[system.cpu.dtb]
type=ArmTLB
@ -161,7 +161,7 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.cpu.toL2Bus.port[3]
port=system.cpu.toL2Bus.slave[3]
[system.cpu.fuPool]
type=FUPool
@ -428,7 +428,7 @@ opLat=3
[system.cpu.icache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -449,7 +449,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.port[0]
mem_side=system.cpu.toL2Bus.slave[0]
[system.cpu.interrupts]
type=ArmInterrupts
@ -465,11 +465,11 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.cpu.toL2Bus.port[2]
port=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -489,8 +489,8 @@ tgts_per_mshr=5
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.toL2Bus.port[4]
mem_side=system.membus.port[2]
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=Bus
@ -500,7 +500,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.l2cache.cpu_side
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
[system.cpu.tracer]
type=ExeTracer
@ -532,7 +533,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side
master=system.physmem.port[0]
slave=system.system_port system.cpu.l2cache.mem_side
[system.physmem]
type=PhysicalMemory
@ -542,5 +544,5 @@ latency_var=0
null=false
range=0:134217727
zero=false
port=system.membus.port[1]
port=system.membus.master[0]

6
tests/long/se/00.gzip/ref/arm/linux/o3-timing/simout
View file

@ -1,8 +1,8 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Feb 12 2012 17:19:56
gem5 started Feb 12 2012 20:00:24
gem5 compiled Mar 9 2012 10:15:20
gem5 started Mar 9 2012 10:17:26
gem5 executing on zizzer
command line: build/ARM/gem5.fast -d build/ARM/tests/fast/long/se/00.gzip/arm/linux/o3-timing -re tests/run.py build/ARM/tests/fast/long/se/00.gzip/arm/linux/o3-timing
Global frequency set at 1000000000000 ticks per second
@ -38,4 +38,4 @@ Uncompressing Data
Uncompressed data 1048576 bytes in length
Uncompressed data compared correctly
Tested 1MB buffer: OK!
Exiting @ tick 164280509500 because target called exit()
Exiting @ tick 164277874000 because target called exit()

962
tests/long/se/00.gzip/ref/arm/linux/o3-timing/stats.txt
View file

File diff suppressed because it is too large Load diff

15
tests/long/se/00.gzip/ref/arm/linux/simple-atomic/config.ini
View file

@ -26,7 +26,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
system_port=system.membus.port[0]
system_port=system.membus.slave[0]
[system.cpu]
type=AtomicSimpleCPU
@ -57,8 +57,8 @@ system=system
tracer=system.cpu.tracer
width=1
workload=system.cpu.workload
dcache_port=system.membus.port[3]
icache_port=system.membus.port[2]
dcache_port=system.membus.slave[2]
icache_port=system.membus.slave[1]
[system.cpu.dtb]
type=ArmTLB
@ -71,7 +71,7 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.membus.port[5]
port=system.membus.slave[4]
[system.cpu.interrupts]
type=ArmInterrupts
@ -87,7 +87,7 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.membus.port[4]
port=system.membus.slave[3]
[system.cpu.tracer]
type=ExeTracer
@ -119,7 +119,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.system_port system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port
master=system.physmem.port[0]
slave=system.system_port system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port
[system.physmem]
type=PhysicalMemory
@ -129,5 +130,5 @@ latency_var=0
null=false
range=0:134217727
zero=false
port=system.membus.port[1]
port=system.membus.master[0]

12
tests/long/se/00.gzip/ref/arm/linux/simple-atomic/stats.txt
View file

@ -4,11 +4,11 @@ sim_seconds 0.301191 # Nu
sim_ticks 301191370000 # Number of ticks simulated
final_tick 301191370000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 3224710 # Simulator instruction rate (inst/s)
host_op_rate 3407474 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 1703801368 # Simulator tick rate (ticks/s)
host_mem_usage 212692 # Number of bytes of host memory used
host_seconds 176.78 # Real time elapsed on the host
host_inst_rate 3323130 # Simulator instruction rate (inst/s)
host_op_rate 3511472 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 1755802369 # Simulator tick rate (ticks/s)
host_mem_usage 216428 # Number of bytes of host memory used
host_seconds 171.54 # Real time elapsed on the host
sim_insts 570051644 # Number of instructions simulated
sim_ops 602359851 # Number of ops (including micro ops) simulated
system.physmem.bytes_read 2680160157 # Number of bytes read from this memory
@ -72,7 +72,7 @@ system.cpu.committedOps 602359851 # Nu
system.cpu.num_int_alu_accesses 533522639 # Number of integer alu accesses
system.cpu.num_fp_alu_accesses 16 # Number of float alu accesses
system.cpu.num_func_calls 1993546 # number of times a function call or return occured
system.cpu.num_conditional_control_insts 67017827 # number of instructions that are conditional controls
system.cpu.num_conditional_control_insts 67018854 # number of instructions that are conditional controls
system.cpu.num_int_insts 533522639 # number of integer instructions
system.cpu.num_fp_insts 16 # number of float instructions
system.cpu.num_int_register_reads 2770243005 # number of times the integer registers were read

28
tests/long/se/00.gzip/ref/arm/linux/simple-timing/config.ini
View file

@ -26,7 +26,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
system_port=system.membus.port[0]
system_port=system.membus.slave[0]
[system.cpu]
type=TimingSimpleCPU
@ -59,7 +59,7 @@ icache_port=system.cpu.icache.cpu_side
[system.cpu.dcache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -80,7 +80,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.port[1]
mem_side=system.cpu.toL2Bus.slave[1]
[system.cpu.dtb]
type=ArmTLB
@ -93,11 +93,11 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.cpu.toL2Bus.port[3]
port=system.cpu.toL2Bus.slave[3]
[system.cpu.icache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -118,7 +118,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.port[0]
mem_side=system.cpu.toL2Bus.slave[0]
[system.cpu.interrupts]
type=ArmInterrupts
@ -134,11 +134,11 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.cpu.toL2Bus.port[2]
port=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -158,8 +158,8 @@ tgts_per_mshr=5
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.toL2Bus.port[4]
mem_side=system.membus.port[2]
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=Bus
@ -169,7 +169,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.l2cache.cpu_side
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
[system.cpu.tracer]
type=ExeTracer
@ -201,7 +202,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side
master=system.physmem.port[0]
slave=system.system_port system.cpu.l2cache.mem_side
[system.physmem]
type=PhysicalMemory
@ -211,5 +213,5 @@ latency_var=0
null=false
range=0:134217727
zero=false
port=system.membus.port[1]
port=system.membus.master[0]

12
tests/long/se/00.gzip/ref/arm/linux/simple-timing/stats.txt
View file

@ -4,11 +4,11 @@ sim_seconds 0.796763 # Nu
sim_ticks 796762926000 # Number of ticks simulated
final_tick 796762926000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 1806630 # Simulator instruction rate (inst/s)
host_op_rate 1907867 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 2531848956 # Simulator tick rate (ticks/s)
host_mem_usage 221588 # Number of bytes of host memory used
host_seconds 314.70 # Real time elapsed on the host
host_inst_rate 1880906 # Simulator instruction rate (inst/s)
host_op_rate 1986306 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 2635941289 # Simulator tick rate (ticks/s)
host_mem_usage 225340 # Number of bytes of host memory used
host_seconds 302.27 # Real time elapsed on the host
sim_insts 568539343 # Number of instructions simulated
sim_ops 600398281 # Number of ops (including micro ops) simulated
system.physmem.bytes_read 5759488 # Number of bytes read from this memory
@ -72,7 +72,7 @@ system.cpu.committedOps 600398281 # Nu
system.cpu.num_int_alu_accesses 533522639 # Number of integer alu accesses
system.cpu.num_fp_alu_accesses 16 # Number of float alu accesses
system.cpu.num_func_calls 1993546 # number of times a function call or return occured
system.cpu.num_conditional_control_insts 67017827 # number of instructions that are conditional controls
system.cpu.num_conditional_control_insts 67018854 # number of instructions that are conditional controls
system.cpu.num_int_insts 533522639 # number of integer instructions
system.cpu.num_fp_insts 16 # number of float instructions
system.cpu.num_int_register_reads 3212467108 # number of times the integer registers were read

28
tests/long/se/10.mcf/ref/arm/linux/o3-timing/config.ini
View file

@ -26,7 +26,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
system_port=system.membus.port[0]
system_port=system.membus.slave[0]
[system.cpu]
type=DerivO3CPU
@ -127,7 +127,7 @@ icache_port=system.cpu.icache.cpu_side
[system.cpu.dcache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -148,7 +148,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.port[1]
mem_side=system.cpu.toL2Bus.slave[1]
[system.cpu.dtb]
type=ArmTLB
@ -161,7 +161,7 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.cpu.toL2Bus.port[3]
port=system.cpu.toL2Bus.slave[3]
[system.cpu.fuPool]
type=FUPool
@ -428,7 +428,7 @@ opLat=3
[system.cpu.icache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -449,7 +449,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.port[0]
mem_side=system.cpu.toL2Bus.slave[0]
[system.cpu.interrupts]
type=ArmInterrupts
@ -465,11 +465,11 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.cpu.toL2Bus.port[2]
port=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -489,8 +489,8 @@ tgts_per_mshr=5
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.toL2Bus.port[4]
mem_side=system.membus.port[2]
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=Bus
@ -500,7 +500,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.l2cache.cpu_side
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
[system.cpu.tracer]
type=ExeTracer
@ -532,7 +533,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side
master=system.physmem.port[0]
slave=system.system_port system.cpu.l2cache.mem_side
[system.physmem]
type=PhysicalMemory
@ -542,5 +544,5 @@ latency_var=0
null=false
range=0:268435455
zero=false
port=system.membus.port[1]
port=system.membus.master[0]

6
tests/long/se/10.mcf/ref/arm/linux/o3-timing/simout
View file

@ -1,8 +1,8 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Feb 12 2012 17:19:56
gem5 started Feb 12 2012 20:09:43
gem5 compiled Mar 9 2012 10:15:20
gem5 started Mar 9 2012 10:17:26
gem5 executing on zizzer
command line: build/ARM/gem5.fast -d build/ARM/tests/fast/long/se/10.mcf/arm/linux/o3-timing -re tests/run.py build/ARM/tests/fast/long/se/10.mcf/arm/linux/o3-timing
Global frequency set at 1000000000000 ticks per second
@ -23,4 +23,4 @@ simplex iterations : 2663
flow value : 3080014995
checksum : 68389
optimal
Exiting @ tick 30872383000 because target called exit()
Exiting @ tick 30004011500 because target called exit()

1010
tests/long/se/10.mcf/ref/arm/linux/o3-timing/stats.txt
View file

File diff suppressed because it is too large Load diff

15
tests/long/se/10.mcf/ref/arm/linux/simple-atomic/config.ini
View file

@ -26,7 +26,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
system_port=system.membus.port[0]
system_port=system.membus.slave[0]
[system.cpu]
type=AtomicSimpleCPU
@ -57,8 +57,8 @@ system=system
tracer=system.cpu.tracer
width=1
workload=system.cpu.workload
dcache_port=system.membus.port[3]
icache_port=system.membus.port[2]
dcache_port=system.membus.slave[2]
icache_port=system.membus.slave[1]
[system.cpu.dtb]
type=ArmTLB
@ -71,7 +71,7 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.membus.port[5]
port=system.membus.slave[4]
[system.cpu.interrupts]
type=ArmInterrupts
@ -87,7 +87,7 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.membus.port[4]
port=system.membus.slave[3]
[system.cpu.tracer]
type=ExeTracer
@ -119,7 +119,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.system_port system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port
master=system.physmem.port[0]
slave=system.system_port system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port
[system.physmem]
type=PhysicalMemory
@ -129,5 +130,5 @@ latency_var=0
null=false
range=0:268435455
zero=false
port=system.membus.port[1]
port=system.membus.master[0]

12
tests/long/se/10.mcf/ref/arm/linux/simple-atomic/stats.txt
View file

@ -4,11 +4,11 @@ sim_seconds 0.054241 # Nu
sim_ticks 54240666000 # Number of ticks simulated
final_tick 54240666000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 3177444 # Simulator instruction rate (inst/s)
host_op_rate 3200257 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 1902228216 # Simulator tick rate (ticks/s)
host_mem_usage 345536 # Number of bytes of host memory used
host_seconds 28.51 # Real time elapsed on the host
host_inst_rate 2969105 # Simulator instruction rate (inst/s)
host_op_rate 2990423 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 1777502999 # Simulator tick rate (ticks/s)
host_mem_usage 349280 # Number of bytes of host memory used
host_seconds 30.52 # Real time elapsed on the host
sim_insts 90602415 # Number of instructions simulated
sim_ops 91252969 # Number of ops (including micro ops) simulated
system.physmem.bytes_read 521339715 # Number of bytes read from this memory
@ -72,7 +72,7 @@ system.cpu.committedOps 91252969 # Nu
system.cpu.num_int_alu_accesses 72525682 # Number of integer alu accesses
system.cpu.num_fp_alu_accesses 48 # Number of float alu accesses
system.cpu.num_func_calls 96832 # number of times a function call or return occured
system.cpu.num_conditional_control_insts 15127614 # number of instructions that are conditional controls
system.cpu.num_conditional_control_insts 15564339 # number of instructions that are conditional controls
system.cpu.num_int_insts 72525682 # number of integer instructions
system.cpu.num_fp_insts 48 # number of float instructions
system.cpu.num_int_register_reads 396912516 # number of times the integer registers were read

28
tests/long/se/10.mcf/ref/arm/linux/simple-timing/config.ini
View file

@ -26,7 +26,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
system_port=system.membus.port[0]
system_port=system.membus.slave[0]
[system.cpu]
type=TimingSimpleCPU
@ -59,7 +59,7 @@ icache_port=system.cpu.icache.cpu_side
[system.cpu.dcache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -80,7 +80,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.port[1]
mem_side=system.cpu.toL2Bus.slave[1]
[system.cpu.dtb]
type=ArmTLB
@ -93,11 +93,11 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.cpu.toL2Bus.port[3]
port=system.cpu.toL2Bus.slave[3]
[system.cpu.icache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -118,7 +118,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.port[0]
mem_side=system.cpu.toL2Bus.slave[0]
[system.cpu.interrupts]
type=ArmInterrupts
@ -134,11 +134,11 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.cpu.toL2Bus.port[2]
port=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -158,8 +158,8 @@ tgts_per_mshr=5
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.toL2Bus.port[4]
mem_side=system.membus.port[2]
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=Bus
@ -169,7 +169,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.l2cache.cpu_side
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
[system.cpu.tracer]
type=ExeTracer
@ -201,7 +202,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side
master=system.physmem.port[0]
slave=system.system_port system.cpu.l2cache.mem_side
[system.physmem]
type=PhysicalMemory
@ -211,5 +213,5 @@ latency_var=0
null=false
range=0:268435455
zero=false
port=system.membus.port[1]
port=system.membus.master[0]

12
tests/long/se/10.mcf/ref/arm/linux/simple-timing/stats.txt
View file

@ -4,11 +4,11 @@ sim_seconds 0.148086 # Nu
sim_ticks 148086239000 # Number of ticks simulated
final_tick 148086239000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 1696896 # Simulator instruction rate (inst/s)
host_op_rate 1709063 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 2774293546 # Simulator tick rate (ticks/s)
host_mem_usage 354444 # Number of bytes of host memory used
host_seconds 53.38 # Real time elapsed on the host
host_inst_rate 1772363 # Simulator instruction rate (inst/s)
host_op_rate 1785070 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 2897675173 # Simulator tick rate (ticks/s)
host_mem_usage 358192 # Number of bytes of host memory used
host_seconds 51.11 # Real time elapsed on the host
sim_insts 90576869 # Number of instructions simulated
sim_ops 91226321 # Number of ops (including micro ops) simulated
system.physmem.bytes_read 986112 # Number of bytes read from this memory
@ -72,7 +72,7 @@ system.cpu.committedOps 91226321 # Nu
system.cpu.num_int_alu_accesses 72525682 # Number of integer alu accesses
system.cpu.num_fp_alu_accesses 48 # Number of float alu accesses
system.cpu.num_func_calls 96832 # number of times a function call or return occured
system.cpu.num_conditional_control_insts 15127614 # number of instructions that are conditional controls
system.cpu.num_conditional_control_insts 15564339 # number of instructions that are conditional controls
system.cpu.num_int_insts 72525682 # number of integer instructions
system.cpu.num_fp_insts 48 # number of float instructions
system.cpu.num_int_register_reads 464563396 # number of times the integer registers were read

28
tests/long/se/20.parser/ref/arm/linux/o3-timing/config.ini
View file

@ -26,7 +26,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
system_port=system.membus.port[0]
system_port=system.membus.slave[0]
[system.cpu]
type=DerivO3CPU
@ -127,7 +127,7 @@ icache_port=system.cpu.icache.cpu_side
[system.cpu.dcache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -148,7 +148,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.port[1]
mem_side=system.cpu.toL2Bus.slave[1]
[system.cpu.dtb]
type=ArmTLB
@ -161,7 +161,7 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.cpu.toL2Bus.port[3]
port=system.cpu.toL2Bus.slave[3]
[system.cpu.fuPool]
type=FUPool
@ -428,7 +428,7 @@ opLat=3
[system.cpu.icache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -449,7 +449,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.port[0]
mem_side=system.cpu.toL2Bus.slave[0]
[system.cpu.interrupts]
type=ArmInterrupts
@ -465,11 +465,11 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.cpu.toL2Bus.port[2]
port=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -489,8 +489,8 @@ tgts_per_mshr=5
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.toL2Bus.port[4]
mem_side=system.membus.port[2]
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=Bus
@ -500,7 +500,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.l2cache.cpu_side
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
[system.cpu.tracer]
type=ExeTracer
@ -532,7 +533,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side
master=system.physmem.port[0]
slave=system.system_port system.cpu.l2cache.mem_side
[system.physmem]
type=PhysicalMemory
@ -542,5 +544,5 @@ latency_var=0
null=false
range=0:134217727
zero=false
port=system.membus.port[1]
port=system.membus.master[0]

1
tests/long/se/20.parser/ref/arm/linux/o3-timing/simerr
View file

@ -1,2 +1,3 @@
warn: Sockets disabled, not accepting gdb connections
warn: CP14 unimplemented crn[8], opc1[2], crm[9], opc2[4]
hack: be nice to actually delete the event here

6
tests/long/se/20.parser/ref/arm/linux/o3-timing/simout
View file

@ -1,8 +1,8 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Feb 12 2012 17:19:56
gem5 started Feb 12 2012 20:11:33
gem5 compiled Mar 9 2012 10:15:20
gem5 started Mar 9 2012 10:18:33
gem5 executing on zizzer
command line: build/ARM/gem5.fast -d build/ARM/tests/fast/long/se/20.parser/arm/linux/o3-timing -re tests/run.py build/ARM/tests/fast/long/se/20.parser/arm/linux/o3-timing
Global frequency set at 1000000000000 ticks per second
@ -67,4 +67,4 @@ info: Increasing stack size by one page.
about 2 million people attended
the five best costumes got prizes
No errors!
Exiting @ tick 237773144000 because target called exit()
Exiting @ tick 234107886500 because target called exit()

1108
tests/long/se/20.parser/ref/arm/linux/o3-timing/stats.txt
View file

File diff suppressed because it is too large Load diff

15
tests/long/se/20.parser/ref/arm/linux/simple-atomic/config.ini
View file

@ -26,7 +26,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
system_port=system.membus.port[0]
system_port=system.membus.slave[0]
[system.cpu]
type=AtomicSimpleCPU
@ -57,8 +57,8 @@ system=system
tracer=system.cpu.tracer
width=1
workload=system.cpu.workload
dcache_port=system.membus.port[3]
icache_port=system.membus.port[2]
dcache_port=system.membus.slave[2]
icache_port=system.membus.slave[1]
[system.cpu.dtb]
type=ArmTLB
@ -71,7 +71,7 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.membus.port[5]
port=system.membus.slave[4]
[system.cpu.interrupts]
type=ArmInterrupts
@ -87,7 +87,7 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.membus.port[4]
port=system.membus.slave[3]
[system.cpu.tracer]
type=ExeTracer
@ -119,7 +119,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.system_port system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port
master=system.physmem.port[0]
slave=system.system_port system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port
[system.physmem]
type=PhysicalMemory
@ -129,5 +130,5 @@ latency_var=0
null=false
range=0:134217727
zero=false
port=system.membus.port[1]
port=system.membus.master[0]

12
tests/long/se/20.parser/ref/arm/linux/simple-atomic/stats.txt
View file

@ -4,11 +4,11 @@ sim_seconds 0.290499 # Nu
sim_ticks 290498972000 # Number of ticks simulated
final_tick 290498972000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 2958479 # Simulator instruction rate (inst/s)
host_op_rate 3334501 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 1696537892 # Simulator tick rate (ticks/s)
host_mem_usage 216124 # Number of bytes of host memory used
host_seconds 171.23 # Real time elapsed on the host
host_inst_rate 3161801 # Simulator instruction rate (inst/s)
host_op_rate 3563665 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 1813132581 # Simulator tick rate (ticks/s)
host_mem_usage 219872 # Number of bytes of host memory used
host_seconds 160.22 # Real time elapsed on the host
sim_insts 506581615 # Number of instructions simulated
sim_ops 570968176 # Number of ops (including micro ops) simulated
system.physmem.bytes_read 2489298238 # Number of bytes read from this memory
@ -72,7 +72,7 @@ system.cpu.committedOps 570968176 # Nu
system.cpu.num_int_alu_accesses 470727703 # Number of integer alu accesses
system.cpu.num_fp_alu_accesses 16 # Number of float alu accesses
system.cpu.num_func_calls 15725605 # number of times a function call or return occured
system.cpu.num_conditional_control_insts 95872736 # number of instructions that are conditional controls
system.cpu.num_conditional_control_insts 98480815 # number of instructions that are conditional controls
system.cpu.num_int_insts 470727703 # number of integer instructions
system.cpu.num_fp_insts 16 # number of float instructions
system.cpu.num_int_register_reads 2465023721 # number of times the integer registers were read

28
tests/long/se/20.parser/ref/arm/linux/simple-timing/config.ini
View file

@ -26,7 +26,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
system_port=system.membus.port[0]
system_port=system.membus.slave[0]
[system.cpu]
type=TimingSimpleCPU
@ -59,7 +59,7 @@ icache_port=system.cpu.icache.cpu_side
[system.cpu.dcache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -80,7 +80,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.port[1]
mem_side=system.cpu.toL2Bus.slave[1]
[system.cpu.dtb]
type=ArmTLB
@ -93,11 +93,11 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.cpu.toL2Bus.port[3]
port=system.cpu.toL2Bus.slave[3]
[system.cpu.icache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -118,7 +118,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.port[0]
mem_side=system.cpu.toL2Bus.slave[0]
[system.cpu.interrupts]
type=ArmInterrupts
@ -134,11 +134,11 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.cpu.toL2Bus.port[2]
port=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -158,8 +158,8 @@ tgts_per_mshr=5
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.toL2Bus.port[4]
mem_side=system.membus.port[2]
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=Bus
@ -169,7 +169,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.l2cache.cpu_side
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
[system.cpu.tracer]
type=ExeTracer
@ -201,7 +202,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side
master=system.physmem.port[0]
slave=system.system_port system.cpu.l2cache.mem_side
[system.physmem]
type=PhysicalMemory
@ -211,5 +213,5 @@ latency_var=0
null=false
range=0:134217727
zero=false
port=system.membus.port[1]
port=system.membus.master[0]

4
tests/long/se/20.parser/ref/arm/linux/simple-timing/simout
View file

@ -1,8 +1,8 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Feb 11 2012 13:10:40
gem5 started Feb 11 2012 15:54:39
gem5 compiled Mar 9 2012 10:15:20
gem5 started Mar 9 2012 10:18:46
gem5 executing on zizzer
command line: build/ARM/gem5.fast -d build/ARM/tests/fast/long/se/20.parser/arm/linux/simple-timing -re tests/run.py build/ARM/tests/fast/long/se/20.parser/arm/linux/simple-timing
Global frequency set at 1000000000000 ticks per second

12
tests/long/se/20.parser/ref/arm/linux/simple-timing/stats.txt
View file

@ -4,11 +4,11 @@ sim_seconds 0.722234 # Nu
sim_ticks 722234364000 # Number of ticks simulated
final_tick 722234364000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 1769028 # Simulator instruction rate (inst/s)
host_op_rate 1993395 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 2530070907 # Simulator tick rate (ticks/s)
host_mem_usage 225284 # Number of bytes of host memory used
host_seconds 285.46 # Real time elapsed on the host
host_inst_rate 1812748 # Simulator instruction rate (inst/s)
host_op_rate 2042661 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 2592600297 # Simulator tick rate (ticks/s)
host_mem_usage 228776 # Number of bytes of host memory used
host_seconds 278.58 # Real time elapsed on the host
sim_insts 504986861 # Number of instructions simulated
sim_ops 569034848 # Number of ops (including micro ops) simulated
system.physmem.bytes_read 14797056 # Number of bytes read from this memory
@ -72,7 +72,7 @@ system.cpu.committedOps 569034848 # Nu
system.cpu.num_int_alu_accesses 470727703 # Number of integer alu accesses
system.cpu.num_fp_alu_accesses 16 # Number of float alu accesses
system.cpu.num_func_calls 15725605 # number of times a function call or return occured
system.cpu.num_conditional_control_insts 95872736 # number of instructions that are conditional controls
system.cpu.num_conditional_control_insts 98480815 # number of instructions that are conditional controls
system.cpu.num_int_insts 470727703 # number of integer instructions
system.cpu.num_fp_insts 16 # number of float instructions
system.cpu.num_int_register_reads 2844375220 # number of times the integer registers were read

28
tests/long/se/30.eon/ref/arm/linux/o3-timing/config.ini
View file

@ -26,7 +26,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
system_port=system.membus.port[0]
system_port=system.membus.slave[0]
[system.cpu]
type=DerivO3CPU
@ -127,7 +127,7 @@ icache_port=system.cpu.icache.cpu_side
[system.cpu.dcache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -148,7 +148,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.port[1]
mem_side=system.cpu.toL2Bus.slave[1]
[system.cpu.dtb]
type=ArmTLB
@ -161,7 +161,7 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.cpu.toL2Bus.port[3]
port=system.cpu.toL2Bus.slave[3]
[system.cpu.fuPool]
type=FUPool
@ -428,7 +428,7 @@ opLat=3
[system.cpu.icache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -449,7 +449,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.port[0]
mem_side=system.cpu.toL2Bus.slave[0]
[system.cpu.interrupts]
type=ArmInterrupts
@ -465,11 +465,11 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.cpu.toL2Bus.port[2]
port=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -489,8 +489,8 @@ tgts_per_mshr=5
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.toL2Bus.port[4]
mem_side=system.membus.port[2]
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=Bus
@ -500,7 +500,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.l2cache.cpu_side
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
[system.cpu.tracer]
type=ExeTracer
@ -532,7 +533,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side
master=system.physmem.port[0]
slave=system.system_port system.cpu.l2cache.mem_side
[system.physmem]
type=PhysicalMemory
@ -542,5 +544,5 @@ latency_var=0
null=false
range=0:134217727
zero=false
port=system.membus.port[1]
port=system.membus.master[0]

8
tests/long/se/30.eon/ref/arm/linux/o3-timing/simout
View file

@ -1,8 +1,8 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Feb 12 2012 17:19:56
gem5 started Feb 12 2012 20:20:40
gem5 compiled Mar 9 2012 10:15:20
gem5 started Mar 9 2012 10:18:58
gem5 executing on zizzer
command line: build/ARM/gem5.fast -d build/ARM/tests/fast/long/se/30.eon/arm/linux/o3-timing -re tests/run.py build/ARM/tests/fast/long/se/30.eon/arm/linux/o3-timing
Global frequency set at 1000000000000 ticks per second
@ -12,5 +12,5 @@ Eon, Version 1.1
info: Increasing stack size by one page.
info: Increasing stack size by one page.
info: Increasing stack size by one page.
OO-style eon Time= 0.100000
Exiting @ tick 106128099500 because target called exit()
OO-style eon Time= 0.090000
Exiting @ tick 99661890000 because target called exit()

1048
tests/long/se/30.eon/ref/arm/linux/o3-timing/stats.txt
View file

File diff suppressed because it is too large Load diff

15
tests/long/se/30.eon/ref/arm/linux/simple-atomic/config.ini
View file

@ -26,7 +26,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
system_port=system.membus.port[0]
system_port=system.membus.slave[0]
[system.cpu]
type=AtomicSimpleCPU
@ -57,8 +57,8 @@ system=system
tracer=system.cpu.tracer
width=1
workload=system.cpu.workload
dcache_port=system.membus.port[3]
icache_port=system.membus.port[2]
dcache_port=system.membus.slave[2]
icache_port=system.membus.slave[1]
[system.cpu.dtb]
type=ArmTLB
@ -71,7 +71,7 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.membus.port[5]
port=system.membus.slave[4]
[system.cpu.interrupts]
type=ArmInterrupts
@ -87,7 +87,7 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.membus.port[4]
port=system.membus.slave[3]
[system.cpu.tracer]
type=ExeTracer
@ -119,7 +119,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.system_port system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port
master=system.physmem.port[0]
slave=system.system_port system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port
[system.physmem]
type=PhysicalMemory
@ -129,5 +130,5 @@ latency_var=0
null=false
range=0:134217727
zero=false
port=system.membus.port[1]
port=system.membus.master[0]

12
tests/long/se/30.eon/ref/arm/linux/simple-atomic/stats.txt
View file

@ -4,11 +4,11 @@ sim_seconds 0.212344 # Nu
sim_ticks 212344048000 # Number of ticks simulated
final_tick 212344048000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 2097833 # Simulator instruction rate (inst/s)
host_op_rate 2681977 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 1631504750 # Simulator tick rate (ticks/s)
host_mem_usage 220728 # Number of bytes of host memory used
host_seconds 130.15 # Real time elapsed on the host
host_inst_rate 2182036 # Simulator instruction rate (inst/s)
host_op_rate 2789626 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 1696989772 # Simulator tick rate (ticks/s)
host_mem_usage 224464 # Number of bytes of host memory used
host_seconds 125.13 # Real time elapsed on the host
sim_insts 273037671 # Number of instructions simulated
sim_ops 349065408 # Number of ops (including micro ops) simulated
system.physmem.bytes_read 1875350709 # Number of bytes read from this memory
@ -72,7 +72,7 @@ system.cpu.committedOps 349065408 # Nu
system.cpu.num_int_alu_accesses 279584926 # Number of integer alu accesses
system.cpu.num_fp_alu_accesses 114216705 # Number of float alu accesses
system.cpu.num_func_calls 12433363 # number of times a function call or return occured
system.cpu.num_conditional_control_insts 16271154 # number of instructions that are conditional controls
system.cpu.num_conditional_control_insts 18102314 # number of instructions that are conditional controls
system.cpu.num_int_insts 279584926 # number of integer instructions
system.cpu.num_fp_insts 114216705 # number of float instructions
system.cpu.num_int_register_reads 1887652191 # number of times the integer registers were read

28
tests/long/se/30.eon/ref/arm/linux/simple-timing/config.ini
View file

@ -26,7 +26,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
system_port=system.membus.port[0]
system_port=system.membus.slave[0]
[system.cpu]
type=TimingSimpleCPU
@ -59,7 +59,7 @@ icache_port=system.cpu.icache.cpu_side
[system.cpu.dcache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -80,7 +80,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.port[1]
mem_side=system.cpu.toL2Bus.slave[1]
[system.cpu.dtb]
type=ArmTLB
@ -93,11 +93,11 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.cpu.toL2Bus.port[3]
port=system.cpu.toL2Bus.slave[3]
[system.cpu.icache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -118,7 +118,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.port[0]
mem_side=system.cpu.toL2Bus.slave[0]
[system.cpu.interrupts]
type=ArmInterrupts
@ -134,11 +134,11 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.cpu.toL2Bus.port[2]
port=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -158,8 +158,8 @@ tgts_per_mshr=5
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.toL2Bus.port[4]
mem_side=system.membus.port[2]
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=Bus
@ -169,7 +169,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.l2cache.cpu_side
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
[system.cpu.tracer]
type=ExeTracer
@ -201,7 +202,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side
master=system.physmem.port[0]
slave=system.system_port system.cpu.l2cache.mem_side
[system.physmem]
type=PhysicalMemory
@ -211,5 +213,5 @@ latency_var=0
null=false
range=0:134217727
zero=false
port=system.membus.port[1]
port=system.membus.master[0]

12
tests/long/se/30.eon/ref/arm/linux/simple-timing/stats.txt
View file

@ -4,11 +4,11 @@ sim_seconds 0.525854 # Nu
sim_ticks 525854475000 # Number of ticks simulated
final_tick 525854475000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 1153060 # Simulator instruction rate (inst/s)
host_op_rate 1474144 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 2223154070 # Simulator tick rate (ticks/s)
host_mem_usage 229624 # Number of bytes of host memory used
host_seconds 236.54 # Real time elapsed on the host
host_inst_rate 1224247 # Simulator instruction rate (inst/s)
host_op_rate 1565155 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 2360407719 # Simulator tick rate (ticks/s)
host_mem_usage 233372 # Number of bytes of host memory used
host_seconds 222.78 # Real time elapsed on the host
sim_insts 272739291 # Number of instructions simulated
sim_ops 348687131 # Number of ops (including micro ops) simulated
system.physmem.bytes_read 437312 # Number of bytes read from this memory
@ -71,7 +71,7 @@ system.cpu.committedOps 348687131 # Nu
system.cpu.num_int_alu_accesses 279584925 # Number of integer alu accesses
system.cpu.num_fp_alu_accesses 114216705 # Number of float alu accesses
system.cpu.num_func_calls 12433363 # number of times a function call or return occured
system.cpu.num_conditional_control_insts 16271153 # number of instructions that are conditional controls
system.cpu.num_conditional_control_insts 18102313 # number of instructions that are conditional controls
system.cpu.num_int_insts 279584925 # number of integer instructions
system.cpu.num_fp_insts 114216705 # number of float instructions
system.cpu.num_int_register_reads 2212913209 # number of times the integer registers were read

28
tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/config.ini
View file

@ -26,7 +26,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
system_port=system.membus.port[0]
system_port=system.membus.slave[0]
[system.cpu]
type=DerivO3CPU
@ -127,7 +127,7 @@ icache_port=system.cpu.icache.cpu_side
[system.cpu.dcache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -148,7 +148,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.port[1]
mem_side=system.cpu.toL2Bus.slave[1]
[system.cpu.dtb]
type=ArmTLB
@ -161,7 +161,7 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.cpu.toL2Bus.port[3]
port=system.cpu.toL2Bus.slave[3]
[system.cpu.fuPool]
type=FUPool
@ -428,7 +428,7 @@ opLat=3
[system.cpu.icache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -449,7 +449,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.port[0]
mem_side=system.cpu.toL2Bus.slave[0]
[system.cpu.interrupts]
type=ArmInterrupts
@ -465,11 +465,11 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.cpu.toL2Bus.port[2]
port=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -489,8 +489,8 @@ tgts_per_mshr=5
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.toL2Bus.port[4]
mem_side=system.membus.port[2]
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=Bus
@ -500,7 +500,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.l2cache.cpu_side
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
[system.cpu.tracer]
type=ExeTracer
@ -532,7 +533,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side
master=system.physmem.port[0]
slave=system.system_port system.cpu.l2cache.mem_side
[system.physmem]
type=PhysicalMemory
@ -542,5 +544,5 @@ latency_var=0
null=false
range=0:134217727
zero=false
port=system.membus.port[1]
port=system.membus.master[0]

6
tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/simout
View file

@ -1,8 +1,8 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Feb 12 2012 17:19:56
gem5 started Feb 12 2012 20:29:25
gem5 compiled Mar 9 2012 10:15:20
gem5 started Mar 9 2012 10:22:39
gem5 executing on zizzer
command line: build/ARM/gem5.fast -d build/ARM/tests/fast/long/se/40.perlbmk/arm/linux/o3-timing -re tests/run.py build/ARM/tests/fast/long/se/40.perlbmk/arm/linux/o3-timing
Global frequency set at 1000000000000 ticks per second
@ -1385,4 +1385,4 @@ info: Increasing stack size by one page.
2000: 760651391
1000: 4031656975
0: 2206428413
Exiting @ tick 733277720500 because target called exit()
Exiting @ tick 736384204000 because target called exit()

1088
tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/stats.txt
View file

File diff suppressed because it is too large Load diff

15
tests/long/se/40.perlbmk/ref/arm/linux/simple-atomic/config.ini
View file

@ -26,7 +26,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
system_port=system.membus.port[0]
system_port=system.membus.slave[0]
[system.cpu]
type=AtomicSimpleCPU
@ -57,8 +57,8 @@ system=system
tracer=system.cpu.tracer
width=1
workload=system.cpu.workload
dcache_port=system.membus.port[3]
icache_port=system.membus.port[2]
dcache_port=system.membus.slave[2]
icache_port=system.membus.slave[1]
[system.cpu.dtb]
type=ArmTLB
@ -71,7 +71,7 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.membus.port[5]
port=system.membus.slave[4]
[system.cpu.interrupts]
type=ArmInterrupts
@ -87,7 +87,7 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.membus.port[4]
port=system.membus.slave[3]
[system.cpu.tracer]
type=ExeTracer
@ -119,7 +119,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.system_port system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port
master=system.physmem.port[0]
slave=system.system_port system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port
[system.physmem]
type=PhysicalMemory
@ -129,5 +130,5 @@ latency_var=0
null=false
range=0:134217727
zero=false
port=system.membus.port[1]
port=system.membus.master[0]

12
tests/long/se/40.perlbmk/ref/arm/linux/simple-atomic/stats.txt
View file

@ -4,11 +4,11 @@ sim_seconds 0.945613 # Nu
sim_ticks 945613131000 # Number of ticks simulated
final_tick 945613131000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 2494982 # Simulator instruction rate (inst/s)
host_op_rate 3397821 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 1704217996 # Simulator tick rate (ticks/s)
host_mem_usage 217680 # Number of bytes of host memory used
host_seconds 554.87 # Real time elapsed on the host
host_inst_rate 2461578 # Simulator instruction rate (inst/s)
host_op_rate 3352328 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 1681400523 # Simulator tick rate (ticks/s)
host_mem_usage 221408 # Number of bytes of host memory used
host_seconds 562.40 # Real time elapsed on the host
sim_insts 1384381614 # Number of instructions simulated
sim_ops 1885336367 # Number of ops (including micro ops) simulated
system.physmem.bytes_read 8025491315 # Number of bytes read from this memory
@ -72,7 +72,7 @@ system.cpu.committedOps 1885336367 # Nu
system.cpu.num_int_alu_accesses 1653698876 # Number of integer alu accesses
system.cpu.num_fp_alu_accesses 52289415 # Number of float alu accesses
system.cpu.num_func_calls 80344203 # number of times a function call or return occured
system.cpu.num_conditional_control_insts 223625914 # number of instructions that are conditional controls
system.cpu.num_conditional_control_insts 223764558 # number of instructions that are conditional controls
system.cpu.num_int_insts 1653698876 # number of integer instructions
system.cpu.num_fp_insts 52289415 # number of float instructions
system.cpu.num_int_register_reads 8601515950 # number of times the integer registers were read

28
tests/long/se/40.perlbmk/ref/arm/linux/simple-timing/config.ini
View file

@ -26,7 +26,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
system_port=system.membus.port[0]
system_port=system.membus.slave[0]
[system.cpu]
type=TimingSimpleCPU
@ -59,7 +59,7 @@ icache_port=system.cpu.icache.cpu_side
[system.cpu.dcache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -80,7 +80,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.port[1]
mem_side=system.cpu.toL2Bus.slave[1]
[system.cpu.dtb]
type=ArmTLB
@ -93,11 +93,11 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.cpu.toL2Bus.port[3]
port=system.cpu.toL2Bus.slave[3]
[system.cpu.icache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -118,7 +118,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.port[0]
mem_side=system.cpu.toL2Bus.slave[0]
[system.cpu.interrupts]
type=ArmInterrupts
@ -134,11 +134,11 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.cpu.toL2Bus.port[2]
port=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -158,8 +158,8 @@ tgts_per_mshr=5
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.toL2Bus.port[4]
mem_side=system.membus.port[2]
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=Bus
@ -169,7 +169,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.l2cache.cpu_side
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
[system.cpu.tracer]
type=ExeTracer
@ -201,7 +202,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side
master=system.physmem.port[0]
slave=system.system_port system.cpu.l2cache.mem_side
[system.physmem]
type=PhysicalMemory
@ -211,5 +213,5 @@ latency_var=0
null=false
range=0:134217727
zero=false
port=system.membus.port[1]
port=system.membus.master[0]

12
tests/long/se/40.perlbmk/ref/arm/linux/simple-timing/stats.txt
View file

@ -4,11 +4,11 @@ sim_seconds 2.369902 # Nu
sim_ticks 2369901960000 # Number of ticks simulated
final_tick 2369901960000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 1307856 # Simulator instruction rate (inst/s)
host_op_rate 1774200 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 2243399723 # Simulator tick rate (ticks/s)
host_mem_usage 226844 # Number of bytes of host memory used
host_seconds 1056.39 # Real time elapsed on the host
host_inst_rate 1323415 # Simulator instruction rate (inst/s)
host_op_rate 1795307 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 2270088736 # Simulator tick rate (ticks/s)
host_mem_usage 230320 # Number of bytes of host memory used
host_seconds 1043.97 # Real time elapsed on the host
sim_insts 1381604347 # Number of instructions simulated
sim_ops 1874244950 # Number of ops (including micro ops) simulated
system.physmem.bytes_read 94696320 # Number of bytes read from this memory
@ -72,7 +72,7 @@ system.cpu.committedOps 1874244950 # Nu
system.cpu.num_int_alu_accesses 1653698876 # Number of integer alu accesses
system.cpu.num_fp_alu_accesses 52289415 # Number of float alu accesses
system.cpu.num_func_calls 80344203 # number of times a function call or return occured
system.cpu.num_conditional_control_insts 223625914 # number of instructions that are conditional controls
system.cpu.num_conditional_control_insts 223764558 # number of instructions that are conditional controls
system.cpu.num_int_insts 1653698876 # number of integer instructions
system.cpu.num_fp_insts 52289415 # number of float instructions
system.cpu.num_int_register_reads 10466679954 # number of times the integer registers were read

28
tests/long/se/50.vortex/ref/arm/linux/o3-timing/config.ini
View file

@ -26,7 +26,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
system_port=system.membus.port[0]
system_port=system.membus.slave[0]
[system.cpu]
type=DerivO3CPU
@ -127,7 +127,7 @@ icache_port=system.cpu.icache.cpu_side
[system.cpu.dcache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -148,7 +148,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.port[1]
mem_side=system.cpu.toL2Bus.slave[1]
[system.cpu.dtb]
type=ArmTLB
@ -161,7 +161,7 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.cpu.toL2Bus.port[3]
port=system.cpu.toL2Bus.slave[3]
[system.cpu.fuPool]
type=FUPool
@ -428,7 +428,7 @@ opLat=3
[system.cpu.icache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -449,7 +449,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.port[0]
mem_side=system.cpu.toL2Bus.slave[0]
[system.cpu.interrupts]
type=ArmInterrupts
@ -465,11 +465,11 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.cpu.toL2Bus.port[2]
port=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -489,8 +489,8 @@ tgts_per_mshr=5
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.toL2Bus.port[4]
mem_side=system.membus.port[2]
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=Bus
@ -500,7 +500,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.l2cache.cpu_side
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
[system.cpu.tracer]
type=ExeTracer
@ -532,7 +533,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side
master=system.physmem.port[0]
slave=system.system_port system.cpu.l2cache.mem_side
[system.physmem]
type=PhysicalMemory
@ -542,5 +544,5 @@ latency_var=0
null=false
range=0:134217727
zero=false
port=system.membus.port[1]
port=system.membus.master[0]

6
tests/long/se/50.vortex/ref/arm/linux/o3-timing/simout
View file

@ -1,11 +1,11 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Feb 12 2012 17:19:56
gem5 started Feb 12 2012 20:47:12
gem5 compiled Mar 9 2012 10:15:20
gem5 started Mar 9 2012 10:25:21
gem5 executing on zizzer
command line: build/ARM/gem5.fast -d build/ARM/tests/fast/long/se/50.vortex/arm/linux/o3-timing -re tests/run.py build/ARM/tests/fast/long/se/50.vortex/arm/linux/o3-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
info: Increasing stack size by one page.
Exiting @ tick 30746529500 because target called exit()
Exiting @ tick 30755543500 because target called exit()

1096
tests/long/se/50.vortex/ref/arm/linux/o3-timing/stats.txt
View file

File diff suppressed because it is too large Load diff

15
tests/long/se/50.vortex/ref/arm/linux/simple-atomic/config.ini
View file

@ -26,7 +26,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
system_port=system.membus.port[0]
system_port=system.membus.slave[0]
[system.cpu]
type=AtomicSimpleCPU
@ -57,8 +57,8 @@ system=system
tracer=system.cpu.tracer
width=1
workload=system.cpu.workload
dcache_port=system.membus.port[3]
icache_port=system.membus.port[2]
dcache_port=system.membus.slave[2]
icache_port=system.membus.slave[1]
[system.cpu.dtb]
type=ArmTLB
@ -71,7 +71,7 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.membus.port[5]
port=system.membus.slave[4]
[system.cpu.interrupts]
type=ArmInterrupts
@ -87,7 +87,7 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.membus.port[4]
port=system.membus.slave[3]
[system.cpu.tracer]
type=ExeTracer
@ -119,7 +119,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.system_port system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port
master=system.physmem.port[0]
slave=system.system_port system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port
[system.physmem]
type=PhysicalMemory
@ -129,5 +130,5 @@ latency_var=0
null=false
range=0:134217727
zero=false
port=system.membus.port[1]
port=system.membus.master[0]

12
tests/long/se/50.vortex/ref/arm/linux/simple-atomic/stats.txt
View file

@ -4,11 +4,11 @@ sim_seconds 0.053932 # Nu
sim_ticks 53932162000 # Number of ticks simulated
final_tick 53932162000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 2464229 # Simulator instruction rate (inst/s)
host_op_rate 3496968 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 1874136829 # Simulator tick rate (ticks/s)
host_mem_usage 220180 # Number of bytes of host memory used
host_seconds 28.78 # Real time elapsed on the host
host_inst_rate 2398112 # Simulator instruction rate (inst/s)
host_op_rate 3403143 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 1823852749 # Simulator tick rate (ticks/s)
host_mem_usage 223920 # Number of bytes of host memory used
host_seconds 29.57 # Real time elapsed on the host
sim_insts 70913189 # Number of instructions simulated
sim_ops 100632437 # Number of ops (including micro ops) simulated
system.physmem.bytes_read 419153654 # Number of bytes read from this memory
@ -72,7 +72,7 @@ system.cpu.committedOps 100632437 # Nu
system.cpu.num_int_alu_accesses 91472788 # Number of integer alu accesses
system.cpu.num_fp_alu_accesses 56 # Number of float alu accesses
system.cpu.num_func_calls 3287514 # number of times a function call or return occured
system.cpu.num_conditional_control_insts 8920660 # number of instructions that are conditional controls
system.cpu.num_conditional_control_insts 10735849 # number of instructions that are conditional controls
system.cpu.num_int_insts 91472788 # number of integer instructions
system.cpu.num_fp_insts 56 # number of float instructions
system.cpu.num_int_register_reads 452177233 # number of times the integer registers were read

28
tests/long/se/50.vortex/ref/arm/linux/simple-timing/config.ini
View file

@ -26,7 +26,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
system_port=system.membus.port[0]
system_port=system.membus.slave[0]
[system.cpu]
type=TimingSimpleCPU
@ -59,7 +59,7 @@ icache_port=system.cpu.icache.cpu_side
[system.cpu.dcache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -80,7 +80,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.port[1]
mem_side=system.cpu.toL2Bus.slave[1]
[system.cpu.dtb]
type=ArmTLB
@ -93,11 +93,11 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.cpu.toL2Bus.port[3]
port=system.cpu.toL2Bus.slave[3]
[system.cpu.icache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -118,7 +118,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.port[0]
mem_side=system.cpu.toL2Bus.slave[0]
[system.cpu.interrupts]
type=ArmInterrupts
@ -134,11 +134,11 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.cpu.toL2Bus.port[2]
port=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -158,8 +158,8 @@ tgts_per_mshr=5
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.toL2Bus.port[4]
mem_side=system.membus.port[2]
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=Bus
@ -169,7 +169,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.l2cache.cpu_side
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
[system.cpu.tracer]
type=ExeTracer
@ -201,7 +202,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side
master=system.physmem.port[0]
slave=system.system_port system.cpu.l2cache.mem_side
[system.physmem]
type=PhysicalMemory
@ -211,5 +213,5 @@ latency_var=0
null=false
range=0:134217727
zero=false
port=system.membus.port[1]
port=system.membus.master[0]

12
tests/long/se/50.vortex/ref/arm/linux/simple-timing/stats.txt
View file

@ -4,11 +4,11 @@ sim_seconds 0.133117 # Nu
sim_ticks 133117442000 # Number of ticks simulated
final_tick 133117442000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 1269489 # Simulator instruction rate (inst/s)
host_op_rate 1800168 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 2401339947 # Simulator tick rate (ticks/s)
host_mem_usage 229088 # Number of bytes of host memory used
host_seconds 55.43 # Real time elapsed on the host
host_inst_rate 1310173 # Simulator instruction rate (inst/s)
host_op_rate 1857860 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 2478297620 # Simulator tick rate (ticks/s)
host_mem_usage 232836 # Number of bytes of host memory used
host_seconds 53.71 # Real time elapsed on the host
sim_insts 70373636 # Number of instructions simulated
sim_ops 99791663 # Number of ops (including micro ops) simulated
system.physmem.bytes_read 8570688 # Number of bytes read from this memory
@ -72,7 +72,7 @@ system.cpu.committedOps 99791663 # Nu
system.cpu.num_int_alu_accesses 91472788 # Number of integer alu accesses
system.cpu.num_fp_alu_accesses 56 # Number of float alu accesses
system.cpu.num_func_calls 3287514 # number of times a function call or return occured
system.cpu.num_conditional_control_insts 8920660 # number of instructions that are conditional controls
system.cpu.num_conditional_control_insts 10735849 # number of instructions that are conditional controls
system.cpu.num_int_insts 91472788 # number of integer instructions
system.cpu.num_fp_insts 56 # number of float instructions
system.cpu.num_int_register_reads 533542913 # number of times the integer registers were read

28
tests/long/se/60.bzip2/ref/arm/linux/o3-timing/config.ini
View file

@ -26,7 +26,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
system_port=system.membus.port[0]
system_port=system.membus.slave[0]
[system.cpu]
type=DerivO3CPU
@ -127,7 +127,7 @@ icache_port=system.cpu.icache.cpu_side
[system.cpu.dcache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -148,7 +148,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.port[1]
mem_side=system.cpu.toL2Bus.slave[1]
[system.cpu.dtb]
type=ArmTLB
@ -161,7 +161,7 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.cpu.toL2Bus.port[3]
port=system.cpu.toL2Bus.slave[3]
[system.cpu.fuPool]
type=FUPool
@ -428,7 +428,7 @@ opLat=3
[system.cpu.icache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -449,7 +449,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.port[0]
mem_side=system.cpu.toL2Bus.slave[0]
[system.cpu.interrupts]
type=ArmInterrupts
@ -465,11 +465,11 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.cpu.toL2Bus.port[2]
port=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -489,8 +489,8 @@ tgts_per_mshr=5
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.toL2Bus.port[4]
mem_side=system.membus.port[2]
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=Bus
@ -500,7 +500,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.l2cache.cpu_side
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
[system.cpu.tracer]
type=ExeTracer
@ -532,7 +533,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side
master=system.physmem.port[0]
slave=system.system_port system.cpu.l2cache.mem_side
[system.physmem]
type=PhysicalMemory
@ -542,5 +544,5 @@ latency_var=0
null=false
range=0:134217727
zero=false
port=system.membus.port[1]
port=system.membus.master[0]

1
tests/long/se/60.bzip2/ref/arm/linux/o3-timing/simerr
View file

@ -1,2 +1,3 @@
warn: Sockets disabled, not accepting gdb connections
warn: CP14 unimplemented crn[8], opc1[2], crm[9], opc2[4]
hack: be nice to actually delete the event here

6
tests/long/se/60.bzip2/ref/arm/linux/o3-timing/simout
View file

@ -1,8 +1,8 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Feb 12 2012 17:19:56
gem5 started Feb 12 2012 20:51:32
gem5 compiled Mar 9 2012 10:15:20
gem5 started Mar 9 2012 10:27:07
gem5 executing on zizzer
command line: build/ARM/gem5.fast -d build/ARM/tests/fast/long/se/60.bzip2/arm/linux/o3-timing -re tests/run.py build/ARM/tests/fast/long/se/60.bzip2/arm/linux/o3-timing
Global frequency set at 1000000000000 ticks per second
@ -24,4 +24,4 @@ Uncompressing Data
Uncompressed data 1048576 bytes in length
Uncompressed data compared correctly
Tested 1MB buffer: OK!
Exiting @ tick 464073050000 because target called exit()
Exiting @ tick 464094642500 because target called exit()

968
tests/long/se/60.bzip2/ref/arm/linux/o3-timing/stats.txt
View file

File diff suppressed because it is too large Load diff

15
tests/long/se/60.bzip2/ref/arm/linux/simple-atomic/config.ini
View file

@ -26,7 +26,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
system_port=system.membus.port[0]
system_port=system.membus.slave[0]
[system.cpu]
type=AtomicSimpleCPU
@ -57,8 +57,8 @@ system=system
tracer=system.cpu.tracer
width=1
workload=system.cpu.workload
dcache_port=system.membus.port[3]
icache_port=system.membus.port[2]
dcache_port=system.membus.slave[2]
icache_port=system.membus.slave[1]
[system.cpu.dtb]
type=ArmTLB
@ -71,7 +71,7 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.membus.port[5]
port=system.membus.slave[4]
[system.cpu.interrupts]
type=ArmInterrupts
@ -87,7 +87,7 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.membus.port[4]
port=system.membus.slave[3]
[system.cpu.tracer]
type=ExeTracer
@ -119,7 +119,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.system_port system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port
master=system.physmem.port[0]
slave=system.system_port system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port
[system.physmem]
type=PhysicalMemory
@ -129,5 +130,5 @@ latency_var=0
null=false
range=0:134217727
zero=false
port=system.membus.port[1]
port=system.membus.master[0]

12
tests/long/se/60.bzip2/ref/arm/linux/simple-atomic/stats.txt
View file

@ -4,11 +4,11 @@ sim_seconds 0.861538 # Nu
sim_ticks 861538205000 # Number of ticks simulated
final_tick 861538205000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 3097767 # Simulator instruction rate (inst/s)
host_op_rate 3455787 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 1727895925 # Simulator tick rate (ticks/s)
host_mem_usage 212936 # Number of bytes of host memory used
host_seconds 498.61 # Real time elapsed on the host
host_inst_rate 3009474 # Simulator instruction rate (inst/s)
host_op_rate 3357290 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 1678647401 # Simulator tick rate (ticks/s)
host_mem_usage 216676 # Number of bytes of host memory used
host_seconds 513.23 # Real time elapsed on the host
sim_insts 1544563049 # Number of instructions simulated
sim_ops 1723073862 # Number of ops (including micro ops) simulated
system.physmem.bytes_read 7759650064 # Number of bytes read from this memory
@ -72,7 +72,7 @@ system.cpu.committedOps 1723073862 # Nu
system.cpu.num_int_alu_accesses 1536941850 # Number of integer alu accesses
system.cpu.num_fp_alu_accesses 36 # Number of float alu accesses
system.cpu.num_func_calls 27330134 # number of times a function call or return occured
system.cpu.num_conditional_control_insts 177498066 # number of instructions that are conditional controls
system.cpu.num_conditional_control_insts 177498450 # number of instructions that are conditional controls
system.cpu.num_int_insts 1536941850 # number of integer instructions
system.cpu.num_fp_insts 36 # number of float instructions
system.cpu.num_int_register_reads 7861284536 # number of times the integer registers were read

28
tests/long/se/60.bzip2/ref/arm/linux/simple-timing/config.ini
View file

@ -26,7 +26,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
system_port=system.membus.port[0]
system_port=system.membus.slave[0]
[system.cpu]
type=TimingSimpleCPU
@ -59,7 +59,7 @@ icache_port=system.cpu.icache.cpu_side
[system.cpu.dcache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -80,7 +80,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.port[1]
mem_side=system.cpu.toL2Bus.slave[1]
[system.cpu.dtb]
type=ArmTLB
@ -93,11 +93,11 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.cpu.toL2Bus.port[3]
port=system.cpu.toL2Bus.slave[3]
[system.cpu.icache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -118,7 +118,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.port[0]
mem_side=system.cpu.toL2Bus.slave[0]
[system.cpu.interrupts]
type=ArmInterrupts
@ -134,11 +134,11 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.cpu.toL2Bus.port[2]
port=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -158,8 +158,8 @@ tgts_per_mshr=5
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.toL2Bus.port[4]
mem_side=system.membus.port[2]
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=Bus
@ -169,7 +169,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.l2cache.cpu_side
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
[system.cpu.tracer]
type=ExeTracer
@ -201,7 +202,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side
master=system.physmem.port[0]
slave=system.system_port system.cpu.l2cache.mem_side
[system.physmem]
type=PhysicalMemory
@ -211,5 +213,5 @@ latency_var=0
null=false
range=0:134217727
zero=false
port=system.membus.port[1]
port=system.membus.master[0]

12
tests/long/se/60.bzip2/ref/arm/linux/simple-timing/stats.txt
View file

@ -4,11 +4,11 @@ sim_seconds 2.431420 # Nu
sim_ticks 2431419954000 # Number of ticks simulated
final_tick 2431419954000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 1647360 # Simulator instruction rate (inst/s)
host_op_rate 1838469 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 2603021191 # Simulator tick rate (ticks/s)
host_mem_usage 221840 # Number of bytes of host memory used
host_seconds 934.08 # Real time elapsed on the host
host_inst_rate 1665877 # Simulator instruction rate (inst/s)
host_op_rate 1859134 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 2632279795 # Simulator tick rate (ticks/s)
host_mem_usage 225588 # Number of bytes of host memory used
host_seconds 923.69 # Real time elapsed on the host
sim_insts 1538759609 # Number of instructions simulated
sim_ops 1717270343 # Number of ops (including micro ops) simulated
system.physmem.bytes_read 172766016 # Number of bytes read from this memory
@ -72,7 +72,7 @@ system.cpu.committedOps 1717270343 # Nu
system.cpu.num_int_alu_accesses 1536941850 # Number of integer alu accesses
system.cpu.num_fp_alu_accesses 36 # Number of float alu accesses
system.cpu.num_func_calls 27330134 # number of times a function call or return occured
system.cpu.num_conditional_control_insts 177498066 # number of instructions that are conditional controls
system.cpu.num_conditional_control_insts 177498450 # number of instructions that are conditional controls
system.cpu.num_int_insts 1536941850 # number of integer instructions
system.cpu.num_fp_insts 36 # number of float instructions
system.cpu.num_int_register_reads 9304894713 # number of times the integer registers were read

28
tests/long/se/70.twolf/ref/arm/linux/o3-timing/config.ini
View file

@ -26,7 +26,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
system_port=system.membus.port[0]
system_port=system.membus.slave[0]
[system.cpu]
type=DerivO3CPU
@ -127,7 +127,7 @@ icache_port=system.cpu.icache.cpu_side
[system.cpu.dcache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -148,7 +148,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.port[1]
mem_side=system.cpu.toL2Bus.slave[1]
[system.cpu.dtb]
type=ArmTLB
@ -161,7 +161,7 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.cpu.toL2Bus.port[3]
port=system.cpu.toL2Bus.slave[3]
[system.cpu.fuPool]
type=FUPool
@ -428,7 +428,7 @@ opLat=3
[system.cpu.icache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -449,7 +449,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.port[0]
mem_side=system.cpu.toL2Bus.slave[0]
[system.cpu.interrupts]
type=ArmInterrupts
@ -465,11 +465,11 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.cpu.toL2Bus.port[2]
port=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -489,8 +489,8 @@ tgts_per_mshr=5
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.toL2Bus.port[4]
mem_side=system.membus.port[2]
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=Bus
@ -500,7 +500,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.l2cache.cpu_side
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
[system.cpu.tracer]
type=ExeTracer
@ -532,7 +533,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side
master=system.physmem.port[0]
slave=system.system_port system.cpu.l2cache.mem_side
[system.physmem]
type=PhysicalMemory
@ -542,5 +544,5 @@ latency_var=0
null=false
range=0:134217727
zero=false
port=system.membus.port[1]
port=system.membus.master[0]

6
tests/long/se/70.twolf/ref/arm/linux/o3-timing/simout
View file

@ -1,8 +1,8 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Feb 12 2012 17:19:56
gem5 started Feb 12 2012 20:58:01
gem5 compiled Mar 9 2012 10:15:20
gem5 started Mar 9 2012 10:41:00
gem5 executing on zizzer
command line: build/ARM/gem5.fast -d build/ARM/tests/fast/long/se/70.twolf/arm/linux/o3-timing -re tests/run.py build/ARM/tests/fast/long/se/70.twolf/arm/linux/o3-timing
Couldn't unlink build/ARM/tests/fast/long/se/70.twolf/arm/linux/o3-timing/smred.sav
@ -23,4 +23,4 @@ info: Increasing stack size by one page.
76 77 78 79 80 81 82 83 84 85 86 87 88 89 90
91 92 93 94 95 96 97 98 99 100 101 102 103 104 105
106 107 108 109 110 111 112 113 114 115 116 117 118 119 120
122 123 124 Exiting @ tick 88632152500 because target called exit()
122 123 124 Exiting @ tick 88752965000 because target called exit()

990
tests/long/se/70.twolf/ref/arm/linux/o3-timing/stats.txt
View file

File diff suppressed because it is too large Load diff

15
tests/long/se/70.twolf/ref/arm/linux/simple-atomic/config.ini
View file

@ -26,7 +26,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
system_port=system.membus.port[0]
system_port=system.membus.slave[0]
[system.cpu]
type=AtomicSimpleCPU
@ -57,8 +57,8 @@ system=system
tracer=system.cpu.tracer
width=1
workload=system.cpu.workload
dcache_port=system.membus.port[3]
icache_port=system.membus.port[2]
dcache_port=system.membus.slave[2]
icache_port=system.membus.slave[1]
[system.cpu.dtb]
type=ArmTLB
@ -71,7 +71,7 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.membus.port[5]
port=system.membus.slave[4]
[system.cpu.interrupts]
type=ArmInterrupts
@ -87,7 +87,7 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.membus.port[4]
port=system.membus.slave[3]
[system.cpu.tracer]
type=ExeTracer
@ -119,7 +119,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.system_port system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port
master=system.physmem.port[0]
slave=system.system_port system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port
[system.physmem]
type=PhysicalMemory
@ -129,5 +130,5 @@ latency_var=0
null=false
range=0:134217727
zero=false
port=system.membus.port[1]
port=system.membus.master[0]

12
tests/long/se/70.twolf/ref/arm/linux/simple-atomic/stats.txt
View file

@ -4,11 +4,11 @@ sim_seconds 0.103107 # Nu
sim_ticks 103106771000 # Number of ticks simulated
final_tick 103106771000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 3118510 # Simulator instruction rate (inst/s)
host_op_rate 3414466 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 1865971013 # Simulator tick rate (ticks/s)
host_mem_usage 216012 # Number of bytes of host memory used
host_seconds 55.26 # Real time elapsed on the host
host_inst_rate 3116971 # Simulator instruction rate (inst/s)
host_op_rate 3412781 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 1865050079 # Simulator tick rate (ticks/s)
host_mem_usage 219792 # Number of bytes of host memory used
host_seconds 55.28 # Real time elapsed on the host
sim_insts 172317417 # Number of instructions simulated
sim_ops 188670900 # Number of ops (including micro ops) simulated
system.physmem.bytes_read 869973902 # Number of bytes read from this memory
@ -72,7 +72,7 @@ system.cpu.committedOps 188670900 # Nu
system.cpu.num_int_alu_accesses 150106226 # Number of integer alu accesses
system.cpu.num_fp_alu_accesses 1752310 # Number of float alu accesses
system.cpu.num_func_calls 3504894 # number of times a function call or return occured
system.cpu.num_conditional_control_insts 31949383 # number of instructions that are conditional controls
system.cpu.num_conditional_control_insts 32534025 # number of instructions that are conditional controls
system.cpu.num_int_insts 150106226 # number of integer instructions
system.cpu.num_fp_insts 1752310 # number of float instructions
system.cpu.num_int_register_reads 809396650 # number of times the integer registers were read

28
tests/long/se/70.twolf/ref/arm/linux/simple-timing/config.ini
View file

@ -26,7 +26,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
system_port=system.membus.port[0]
system_port=system.membus.slave[0]
[system.cpu]
type=TimingSimpleCPU
@ -59,7 +59,7 @@ icache_port=system.cpu.icache.cpu_side
[system.cpu.dcache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -80,7 +80,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.port[1]
mem_side=system.cpu.toL2Bus.slave[1]
[system.cpu.dtb]
type=ArmTLB
@ -93,11 +93,11 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.cpu.toL2Bus.port[3]
port=system.cpu.toL2Bus.slave[3]
[system.cpu.icache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -118,7 +118,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.port[0]
mem_side=system.cpu.toL2Bus.slave[0]
[system.cpu.interrupts]
type=ArmInterrupts
@ -134,11 +134,11 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.cpu.toL2Bus.port[2]
port=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -158,8 +158,8 @@ tgts_per_mshr=5
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.toL2Bus.port[4]
mem_side=system.membus.port[2]
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=Bus
@ -169,7 +169,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.l2cache.cpu_side
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
[system.cpu.tracer]
type=ExeTracer
@ -201,7 +202,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side
master=system.physmem.port[0]
slave=system.system_port system.cpu.l2cache.mem_side
[system.physmem]
type=PhysicalMemory
@ -211,5 +213,5 @@ latency_var=0
null=false
range=0:134217727
zero=false
port=system.membus.port[1]
port=system.membus.master[0]

12
tests/long/se/70.twolf/ref/arm/linux/simple-timing/stats.txt
View file

@ -4,11 +4,11 @@ sim_seconds 0.232077 # Nu
sim_ticks 232077154000 # Number of ticks simulated
final_tick 232077154000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 1867609 # Simulator instruction rate (inst/s)
host_op_rate 2045232 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 2522247357 # Simulator tick rate (ticks/s)
host_mem_usage 224952 # Number of bytes of host memory used
host_seconds 92.01 # Real time elapsed on the host
host_inst_rate 1962361 # Simulator instruction rate (inst/s)
host_op_rate 2148995 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 2650211347 # Simulator tick rate (ticks/s)
host_mem_usage 228700 # Number of bytes of host memory used
host_seconds 87.57 # Real time elapsed on the host
sim_insts 171842491 # Number of instructions simulated
sim_ops 188185929 # Number of ops (including micro ops) simulated
system.physmem.bytes_read 220992 # Number of bytes read from this memory
@ -71,7 +71,7 @@ system.cpu.committedOps 188185929 # Nu
system.cpu.num_int_alu_accesses 150106226 # Number of integer alu accesses
system.cpu.num_fp_alu_accesses 1752310 # Number of float alu accesses
system.cpu.num_func_calls 3504894 # number of times a function call or return occured
system.cpu.num_conditional_control_insts 31949383 # number of instructions that are conditional controls
system.cpu.num_conditional_control_insts 32534025 # number of instructions that are conditional controls
system.cpu.num_int_insts 150106226 # number of integer instructions
system.cpu.num_fp_insts 1752310 # number of float instructions
system.cpu.num_int_register_reads 898652287 # number of times the integer registers were read

14
tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/stats.txt
View file

@ -4,11 +4,11 @@ sim_seconds 2.411694 # Nu
sim_ticks 2411694099500 # Number of ticks simulated
final_tick 2411694099500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 1397437 # Simulator instruction rate (inst/s)
host_op_rate 1806505 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 54757981393 # Simulator tick rate (ticks/s)
host_mem_usage 382236 # Number of bytes of host memory used
host_seconds 44.04 # Real time elapsed on the host
host_inst_rate 2022463 # Simulator instruction rate (inst/s)
host_op_rate 2614492 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 79249307765 # Simulator tick rate (ticks/s)
host_mem_usage 379912 # Number of bytes of host memory used
host_seconds 30.43 # Real time elapsed on the host
sim_insts 61546998 # Number of instructions simulated
sim_ops 79563488 # Number of ops (including micro ops) simulated
system.realview.nvmem.bytes_read 68 # Number of bytes read from this memory
@ -264,7 +264,7 @@ system.cpu0.committedOps 44975797 # Nu
system.cpu0.num_int_alu_accesses 39858123 # Number of integer alu accesses
system.cpu0.num_fp_alu_accesses 4945 # Number of float alu accesses
system.cpu0.num_func_calls 1311755 # number of times a function call or return occured
system.cpu0.num_conditional_control_insts 4494669 # number of instructions that are conditional controls
system.cpu0.num_conditional_control_insts 4652122 # number of instructions that are conditional controls
system.cpu0.num_int_insts 39858123 # number of integer instructions
system.cpu0.num_fp_insts 4945 # number of float instructions
system.cpu0.num_int_register_reads 202125744 # number of times the integer registers were read
@ -433,7 +433,7 @@ system.cpu1.committedOps 34587691 # Nu
system.cpu1.num_int_alu_accesses 30998246 # Number of integer alu accesses
system.cpu1.num_fp_alu_accesses 5772 # Number of float alu accesses
system.cpu1.num_func_calls 758024 # number of times a function call or return occured
system.cpu1.num_conditional_control_insts 3375080 # number of instructions that are conditional controls
system.cpu1.num_conditional_control_insts 3438794 # number of instructions that are conditional controls
system.cpu1.num_int_insts 30998246 # number of integer instructions
system.cpu1.num_fp_insts 5772 # number of float instructions
system.cpu1.num_int_register_reads 156835040 # number of times the integer registers were read

12
tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/stats.txt
View file

@ -4,11 +4,11 @@ sim_seconds 2.332317 # Nu
sim_ticks 2332316587000 # Number of ticks simulated
final_tick 2332316587000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 1602803 # Simulator instruction rate (inst/s)
host_op_rate 2069882 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 63078962864 # Simulator tick rate (ticks/s)
host_mem_usage 382192 # Number of bytes of host memory used
host_seconds 36.97 # Real time elapsed on the host
host_inst_rate 1979884 # Simulator instruction rate (inst/s)
host_op_rate 2556849 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 77919104565 # Simulator tick rate (ticks/s)
host_mem_usage 379864 # Number of bytes of host memory used
host_seconds 29.93 # Real time elapsed on the host
sim_insts 59262876 # Number of instructions simulated
sim_ops 76532931 # Number of ops (including micro ops) simulated
system.realview.nvmem.bytes_read 20 # Number of bytes read from this memory
@ -189,7 +189,7 @@ system.cpu.committedOps 76532931 # Nu
system.cpu.num_int_alu_accesses 68161177 # Number of integer alu accesses
system.cpu.num_fp_alu_accesses 10269 # Number of float alu accesses
system.cpu.num_func_calls 1971944 # number of times a function call or return occured
system.cpu.num_conditional_control_insts 7572657 # number of instructions that are conditional controls
system.cpu.num_conditional_control_insts 7793824 # number of instructions that are conditional controls
system.cpu.num_int_insts 68161177 # number of integer instructions
system.cpu.num_fp_insts 10269 # number of float instructions
system.cpu.num_int_register_reads 345365607 # number of times the integer registers were read

14
tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/stats.txt
View file

@ -4,11 +4,11 @@ sim_seconds 2.669611 # Nu
sim_ticks 2669611225000 # Number of ticks simulated
final_tick 2669611225000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 656752 # Simulator instruction rate (inst/s)
host_op_rate 840171 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 28603719755 # Simulator tick rate (ticks/s)
host_mem_usage 384032 # Number of bytes of host memory used
host_seconds 93.33 # Real time elapsed on the host
host_inst_rate 888599 # Simulator instruction rate (inst/s)
host_op_rate 1136769 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 38701401221 # Simulator tick rate (ticks/s)
host_mem_usage 381720 # Number of bytes of host memory used
host_seconds 68.98 # Real time elapsed on the host
sim_insts 61295262 # Number of instructions simulated
sim_ops 78413959 # Number of ops (including micro ops) simulated
system.realview.nvmem.bytes_read 68 # Number of bytes read from this memory
@ -494,7 +494,7 @@ system.cpu0.committedOps 43969024 # Nu
system.cpu0.num_int_alu_accesses 39881498 # Number of integer alu accesses
system.cpu0.num_fp_alu_accesses 4107 # Number of float alu accesses
system.cpu0.num_func_calls 977479 # number of times a function call or return occured
system.cpu0.num_conditional_control_insts 4512711 # number of instructions that are conditional controls
system.cpu0.num_conditional_control_insts 4566516 # number of instructions that are conditional controls
system.cpu0.num_int_insts 39881498 # number of integer instructions
system.cpu0.num_fp_insts 4107 # number of float instructions
system.cpu0.num_int_register_reads 225043856 # number of times the integer registers were read
@ -762,7 +762,7 @@ system.cpu1.committedOps 34444935 # Nu
system.cpu1.num_int_alu_accesses 31033253 # Number of integer alu accesses
system.cpu1.num_fp_alu_accesses 5714 # Number of float alu accesses
system.cpu1.num_func_calls 1093852 # number of times a function call or return occured
system.cpu1.num_conditional_control_insts 3362553 # number of instructions that are conditional controls
system.cpu1.num_conditional_control_insts 3529915 # number of instructions that are conditional controls
system.cpu1.num_int_insts 31033253 # number of integer instructions
system.cpu1.num_fp_insts 5714 # number of float instructions
system.cpu1.num_int_register_reads 181157193 # number of times the integer registers were read

12
tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/stats.txt
View file

@ -4,11 +4,11 @@ sim_seconds 2.591442 # Nu
sim_ticks 2591441692000 # Number of ticks simulated
final_tick 2591441692000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 652104 # Simulator instruction rate (inst/s)
host_op_rate 833155 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 28605499848 # Simulator tick rate (ticks/s)
host_mem_usage 382484 # Number of bytes of host memory used
host_seconds 90.59 # Real time elapsed on the host
host_inst_rate 886915 # Simulator instruction rate (inst/s)
host_op_rate 1133159 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 38905818967 # Simulator tick rate (ticks/s)
host_mem_usage 380156 # Number of bytes of host memory used
host_seconds 66.61 # Real time elapsed on the host
sim_insts 59075683 # Number of instructions simulated
sim_ops 75477515 # Number of ops (including micro ops) simulated
system.realview.nvmem.bytes_read 20 # Number of bytes read from this memory
@ -301,7 +301,7 @@ system.cpu.committedOps 75477515 # Nu
system.cpu.num_int_alu_accesses 68255270 # Number of integer alu accesses
system.cpu.num_fp_alu_accesses 10269 # Number of float alu accesses
system.cpu.num_func_calls 1975579 # number of times a function call or return occured
system.cpu.num_conditional_control_insts 7580611 # number of instructions that are conditional controls
system.cpu.num_conditional_control_insts 7801778 # number of instructions that are conditional controls
system.cpu.num_int_insts 68255270 # number of integer instructions
system.cpu.num_fp_insts 10269 # number of float instructions
system.cpu.num_int_register_reads 390835391 # number of times the integer registers were read

2
tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/status
View file

@ -1 +1 @@
build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing passed.
build/ARM/tests/fast/quick/fs/10.linux-boot/arm/linux/realview-simple-timing FAILED!

4
tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/simout
View file

@ -1,8 +1,8 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Mar 7 2012 20:12:09
gem5 started Mar 7 2012 20:12:14
gem5 compiled Mar 9 2012 10:15:20
gem5 started Mar 9 2012 10:17:15
gem5 executing on zizzer
command line: build/ARM/gem5.fast -d build/ARM/tests/fast/quick/se/00.hello/arm/linux/o3-timing-checker -re tests/run.py build/ARM/tests/fast/quick/se/00.hello/arm/linux/o3-timing-checker
Global frequency set at 1000000000000 ticks per second

10
tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/stats.txt
View file

@ -4,11 +4,11 @@ sim_seconds 0.000010 # Nu
sim_ticks 10389500 # Number of ticks simulated
final_tick 10389500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 3665 # Simulator instruction rate (inst/s)
host_op_rate 4572 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 8277068 # Simulator tick rate (ticks/s)
host_mem_usage 225396 # Number of bytes of host memory used
host_seconds 1.26 # Real time elapsed on the host
host_inst_rate 29724 # Simulator instruction rate (inst/s)
host_op_rate 37079 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 67113828 # Simulator tick rate (ticks/s)
host_mem_usage 225376 # Number of bytes of host memory used
host_seconds 0.16 # Real time elapsed on the host
sim_insts 4600 # Number of instructions simulated
sim_ops 5739 # Number of ops (including micro ops) simulated
system.physmem.bytes_read 25600 # Number of bytes read from this memory

28
tests/quick/se/00.hello/ref/arm/linux/o3-timing/config.ini
View file

@ -26,7 +26,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
system_port=system.membus.port[0]
system_port=system.membus.slave[0]
[system.cpu]
type=DerivO3CPU
@ -127,7 +127,7 @@ icache_port=system.cpu.icache.cpu_side
[system.cpu.dcache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -148,7 +148,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.port[1]
mem_side=system.cpu.toL2Bus.slave[1]
[system.cpu.dtb]
type=ArmTLB
@ -161,7 +161,7 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.cpu.toL2Bus.port[3]
port=system.cpu.toL2Bus.slave[3]
[system.cpu.fuPool]
type=FUPool
@ -428,7 +428,7 @@ opLat=3
[system.cpu.icache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -449,7 +449,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.port[0]
mem_side=system.cpu.toL2Bus.slave[0]
[system.cpu.interrupts]
type=ArmInterrupts
@ -465,11 +465,11 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.cpu.toL2Bus.port[2]
port=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -489,8 +489,8 @@ tgts_per_mshr=5
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.toL2Bus.port[4]
mem_side=system.membus.port[2]
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=Bus
@ -500,7 +500,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.l2cache.cpu_side
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
[system.cpu.tracer]
type=ExeTracer
@ -532,7 +533,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side
master=system.physmem.port[0]
slave=system.system_port system.cpu.l2cache.mem_side
[system.physmem]
type=PhysicalMemory
@ -542,5 +544,5 @@ latency_var=0
null=false
range=0:134217727
zero=false
port=system.membus.port[1]
port=system.membus.master[0]

4
tests/quick/se/00.hello/ref/arm/linux/o3-timing/simout
View file

@ -1,8 +1,8 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Feb 12 2012 17:19:56
gem5 started Feb 12 2012 19:57:12
gem5 compiled Mar 9 2012 10:15:20
gem5 started Mar 9 2012 10:17:15
gem5 executing on zizzer
command line: build/ARM/gem5.fast -d build/ARM/tests/fast/quick/se/00.hello/arm/linux/o3-timing -re tests/run.py build/ARM/tests/fast/quick/se/00.hello/arm/linux/o3-timing
Global frequency set at 1000000000000 ticks per second

10
tests/quick/se/00.hello/ref/arm/linux/o3-timing/stats.txt
View file

@ -4,11 +4,11 @@ sim_seconds 0.000010 # Nu
sim_ticks 10389500 # Number of ticks simulated
final_tick 10389500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 66059 # Simulator instruction rate (inst/s)
host_op_rate 82394 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 149123755 # Simulator tick rate (ticks/s)
host_mem_usage 221320 # Number of bytes of host memory used
host_seconds 0.07 # Real time elapsed on the host
host_inst_rate 31505 # Simulator instruction rate (inst/s)
host_op_rate 39300 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 71135954 # Simulator tick rate (ticks/s)
host_mem_usage 225060 # Number of bytes of host memory used
host_seconds 0.15 # Real time elapsed on the host
sim_insts 4600 # Number of instructions simulated
sim_ops 5739 # Number of ops (including micro ops) simulated
system.physmem.bytes_read 25600 # Number of bytes read from this memory

2
tests/quick/se/00.hello/ref/arm/linux/simple-atomic-dummychecker/config.ini
View file

@ -154,7 +154,7 @@ egid=100
env=
errout=cerr
euid=100
executable=/projects/pd/randd/dist/test-progs/hello/bin/arm/linux/hello
executable=/dist/m5/regression/test-progs/hello/bin/arm/linux/hello
gid=100
input=cin
max_stack_size=67108864

6
tests/quick/se/00.hello/ref/arm/linux/simple-atomic-dummychecker/simout
View file

@ -1,9 +1,9 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Mar 8 2012 09:03:12
gem5 started Mar 8 2012 09:06:54
gem5 executing on u200540-lin
gem5 compiled Mar 9 2012 10:15:20
gem5 started Mar 9 2012 10:17:15
gem5 executing on zizzer
command line: build/ARM/gem5.fast -d build/ARM/tests/fast/quick/se/00.hello/arm/linux/simple-atomic-dummychecker -re tests/run.py build/ARM/tests/fast/quick/se/00.hello/arm/linux/simple-atomic-dummychecker
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...

10
tests/quick/se/00.hello/ref/arm/linux/simple-atomic-dummychecker/stats.txt
View file

@ -4,11 +4,11 @@ sim_seconds 0.000003 # Nu
sim_ticks 2875500 # Number of ticks simulated
final_tick 2875500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 76819 # Simulator instruction rate (inst/s)
host_op_rate 95818 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 47998674 # Simulator tick rate (ticks/s)
host_mem_usage 212240 # Number of bytes of host memory used
host_seconds 0.06 # Real time elapsed on the host
host_inst_rate 25080 # Simulator instruction rate (inst/s)
host_op_rate 31285 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 15673750 # Simulator tick rate (ticks/s)
host_mem_usage 214860 # Number of bytes of host memory used
host_seconds 0.18 # Real time elapsed on the host
sim_insts 4600 # Number of instructions simulated
sim_ops 5739 # Number of ops (including micro ops) simulated
system.physmem.bytes_read 22944 # Number of bytes read from this memory

15
tests/quick/se/00.hello/ref/arm/linux/simple-atomic/config.ini
View file

@ -26,7 +26,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
system_port=system.membus.port[0]
system_port=system.membus.slave[0]
[system.cpu]
type=AtomicSimpleCPU
@ -57,8 +57,8 @@ system=system
tracer=system.cpu.tracer
width=1
workload=system.cpu.workload
dcache_port=system.membus.port[3]
icache_port=system.membus.port[2]
dcache_port=system.membus.slave[2]
icache_port=system.membus.slave[1]
[system.cpu.dtb]
type=ArmTLB
@ -71,7 +71,7 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.membus.port[5]
port=system.membus.slave[4]
[system.cpu.interrupts]
type=ArmInterrupts
@ -87,7 +87,7 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.membus.port[4]
port=system.membus.slave[3]
[system.cpu.tracer]
type=ExeTracer
@ -119,7 +119,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.system_port system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port
master=system.physmem.port[0]
slave=system.system_port system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port
[system.physmem]
type=PhysicalMemory
@ -129,5 +130,5 @@ latency_var=0
null=false
range=0:134217727
zero=false
port=system.membus.port[1]
port=system.membus.master[0]

4
tests/quick/se/00.hello/ref/arm/linux/simple-atomic/simout
View file

@ -1,8 +1,8 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Feb 11 2012 13:10:40
gem5 started Feb 11 2012 15:36:01
gem5 compiled Mar 9 2012 10:15:20
gem5 started Mar 9 2012 10:17:15
gem5 executing on zizzer
command line: build/ARM/gem5.fast -d build/ARM/tests/fast/quick/se/00.hello/arm/linux/simple-atomic -re tests/run.py build/ARM/tests/fast/quick/se/00.hello/arm/linux/simple-atomic
Global frequency set at 1000000000000 ticks per second

10
tests/quick/se/00.hello/ref/arm/linux/simple-atomic/stats.txt
View file

@ -4,11 +4,11 @@ sim_seconds 0.000003 # Nu
sim_ticks 2875500 # Number of ticks simulated
final_tick 2875500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 866385 # Simulator instruction rate (inst/s)
host_op_rate 1077395 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 538148768 # Simulator tick rate (ticks/s)
host_mem_usage 211284 # Number of bytes of host memory used
host_seconds 0.01 # Real time elapsed on the host
host_inst_rate 24562 # Simulator instruction rate (inst/s)
host_op_rate 30640 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 15350765 # Simulator tick rate (ticks/s)
host_mem_usage 214764 # Number of bytes of host memory used
host_seconds 0.19 # Real time elapsed on the host
sim_insts 4600 # Number of instructions simulated
sim_ops 5739 # Number of ops (including micro ops) simulated
system.physmem.bytes_read 22944 # Number of bytes read from this memory

28
tests/quick/se/00.hello/ref/arm/linux/simple-timing/config.ini
View file

@ -26,7 +26,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
system_port=system.membus.port[0]
system_port=system.membus.slave[0]
[system.cpu]
type=TimingSimpleCPU
@ -59,7 +59,7 @@ icache_port=system.cpu.icache.cpu_side
[system.cpu.dcache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -80,7 +80,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.port[1]
mem_side=system.cpu.toL2Bus.slave[1]
[system.cpu.dtb]
type=ArmTLB
@ -93,11 +93,11 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.cpu.toL2Bus.port[3]
port=system.cpu.toL2Bus.slave[3]
[system.cpu.icache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -118,7 +118,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.port[0]
mem_side=system.cpu.toL2Bus.slave[0]
[system.cpu.interrupts]
type=ArmInterrupts
@ -134,11 +134,11 @@ type=ArmTableWalker
max_backoff=100000
min_backoff=0
sys=system
port=system.cpu.toL2Bus.port[2]
port=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
addr_range=0:18446744073709551615
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@ -158,8 +158,8 @@ tgts_per_mshr=5
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.toL2Bus.port[4]
mem_side=system.membus.port[2]
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=Bus
@ -169,7 +169,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.l2cache.cpu_side
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
[system.cpu.tracer]
type=ExeTracer
@ -201,7 +202,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side
master=system.physmem.port[0]
slave=system.system_port system.cpu.l2cache.mem_side
[system.physmem]
type=PhysicalMemory
@ -211,5 +213,5 @@ latency_var=0
null=false
range=0:134217727
zero=false
port=system.membus.port[1]
port=system.membus.master[0]

4
tests/quick/se/00.hello/ref/arm/linux/simple-timing/simout
View file

@ -1,8 +1,8 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Feb 11 2012 13:10:40
gem5 started Feb 11 2012 15:36:11
gem5 compiled Mar 9 2012 10:15:20
gem5 started Mar 9 2012 10:17:15
gem5 executing on zizzer
command line: build/ARM/gem5.fast -d build/ARM/tests/fast/quick/se/00.hello/arm/linux/simple-timing -re tests/run.py build/ARM/tests/fast/quick/se/00.hello/arm/linux/simple-timing
Global frequency set at 1000000000000 ticks per second

10
tests/quick/se/00.hello/ref/arm/linux/simple-timing/stats.txt
View file

@ -4,11 +4,11 @@ sim_seconds 0.000026 # Nu
sim_ticks 26361000 # Number of ticks simulated
final_tick 26361000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 456104 # Simulator instruction rate (inst/s)
host_op_rate 565540 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 2619225899 # Simulator tick rate (ticks/s)
host_mem_usage 220184 # Number of bytes of host memory used
host_seconds 0.01 # Real time elapsed on the host
host_inst_rate 29458 # Simulator instruction rate (inst/s)
host_op_rate 36586 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 169706423 # Simulator tick rate (ticks/s)
host_mem_usage 223936 # Number of bytes of host memory used
host_seconds 0.16 # Real time elapsed on the host
sim_insts 4574 # Number of instructions simulated
sim_ops 5682 # Number of ops (including micro ops) simulated
system.physmem.bytes_read 22400 # Number of bytes read from this memory