sanchayanmaity/gem5
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Author SHA1 Message Date
Korey Sewell
e28cbc98a0 o3cpu build for mips 
--HG--
extra : convert_revision : 2c0be7a8c0a54ba5b1b2b69468f788d20abc8452
 2007-06-28 05:30:46 -04:00
Korey Sewell
ac19e0c505 FINISH off merge of mips mt/dsp isa extensions by adding the ControlBitfieldOPerand to ISA Parser. Now, while things do build, we have to fix broken functionality... 
src/arch/isa_parser.py:
    add back deleted writeback in Control Operand

--HG--
extra : convert_revision : dba11af220a1281fa53f79d87e4f8752bdfc56db
 2007-06-22 21:09:35 -04:00
Korey Sewell
c6d137f565 add Control Bitfield class 
--HG--
extra : convert_revision : 31e7243c8820cb9f6744c53c417460dee9adaf44
 2007-06-22 20:09:46 -04:00
Korey Sewell
753adb38d5 mips import pt. 1 
src/arch/mips/SConscript:
    "mips import pt.1".

--HG--
extra : convert_revision : 2e393341938bebf32fb638a209262d074fad4cc1
 2007-06-22 19:03:42 -04:00
Gabe Black
16c1b5484f Merge zizzer.eecs.umich.edu:/bk/newmem 
into  zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/newmem-o3-micro

--HG--
extra : convert_revision : 3fa3fa4544ff8c9d2135e1befe6c8f4757006a2a
 2007-06-22 17:44:33 -04:00
Gabe Black
70d6044527 Make symbols for regular registers. 
--HG--
extra : convert_revision : 28a6df1efe4298877dc2b20179caeb25dfdc4622
 2007-06-21 20:35:27 +00:00
Gabe Black
ec24de8b59 Get rid of an unnecessary include file. 
--HG--
extra : convert_revision : d8d139180917f54006a5a79df4a0f206ddd39fed
 2007-06-21 20:35:26 +00:00
Gabe Black
49490b334a Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-micro

src/cpu/o3/fetch_impl.hh:
    hand merge

--HG--
extra : convert_revision : 3f71f3ac2035eec8b6f7bceb6906edb4dd09c045
 2007-06-21 20:35:25 +00:00
Gabe Black
25e385e0cf Use the new symbols to clean up the assembler. 
--HG--
extra : convert_revision : 005464e875ede1e37dfe0e0482c29fd793ca52be
 2007-06-21 15:30:05 +00:00
Gabe Black
13bf022053 Needed for last change set to work :P 
--HG--
extra : convert_revision : 9e57e582dd1ef2805d5adffcc0ccfd99596d9f54
 2007-06-21 15:29:02 +00:00
Gabe Black
ae60d58083 Define symbols for the x86 specialization of the microassembler. 
--HG--
extra : convert_revision : 1fd66ba519d211fec18641b6df94b7640c56080c
 2007-06-21 15:28:08 +00:00
Gabe Black
0dc15742e3 Fix a comment. 
--HG--
extra : convert_revision : 17e67cf6ea17fe6f971ef608547983fbb94adec9
 2007-06-21 15:26:38 +00:00
Gabe Black
7e7d3ee0aa Fix a problem where part of a microops parameters might be interpretted as an "ID", and also added support for symbols. 
--HG--
extra : convert_revision : 60d1ef677a6a59a9d897086893843ec1ec368148
 2007-06-21 15:26:01 +00:00
Gabe Black
efce09e958 Add in code that lays the ground work for setting flags. 
--HG--
extra : convert_revision : e4fcb64d45804700a0ef34e8acf5615b66e2a527
 2007-06-21 13:48:44 +00:00
Gabe Black
77aa98d0f8 Implement rip relative addressing and put in some missing loads and stores. 
--HG--
extra : convert_revision : 99053414cef40f13c5226871a72909b2622d8c26
 2007-06-20 19:08:04 +00:00
Gabe Black
c4ebfa850e Fix a newly introduced bug where the predecoder wasn't picking up all the displacement. 
--HG--
extra : convert_revision : 9202c11ee187458adcd85ba616b7f7f4bdd4eec1
 2007-06-20 19:06:08 +00:00
Gabe Black
a19f1c4014 X86 probably doesn't need a window save area. 
--HG--
extra : convert_revision : c4a76262d4396f5f5b96b1c9e751014c2abbd78a
 2007-06-20 19:05:06 +00:00
Gabe Black
6c4b3db04c Fix a typo in one of the operand type tags. 
--HG--
extra : convert_revision : bea87214ba4b40d75a350b803154836ec6d0ae9e
 2007-06-20 19:04:41 +00:00
Gabe Black
e6328170e1 Comment out some unnecessary debug output. 
--HG--
extra : convert_revision : 9df17841d970a7995d8ed1d51ee66e2c5457e5e3
 2007-06-20 19:04:40 +00:00
Gabe Black
a735b7e282 Forgot to check these in... 
--HG--
extra : convert_revision : f489fda15740bae0a73bfb012f3bab5790b5c2b5
 2007-06-20 19:04:39 +00:00
Gabe Black
27da9f99b1 Comment out some unnecessary debug statements. 
--HG--
extra : convert_revision : aabaaf099f070832bf42cedf2472170e0738ee1c
 2007-06-20 19:04:38 +00:00
Gabe Black
a68ddf685c Make memory instructions work better, add more macroop implementations, add an lea microop, move EmulEnv into it's own .cc and .hh. 
--HG--
extra : convert_revision : 1212b8463eab1c1dcba7182c487d1e9184cf9bea
 2007-06-20 15:02:50 +00:00
Gabe Black
5c48a05813 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  doughnut.hpl.hp.com:/home/gblack/newmem-o3-micro

src/cpu/base_dyn_inst_impl.hh:
src/cpu/o3/fetch_impl.hh:
    Hand merge

--HG--
extra : convert_revision : 0c0692033ac30133672d8dfe1f1a27e9d9e95a3d
 2007-06-19 18:54:40 -07:00
Gabe Black
d2ccf5e509 More faithfulness to what instructions should work in what modes, and added the MOVSXD instruction. 
--HG--
extra : convert_revision : 38b9bf6cd4bdec6355b1158967c7d3562715cacd
 2007-06-19 22:40:10 +00:00
Gabe Black
ea70e6d6da Make branches work by repopulating the predecoder every time through. This is probably fine as far as the predecoder goes, but the simple cpu might want to not refetch something it already has. That reintroduces the self modifying code problem though. 
--HG--
extra : convert_revision : 802197e65f8dc1ad657c6b346091e03cb563b0c0
 2007-06-19 18:17:34 +00:00
Gabe Black
d496492793 Make instructions that are illegal in 64 bit mode not do the wrong thing in 64 bit mode. Also add in more versions of PUSH and POP, and a version of near CALL. 
--HG--
extra : convert_revision : 7d8266cdfa54ac25610466b3533d3e9e5433297b
 2007-06-19 17:56:06 +00:00
Gabe Black
4486762a85 Make an error message a little more descriptive. 
--HG--
extra : convert_revision : dbde025b1dcec0083e7276a9938bd21e7ab2887f
 2007-06-19 17:53:10 +00:00
Gabe Black
ebe4d05f70 Renovate the "fault" microop implementation. 
--HG--
extra : convert_revision : dc9d67dd5413f00f16d37cb2d0f8b0d10971e14a
 2007-06-19 14:50:35 +00:00
Gabe Black
056cfc345b Get rid of the commented out versions of macroops which have been reimplemented. The comments are basically functioning like a todo list. 
--HG--
extra : convert_revision : cb07e3813f6cf882b4a5c77c498ffbca26adf586
 2007-06-19 14:26:42 +00:00
Gabe Black
6e286cddfa Get rid of the immediate and displacement components of the EmulEnv struct and use them directly out of the instruction. The extra copies are conceptually realistic but are just innefficient as implemented. Also don't use the zeroeth microcode register for general storage since it's now the zero register, and implement a load and a store microops. 
--HG--
extra : convert_revision : 0686296ca8b72940d961ecc6051063bfda1e932d
 2007-06-19 14:18:25 +00:00
Gabe Black
8caef7d25a Add a stack size bitfield and expose the mode component of the ExtMachInst. 
--HG--
extra : convert_revision : aad0ec51745fb94335898b0565bb11c1b399bbee
 2007-06-19 14:15:21 +00:00
Gabe Black
1012fd4427 Add a function to print out segment names. 
--HG--
extra : convert_revision : 8cbe3ca0d05165f7da5d6fa38c899ecc9e782511
 2007-06-19 14:14:17 +00:00
Gabe Black
4ae284282e Get rid of unnecessary output. 
--HG--
extra : convert_revision : 0df9a12788b8ce3225c113c095d5f13e49a7c544
 2007-06-18 14:15:47 +00:00
Gabe Black
6c12577937 Add in incomplete pick and merge functions which read and write pieces of registers, and fill out microcode disassembly. 
--HG--
extra : convert_revision : 56332b3999a9079b1bd305ee2826abdf593367e1
 2007-06-18 14:15:00 +00:00
Gabe Black
3ceb0a46ae Add in some microregs. 
--HG--
extra : convert_revision : e8a894c2f7901329bd390a4cfd92209d0e29cf80
 2007-06-14 20:52:25 +00:00
Gabe Black
dad3058224 Sign extend byte immediates as well. There might need to be a fancier system in place to handle this in the future. 
--HG--
extra : convert_revision : 2c5bd719c770d9a93a57bd29782842f82384863d
 2007-06-14 20:52:24 +00:00
Gabe Black
7213944110 Fix limm. 
--HG--
extra : convert_revision : ab76b11c2bb2f3abc0e7a84f7167d92d16ed074e
 2007-06-14 20:52:23 +00:00
Gabe Black
866cc8214b Implement a handful more instructions and differentiate macroops based on the operand types they expect. 
--HG--
extra : convert_revision : f9c8e694a8c0eb33b988657dca03ab495b65bee8
 2007-06-14 20:52:22 +00:00
Gabe Black
a8f65b18bc Move the high byte register indices to the right place. 
--HG--
extra : convert_revision : 3f04036d598b6572bab6ec06d162b97564a6529c
 2007-06-14 20:52:21 +00:00
Gabe Black
7219b6edd9 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : ba718de4d676f6d0bd80c29de46be1f6a2f73feb
 2007-06-14 20:52:20 +00:00
Vincentius Robby
5b5570e0bf Modified instruction decode method. 
Make code compatible with new decode method.

src/arch/alpha/remote_gdb.cc:
src/cpu/base_dyn_inst_impl.hh:
src/cpu/exetrace.cc:
src/cpu/simple/base.cc:
    Make code compatible with new decode method.
src/cpu/static_inst.cc:
src/cpu/static_inst.hh:
    Modified instruction decode method.

--HG--
extra : convert_revision : a9a6d3a16fff59bc95d0606ea344bd57e71b8d0a
 2007-06-14 16:52:19 -04:00
Gabe Black
752199f827 Make POP special case its dataSize to default to 64 bits in 64 bit mode. 
--HG--
extra : convert_revision : 5c6251d962d9997676ffc795bb92eeb588caed39
 2007-06-14 13:52:08 +00:00
Gabe Black
cd3fee1b81 Put the mode in the ExtMachInst. 
--HG--
extra : convert_revision : 7fc6567ab3d35c06901e6c8a0435f7cab819e17e
 2007-06-14 13:50:58 +00:00
Gabe Black
640ab1d2e7 Get rid of an unnecessary debug statement. 
--HG--
extra : convert_revision : 0b306dd96f5358474ad6a8bf4a949c12bcd139cd
 2007-06-14 13:49:23 +00:00
Gabe Black
20ec77fdc1 Get rid of some debug output and let macroops set headers in their constructor. The intention is to allow them to modify the emulation environment struct before it's used to construct its microops. 
--HG--
extra : convert_revision : b04fc9ead8e3322fc3af3f14d75e2206ddfbe561
 2007-06-14 13:47:52 +00:00
Gabe Black
d265c9951f Fix up param regular expression to not duplicated the escaping \ and to pair up \s correctly. 
--HG--
extra : convert_revision : b4b790fb8cfd2a9e28568cf978eca70b1c65806b
 2007-06-14 13:45:37 +00:00
Gabe Black
cd8f604cc9 Seperate the pc-pc and the pc of the incoming bytes, and get rid of the "moreBytes" which just takes a MachInst. 
src/arch/x86/predecoder.cc:
    Seperate the pc-pc and the pc of the incoming bytes, and get rid of the "moreBytes" which just takes a MachInst. Also make the "opSize" field describe the number of bytes and not the log of the number of bytes.

--HG--
extra : convert_revision : 3a5ec7053ec69c5cba738a475d8b7fd9e6e6ccc0
 2007-06-13 20:09:03 +00:00
Gabe Black
5fd567425d Fix the operand type tag parser to recognize multi character register names. 
--HG--
extra : convert_revision : e025620e29f2515d51240e96c4a05a4f74bdf72e
 2007-06-13 18:08:06 +00:00
Gabe Black
715efab3b9 Partially implement "POP" 
--HG--
extra : convert_revision : ba454579a6a82ce4924102a633e5758fb2a30b2d
 2007-06-13 18:06:34 +00:00
Gabe Black
fd45c4a58f Move load/store microops into their own file. They still don't do anything, though. 
--HG--
extra : convert_revision : 251763c614b9056c3ca7a85ef92c416552da893f
 2007-06-13 18:05:08 +00:00
Gabe Black
dc13db8578 Fix the immediate version of register operations, and get their name to show up correctly. 
--HG--
extra : convert_revision : 9fc36b99c9027e35f22983d5d1e22c940fa093de
 2007-06-13 18:01:23 +00:00
Gabe Black
4e7786d971 Minor comment fix up. 
--HG--
extra : convert_revision : 20d517c4bc2aae54e53368c708b5abb27ed3a469
 2007-06-12 17:35:11 +00:00
Gabe Black
0d8d3f988f Make use of some of the REX prefix. 
--HG--
extra : convert_revision : 948eceb59a1cd9b02ad9355dd5894af0bbec4e83
 2007-06-12 16:47:10 +00:00
Gabe Black
baf145e0f5 Reset the rex and legacy prefix components of the ExtMachInst as well. 
--HG--
extra : convert_revision : 832a324fec2d2b59f1c101d7fa72d7f670f0495d
 2007-06-12 16:46:04 +00:00
Gabe Black
548b121c1c Flesh out the bitfields for prefixes. 
--HG--
extra : convert_revision : 0956b3d3532cba3856deda914d7cc708377b701b
 2007-06-12 16:45:06 +00:00
Gabe Black
ea3f7c9531 Add in MOV instructions. 
--HG--
extra : convert_revision : 54a6b36dff3c15699faf2c767fc594359422c0ee
 2007-06-12 16:31:42 +00:00
Gabe Black
eb68c9986e Fix up a comment that wasn't changed over to x86. 
--HG--
extra : convert_revision : 58448b984447babba708b9dcb1b4939ed35308a6
 2007-06-12 16:30:48 +00:00
Gabe Black
2e9fa55f51 Get rid of unnecessary namespace prototype. 
--HG--
extra : convert_revision : 388c0d6f2af96c4d33c1fe5d42a21866a4d71556
 2007-06-12 16:29:49 +00:00
Gabe Black
7a52faa39b Use objects to pass around output code, and fix/implement a few things. 
src/arch/x86/isa/formats/multi.isa:
    Make the formats use objects to pass around output code.

--HG--
extra : convert_revision : 428915bda22e848befac15097f56375c1818426e
 2007-06-12 16:25:47 +00:00
Gabe Black
d0c5da2cd4 Add an address size bitfield to the isa description and the ExtMachInst 
--HG--
extra : convert_revision : f8907ef5ef77e050eeb00d895263b49da4a9b6e9
 2007-06-12 16:23:42 +00:00
Gabe Black
4ad73abcfb Add some dprintfs 
--HG--
extra : convert_revision : 7e9a1feb808604364584893eed1735a8da1556fb
 2007-06-12 16:22:35 +00:00
Gabe Black
a7f3bbcfab Make microOp vs microop and macroOp vs macroop capitilization consistent. 
src/arch/x86/isa/macroop.isa:
    Make microOp vs microop and macroOp vs macroop capitilization consistent. Also fill out the emulation environment handling a little more, and use an object to pass around output code.
src/arch/x86/isa/microops/base.isa:
    Make microOp vs microop and macroOp vs macroop capitilization consistent. Also adjust python to C++ bool translation.

--HG--
extra : convert_revision : 6f4bacfa334c42732c845f9a7f211cbefc73f96f
 2007-06-12 16:21:47 +00:00
Gabe Black
1493ceda8f Fix another outdated comment. 
--HG--
extra : convert_revision : 55f89d9f96734e96ae082399df6b0206d112cd6c
 2007-06-08 18:41:58 +00:00
Gabe Black
78910a7b3d Adjust a few more comments. 
--HG--
extra : convert_revision : 9b79ce72acf8932ce26e1744a149f2fd2435ea96
 2007-06-08 17:41:23 +00:00
Gabe Black
b9c38660ef Fix up a potentially misleading comment. 
--HG--
extra : convert_revision : 58d37d8cc8e41c9640038d6dddae4cb5649638aa
 2007-06-08 17:30:16 +00:00
Gabe Black
57a8c32bea Fix the formatting on a comment. 
--HG--
extra : convert_revision : 89636a7410dec54235416e3c16db98cc5eecf2b0
 2007-06-08 17:16:05 +00:00
Gabe Black
038fa48990 Clean up where files are included, and get rid of some cruft. 
src/arch/x86/isa/main.isa:
    Clean up where files are included.

--HG--
extra : convert_revision : 0528359432bf0fb9198b63de9611176bc78e07c7
 2007-06-08 17:14:39 +00:00
Gabe Black
658df56bf3 Clean things up a little. 
--HG--
extra : convert_revision : 62ad0839847db85738054da6f7da8a956b24143e
 2007-06-08 17:06:34 +00:00
Gabe Black
8bd213b3b8 Move the microcode assembly to a python package instead of isa_parser files. Also, the code is now a single string which runs through the microcode assembler rather than docstrings associated with classes named after each architectural level instruction. 
--HG--
extra : convert_revision : 20e6d6ac625dde8f1885acc445882096df562778
 2007-06-08 16:13:20 +00:00
Gabe Black
1f7ed5b7b4 Big changes to use the new microcode assembler. 
--HG--
extra : convert_revision : 7d1a43c5791a2e7e30533746da3dd7036a5b8799
 2007-06-08 16:09:43 +00:00
Gabe Black
ce8f4c1f16 Fixed format arguments for XOR. 
--HG--
extra : convert_revision : d64fe734fcdcc414ba9af9fc5f0f795429d5dad3
 2007-06-08 16:07:31 +00:00
Gabe Black
2f194cc6f7 Add a bitfield to refer to the opSize member of the extMachInst. 
--HG--
extra : convert_revision : 1854ebc00a9f3ae8c36cc579de6c3a2b48c0fdb6
 2007-06-08 16:06:22 +00:00
Gabe Black
dba02f703b Make limm (load immediate) microop 
--HG--
extra : convert_revision : f4883febd92cfade61c1a6a31fdb2d27296d9044
 2007-06-04 19:53:06 +00:00
Gabe Black
41bc0fc5b2 Reworking x86's microcode system. This is a work in progress, and X86 doesn't compile. 
src/arch/x86/isa/decoder/one_byte_opcodes.isa:
src/arch/x86/isa/macroop.isa:
src/arch/x86/isa/main.isa:
src/arch/x86/isa/microasm.isa:
src/arch/x86/isa/microops/base.isa:
src/arch/x86/isa/microops/microops.isa:
src/arch/x86/isa/operands.isa:
src/arch/x86/isa/microops/regop.isa:
src/arch/x86/isa/microops/specop.isa:
    Reworking x86's microcode system

--HG--
extra : convert_revision : cab66be59ed758b192226af17eddd5a86aa190f3
 2007-06-04 15:59:20 +00:00
Gabe Black
6e8a06b237 Clean things up 
--HG--
extra : convert_revision : 72ffcf5492d4e4f899ea5761639147e001c525b0
 2007-06-01 16:24:51 +00:00
Gabe Black
a703fdfcf9 Add a second section to make sure the ROM is extended properly. 
--HG--
extra : convert_revision : a69c09c5e62c8b00d6c8039199c02e8fecbf9f2f
 2007-05-31 22:21:21 +00:00
Gabe Black
2bdd4eda12 Add rom based macroops into the macroop dict instead of dropping them on the floor 
--HG--
extra : convert_revision : 964391c8050af0239da32bcc77550740de1f3160
 2007-05-31 22:21:20 +00:00
Gabe Black
287446396c Do something with ROM based macroops 
--HG--
extra : convert_revision : 3a14c683ab89217c083c58e8c374607dd04b66c4
 2007-05-31 22:21:19 +00:00
Gabe Black
d24a9c7d21 Make directives take parameters and use the directive function and not it's name 
--HG--
extra : convert_revision : fbc93ba592b0cc009696e8d7edead841ec2ea01c
 2007-05-31 20:45:06 +00:00
Gabe Black
ace2890f9f Handle comments 
--HG--
extra : convert_revision : 3f93baaf250922eb40d8718e978273b0def1e4dd
 2007-05-31 20:45:05 +00:00
Gabe Black
c432588981 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

src/cpu/simple/base.cc:
    Hand merge

--HG--
extra : convert_revision : a2902ef9d917d22ffb9c7dfa2fd444694a65240d
 2007-05-31 20:45:04 +00:00
Vincentius Robby
ecf1eb7248 Assign traceData to be NULL at BaseSimpleCPU constructor. 
Initialize a temporary variable for thread->readPC() at setupFetchRequest() to reduce function calls.
exec tracing isn't needed for m5.fast binaries
Moved MISCREG_GL, MISCREG_CWP, and MISCREG_TLB_DATA out of switch statement and use if blocks instead.

src/arch/sparc/miscregfile.cc:
    Moved MISCREG_GL, MISCREG_CWP, and MISCREG_TLB_DATA out of switch statement and use if blocks instead.
src/cpu/simple/base.cc:
    Assign traceData to be NULL at BaseSimpleCPU constructor.
    Initialize a temporary variable for thread->readPC() at setupFetchRequest() to reduce function calls.
    exec tracing isn't needed for m5.fast binaries

--HG--
extra : convert_revision : 5dc92fff05c9bde994f1e0f1bb40e11c44eb72c6
 2007-05-31 16:01:41 -04:00
Gabe Black
62fde97bb2 Early micro assembler 
src/arch/micro_asm.py:
    Micro assembler
src/arch/micro_asm_test.py:
    Test script for the micro assembler. This probably should go somewhere else eventually.

--HG--
extra : convert_revision : 277fdadec94763ae657f55f501704693b81e0015
 2007-05-31 13:52:48 +00:00
Gabe Black
7860c045e2 x86 work that hadn't been checked in. 
src/arch/x86/isa/decoder/one_byte_opcodes.isa:
    Give the "MOV" instruction the format of it's arguments. This will likely need to be completely overhauled in the near future.
src/arch/x86/predecoder.cc:
src/arch/x86/predecoder.hh:
    Make the predecoder explicitly reset itself rather than counting on it happening naturally.
src/arch/x86/predecoder_tables.cc:
    Fix the immediate size table
src/arch/x86/regfile.cc:
    nextnpc is bogus

--HG--
extra : convert_revision : 0926701fedaab41817e64bb05410a25174484a5a
 2007-05-31 13:50:35 +00:00
Nathan Binkert
35147170f9 Move SimObject python files alongside the C++ and fix 
the SConscript files so that only the objects that are
actually available in a given build are compiled in.
Remove a bunch of files that aren't used anymore.

--HG--
rename : src/python/m5/objects/AlphaTLB.py => src/arch/alpha/AlphaTLB.py
rename : src/python/m5/objects/SparcTLB.py => src/arch/sparc/SparcTLB.py
rename : src/python/m5/objects/BaseCPU.py => src/cpu/BaseCPU.py
rename : src/python/m5/objects/FuncUnit.py => src/cpu/FuncUnit.py
rename : src/python/m5/objects/IntrControl.py => src/cpu/IntrControl.py
rename : src/python/m5/objects/MemTest.py => src/cpu/memtest/MemTest.py
rename : src/python/m5/objects/FUPool.py => src/cpu/o3/FUPool.py
rename : src/python/m5/objects/FuncUnitConfig.py => src/cpu/o3/FuncUnitConfig.py
rename : src/python/m5/objects/O3CPU.py => src/cpu/o3/O3CPU.py
rename : src/python/m5/objects/OzoneCPU.py => src/cpu/ozone/OzoneCPU.py
rename : src/python/m5/objects/SimpleOzoneCPU.py => src/cpu/ozone/SimpleOzoneCPU.py
rename : src/python/m5/objects/BadDevice.py => src/dev/BadDevice.py
rename : src/python/m5/objects/Device.py => src/dev/Device.py
rename : src/python/m5/objects/DiskImage.py => src/dev/DiskImage.py
rename : src/python/m5/objects/Ethernet.py => src/dev/Ethernet.py
rename : src/python/m5/objects/Ide.py => src/dev/Ide.py
rename : src/python/m5/objects/Pci.py => src/dev/Pci.py
rename : src/python/m5/objects/Platform.py => src/dev/Platform.py
rename : src/python/m5/objects/SimConsole.py => src/dev/SimConsole.py
rename : src/python/m5/objects/SimpleDisk.py => src/dev/SimpleDisk.py
rename : src/python/m5/objects/Uart.py => src/dev/Uart.py
rename : src/python/m5/objects/AlphaConsole.py => src/dev/alpha/AlphaConsole.py
rename : src/python/m5/objects/Tsunami.py => src/dev/alpha/Tsunami.py
rename : src/python/m5/objects/T1000.py => src/dev/sparc/T1000.py
rename : src/python/m5/objects/Bridge.py => src/mem/Bridge.py
rename : src/python/m5/objects/Bus.py => src/mem/Bus.py
rename : src/python/m5/objects/MemObject.py => src/mem/MemObject.py
rename : src/python/m5/objects/PhysicalMemory.py => src/mem/PhysicalMemory.py
rename : src/python/m5/objects/BaseCache.py => src/mem/cache/BaseCache.py
rename : src/python/m5/objects/CoherenceProtocol.py => src/mem/cache/coherence/CoherenceProtocol.py
rename : src/python/m5/objects/Repl.py => src/mem/cache/tags/Repl.py
rename : src/python/m5/objects/Process.py => src/sim/Process.py
rename : src/python/m5/objects/Root.py => src/sim/Root.py
rename : src/python/m5/objects/System.py => src/sim/System.py
extra : convert_revision : 173f8764bafa8ef899198438fa5573874e407321
 2007-05-27 19:21:17 -07:00
Gabe Black
a3ae9486d5 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  doughnut.mwconnections.com:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 276d00a73b1834d5262129c3f7e0f7fae18e23bc
 2007-05-25 19:29:32 -07:00
Gabe Black
ad02a59f89 Make the lexer and parser use objects and not the last lexer and parser generated. 
--HG--
extra : convert_revision : e751969973599cde711f9d4de0dc4772dda651ed
 2007-05-25 19:26:26 -07:00
Nathan Binkert
44ebb8d3e2 Update to ply 2.3 
ext/ply/ply/lex.py:
ext/ply/ply/yacc.py:
ext/ply/CHANGES:
ext/ply/README:
ext/ply/TODO:
ext/ply/doc/ply.html:
ext/ply/example/ansic/clex.py:
ext/ply/example/ansic/cparse.py:
ext/ply/example/calc/calc.py:
ext/ply/example/hedit/hedit.py:
ext/ply/example/optcalc/calc.py:
ext/ply/test/README:
ext/ply/test/calclex.py:
ext/ply/test/lex_doc1.exp:
ext/ply/test/lex_doc1.py:
ext/ply/test/lex_dup1.exp:
ext/ply/test/lex_dup1.py:
ext/ply/test/lex_dup2.exp:
ext/ply/test/lex_dup2.py:
ext/ply/test/lex_dup3.exp:
ext/ply/test/lex_dup3.py:
ext/ply/test/lex_empty.py:
ext/ply/test/lex_error1.py:
ext/ply/test/lex_error2.py:
ext/ply/test/lex_error3.exp:
ext/ply/test/lex_error3.py:
ext/ply/test/lex_error4.exp:
ext/ply/test/lex_error4.py:
ext/ply/test/lex_hedit.exp:
ext/ply/test/lex_hedit.py:
ext/ply/test/lex_ignore.exp:
ext/ply/test/lex_ignore.py:
ext/ply/test/lex_re1.exp:
ext/ply/test/lex_re1.py:
ext/ply/test/lex_rule1.py:
ext/ply/test/lex_token1.py:
ext/ply/test/lex_token2.py:
ext/ply/test/lex_token3.py:
ext/ply/test/lex_token4.py:
ext/ply/test/lex_token5.exp:
ext/ply/test/lex_token5.py:
ext/ply/test/yacc_badargs.exp:
ext/ply/test/yacc_badargs.py:
ext/ply/test/yacc_badprec.exp:
ext/ply/test/yacc_badprec.py:
ext/ply/test/yacc_badprec2.exp:
ext/ply/test/yacc_badprec2.py:
ext/ply/test/yacc_badrule.exp:
ext/ply/test/yacc_badrule.py:
ext/ply/test/yacc_badtok.exp:
ext/ply/test/yacc_badtok.py:
ext/ply/test/yacc_dup.exp:
ext/ply/test/yacc_dup.py:
ext/ply/test/yacc_error1.exp:
ext/ply/test/yacc_error1.py:
ext/ply/test/yacc_error2.exp:
ext/ply/test/yacc_error2.py:
ext/ply/test/yacc_error3.exp:
ext/ply/test/yacc_error3.py:
ext/ply/test/yacc_inf.exp:
ext/ply/test/yacc_inf.py:
ext/ply/test/yacc_missing1.exp:
ext/ply/test/yacc_missing1.py:
ext/ply/test/yacc_nodoc.exp:
ext/ply/test/yacc_nodoc.py:
ext/ply/test/yacc_noerror.exp:
ext/ply/test/yacc_noerror.py:
ext/ply/test/yacc_nop.exp:
ext/ply/test/yacc_nop.py:
ext/ply/test/yacc_notfunc.exp:
ext/ply/test/yacc_notfunc.py:
ext/ply/test/yacc_notok.exp:
ext/ply/test/yacc_notok.py:
ext/ply/test/yacc_rr.exp:
ext/ply/test/yacc_rr.py:
ext/ply/test/yacc_simple.exp:
ext/ply/test/yacc_simple.py:
ext/ply/test/yacc_sr.exp:
ext/ply/test/yacc_sr.py:
ext/ply/test/yacc_term1.exp:
ext/ply/test/yacc_term1.py:
ext/ply/test/yacc_unused.exp:
ext/ply/test/yacc_unused.py:
ext/ply/test/yacc_uprec.exp:
ext/ply/test/yacc_uprec.py:
    Import patch ply.diff
src/arch/isa_parser.py:
    everything is now within the ply package

--HG--
rename : ext/ply/lex.py => ext/ply/ply/lex.py
rename : ext/ply/yacc.py => ext/ply/ply/yacc.py
extra : convert_revision : fca8deabd5c095bdeabd52a1f236ae1404ef106e
 2007-05-24 21:54:51 -07:00
Gabe Black
a13d5af274 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  doughnut.mwconnections.com:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 3f17fc418ee5a30da2b08a515fb394cc8fcdd237
 2007-05-18 13:36:47 -07:00
Gabe Black
6d199f0b25 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  doughnut.mwconnections.com:/home/gblack/newmem-o3-micro

--HG--
extra : convert_revision : 56c2205cdbb9af64c30b381a80b4d14c97841da7
 2007-05-09 22:04:58 -07:00
Gabe Black
4ad1b58fdd Merge zizzer.eecs.umich.edu:/bk/newmem 
into  doughnut.mwconnections.com:/home/gblack/newmem-o3-micro

--HG--
extra : convert_revision : 545b9e98eb1895f4b9e782224fb6615c71ed6323
 2007-05-09 20:50:46 -07:00
Ali Saidi
37b45e3c8c fix the translating ports so it can add a page on a fault 
--HG--
extra : convert_revision : 56f6f2cbf4e92b7f2dd8c9453831fab86d83ef80
 2007-05-09 15:37:46 -04:00
Gabe Black
dc1c9e0300 Add a hack to truncate addresses to 32 bits in SE. Paging should be changed to use the architecture's TLB, at which point this can be removed. 
--HG--
extra : convert_revision : 54f3c18e5aead727d0ac244ed00fd97d3ca8ad75
 2007-05-08 13:02:19 +00:00
Ali Saidi
39743d35a3 fix flushAddr so it doesn't modify an iterator that has been deleted 
--HG--
extra : convert_revision : 8b7e4948974517b13616ab782aa7e84471b24f10
 2007-05-01 18:12:58 -04:00
Nathan Binkert
69d259b6ae gcc 4.1 claims that mem_data might be used uninitialized, 
though I don't believe that's true.  Placate it anyway.

--HG--
extra : convert_revision : dcd9427af14f0e7a33510054bee4ecbe73e050be
 2007-04-27 13:59:17 -07:00
Gabe Black
cca881a531 Merge zizzer.eecs.umich.edu:/n/wexford/x/gblack/m5/newmem-o3-spec 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-micro

--HG--
extra : convert_revision : 757e1d79033e6f8e0aaaf5ecaf14077d416cff8e
 2007-04-23 15:34:40 +00:00
Gabe Black
a006aa067a Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem 
into  zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : 12f10c174f0eca1ddf74b672414fbe78251f686b
 2007-04-23 11:34:39 -04:00
Gabe Black
cea5435760 Make the GSR into a renamed control register. It should be split into a renamed part and a control part for the different bitfields, but the renamed part is all that's actually used. 
--HG--
extra : convert_revision : ffeb4f874bd4430255064f6e8bcb135309932ff8
 2007-04-22 17:43:45 +00:00
Ali Saidi
53ba34391f fixes for solaris compile 
--HG--
extra : convert_revision : c82a62a61650e3700d237da917c453e5a9676320
 2007-04-21 19:11:38 -04:00
Ali Saidi
e8ace88e89 create base/fenv.c to standerdize fenv across platforms. It's a c file and not a cpp file because c99 
(which defines fenv) doesn't necessarily extend to c++ and it is a problem with solaris. If really
desired this could wrap the ieeefp interface found in bsd* as well, but I see no need at the moment.

src/arch/alpha/isa/fp.isa:
src/arch/sparc/isa/formats/basic.isa:
    use m5_fesetround()/m5_fegetround() istead of fenv interface directly
src/arch/sparc/isa/includes.isa:
    use base/fenv instead of fenv directly
src/base/SConscript:
    add fenv to sconscript
src/base/fenv.hh:
src/base/random.cc:
    m5 implementation to standerdize fenv across platforms.

--HG--
extra : convert_revision : 38d2629affd964dcd1a5ab0db4ac3cb21438e72c
 2007-04-21 17:50:47 -04:00