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gem5/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/config.ini

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Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
[root]
type=Root
children=system
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
full_system=false
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
sim_quantum=0
Stats: Re update stats.
2011-02-08 04:23:13 +01:00
time_sync_enable=false
time_sync_period=100000000000
time_sync_spin_threshold=100000000
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
[system]
type=System
stats: updates due to recent ruby and x86 changes Also updates many out of date config files.
2014-09-01 23:55:52 +02:00
children=clk_domain cpu0 cpu1 cpu2 cpu3 cpu_clk_domain dvfs_handler l2c membus physmem toL2Bus voltage_domain
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
boot_osflags=a
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
cache_line_size=64
clk_domain=system.clk_domain
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
init_param=0
kernel=
stats: updates due to recent ruby and x86 changes Also updates many out of date config files.
2014-09-01 23:55:52 +02:00
kernel_addr_check=true
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
load_addr_mask=1099511627775
stats: updates due to recent ruby and x86 changes Also updates many out of date config files.
2014-09-01 23:55:52 +02:00
load_offset=0
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
mem_mode=atomic
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
mem_ranges=
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
memories=system.physmem
num_work_ids=16
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
readfile=
symbolfile=
Stats: Re update stats.
2011-02-08 04:23:13 +01:00
work_begin_ckpt_count=0
work_begin_cpu_id_exit=-1
work_begin_exit_count=0
work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
system_port=system.membus.slave[0]
[system.clk_domain]
type=SrcClockDomain
clock=1000
stats: updates due to recent ruby and x86 changes Also updates many out of date config files.
2014-09-01 23:55:52 +02:00
domain_id=-1
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
stats: updates due to recent ruby and x86 changes Also updates many out of date config files.
2014-09-01 23:55:52 +02:00
init_perf_level=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
voltage_domain=system.voltage_domain
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
[system.cpu0]
type=AtomicSimpleCPU
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
children=dcache dtb icache interrupts isa itb tracer workload
stats: updates due to recent ruby and x86 changes Also updates many out of date config files.
2014-09-01 23:55:52 +02:00
branchPred=Null
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
checker=Null
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.cpu_clk_domain
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
cpu_id=0
do_checkpoint_insts=true
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
do_quiesce=true
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
do_statistics_insts=true
dtb=system.cpu0.dtb
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
fastmem=false
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
function_trace=false
function_trace_start=0
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
interrupts=system.cpu0.interrupts
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
isa=system.cpu0.isa
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
itb=system.cpu0.itb
max_insts_all_threads=0
max_insts_any_thread=0
max_loads_all_threads=0
max_loads_any_thread=0
numThreads=1
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
profile=0
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
progress_interval=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
simpoint_start_insts=
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
simulate_data_stalls=false
simulate_inst_stalls=false
stats: updates due to recent ruby and x86 changes Also updates many out of date config files.
2014-09-01 23:55:52 +02:00
socket_id=0
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
switched_out=false
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
system=system
tracer=system.cpu0.tracer
width=1
workload=system.cpu0.workload
dcache_port=system.cpu0.dcache.cpu_side
icache_port=system.cpu0.icache.cpu_side
[system.cpu0.dcache]
type=BaseCache
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
children=tags
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
addr_ranges=0:18446744073709551615
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
assoc=4
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.cpu_clk_domain
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
Update stats for new single bad-address responder. Mostly just config.ini updates, though the different response latency for bad addresses caused very minor timing changes in the O3 Linux boot tests.
2009-04-22 07:55:52 +02:00
forward_snoops=true
update stats for preceeding changes
2012-11-02 17:50:06 +01:00
hit_latency=2
tests: update stats for name changes
2011-04-20 03:45:23 +02:00
is_top_level=true
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
max_miss_count=0
mshrs=4
prefetch_on_access=false
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
prefetcher=Null
update stats for preceeding changes
2012-11-02 17:50:06 +01:00
response_latency=2
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
sequential_access=false
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
size=32768
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
system=system
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
tags=system.cpu0.dcache.tags
update stats for preceeding changes
2012-11-02 17:50:06 +01:00
tgts_per_mshr=20
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
two_queue=false
write_buffers=8
cpu_side=system.cpu0.dcache_port
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
mem_side=system.toL2Bus.slave[1]
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
[system.cpu0.dcache.tags]
type=LRU
assoc=4
block_size=64
clk_domain=system.cpu_clk_domain
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
hit_latency=2
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
sequential_access=false
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
size=32768
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
[system.cpu0.dtb]
type=SparcTLB
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
size=64
[system.cpu0.icache]
type=BaseCache
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
children=tags
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
addr_ranges=0:18446744073709551615
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
assoc=1
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.cpu_clk_domain
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
Update stats for new single bad-address responder. Mostly just config.ini updates, though the different response latency for bad addresses caused very minor timing changes in the O3 Linux boot tests.
2009-04-22 07:55:52 +02:00
forward_snoops=true
update stats for preceeding changes
2012-11-02 17:50:06 +01:00
hit_latency=2
tests: update stats for name changes
2011-04-20 03:45:23 +02:00
is_top_level=true
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
max_miss_count=0
mshrs=4
prefetch_on_access=false
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
prefetcher=Null
update stats for preceeding changes
2012-11-02 17:50:06 +01:00
response_latency=2
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
sequential_access=false
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
size=32768
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
system=system
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
tags=system.cpu0.icache.tags
update stats for preceeding changes
2012-11-02 17:50:06 +01:00
tgts_per_mshr=20
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
two_queue=false
write_buffers=8
cpu_side=system.cpu0.icache_port
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
mem_side=system.toL2Bus.slave[0]
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
[system.cpu0.icache.tags]
type=LRU
assoc=1
block_size=64
clk_domain=system.cpu_clk_domain
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
hit_latency=2
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
sequential_access=false
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
size=32768
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
[system.cpu0.interrupts]
type=SparcInterrupts
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
[system.cpu0.isa]
type=SparcISA
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
[system.cpu0.itb]
type=SparcTLB
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
size=64
[system.cpu0.tracer]
type=ExeTracer
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
[system.cpu0.workload]
type=LiveProcess
cmd=test_atomic 4
cwd=
egid=100
env=
errout=cerr
euid=100
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
stats: updates due to recent ruby and x86 changes Also updates many out of date config files.
2014-09-01 23:55:52 +02:00
executable=/scratch/nilay/GEM5/gem5/tests/test-progs/m5threads/bin/sparc/linux/test_atomic
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
gid=100
input=cin
max_stack_size=67108864
output=cout
pid=100
ppid=99
simpoint=0
system=system
uid=100
stats: updates due to changes to x86, stale configs.
2014-10-11 23:18:51 +02:00
useArchPT=false
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
[system.cpu1]
type=AtomicSimpleCPU
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
children=dcache dtb icache interrupts isa itb tracer
stats: updates due to recent ruby and x86 changes Also updates many out of date config files.
2014-09-01 23:55:52 +02:00
branchPred=Null
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
checker=Null
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.cpu_clk_domain
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
cpu_id=1
do_checkpoint_insts=true
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
do_quiesce=true
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
do_statistics_insts=true
dtb=system.cpu1.dtb
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
fastmem=false
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
function_trace=false
function_trace_start=0
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
interrupts=system.cpu1.interrupts
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
isa=system.cpu1.isa
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
itb=system.cpu1.itb
max_insts_all_threads=0
max_insts_any_thread=0
max_loads_all_threads=0
max_loads_any_thread=0
numThreads=1
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
profile=0
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
progress_interval=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
simpoint_start_insts=
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
simulate_data_stalls=false
simulate_inst_stalls=false
stats: updates due to recent ruby and x86 changes Also updates many out of date config files.
2014-09-01 23:55:52 +02:00
socket_id=0
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
switched_out=false
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
system=system
tracer=system.cpu1.tracer
width=1
workload=system.cpu0.workload
dcache_port=system.cpu1.dcache.cpu_side
icache_port=system.cpu1.icache.cpu_side
[system.cpu1.dcache]
type=BaseCache
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
children=tags
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
addr_ranges=0:18446744073709551615
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
assoc=4
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.cpu_clk_domain
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
Update stats for new single bad-address responder. Mostly just config.ini updates, though the different response latency for bad addresses caused very minor timing changes in the O3 Linux boot tests.
2009-04-22 07:55:52 +02:00
forward_snoops=true
update stats for preceeding changes
2012-11-02 17:50:06 +01:00
hit_latency=2
tests: update stats for name changes
2011-04-20 03:45:23 +02:00
is_top_level=true
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
max_miss_count=0
mshrs=4
prefetch_on_access=false
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
prefetcher=Null
update stats for preceeding changes
2012-11-02 17:50:06 +01:00
response_latency=2
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
sequential_access=false
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
size=32768
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
system=system
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
tags=system.cpu1.dcache.tags
update stats for preceeding changes
2012-11-02 17:50:06 +01:00
tgts_per_mshr=20
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
two_queue=false
write_buffers=8
cpu_side=system.cpu1.dcache_port
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
mem_side=system.toL2Bus.slave[3]
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
[system.cpu1.dcache.tags]
type=LRU
assoc=4
block_size=64
clk_domain=system.cpu_clk_domain
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
hit_latency=2
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
sequential_access=false
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
size=32768
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
[system.cpu1.dtb]
type=SparcTLB
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
size=64
[system.cpu1.icache]
type=BaseCache
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
children=tags
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
addr_ranges=0:18446744073709551615
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
assoc=1
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.cpu_clk_domain
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
Update stats for new single bad-address responder. Mostly just config.ini updates, though the different response latency for bad addresses caused very minor timing changes in the O3 Linux boot tests.
2009-04-22 07:55:52 +02:00
forward_snoops=true
update stats for preceeding changes
2012-11-02 17:50:06 +01:00
hit_latency=2
tests: update stats for name changes
2011-04-20 03:45:23 +02:00
is_top_level=true
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
max_miss_count=0
mshrs=4
prefetch_on_access=false
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
prefetcher=Null
update stats for preceeding changes
2012-11-02 17:50:06 +01:00
response_latency=2
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
sequential_access=false
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
size=32768
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
system=system
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
tags=system.cpu1.icache.tags
update stats for preceeding changes
2012-11-02 17:50:06 +01:00
tgts_per_mshr=20
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
two_queue=false
write_buffers=8
cpu_side=system.cpu1.icache_port
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
mem_side=system.toL2Bus.slave[2]
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
[system.cpu1.icache.tags]
type=LRU
assoc=1
block_size=64
clk_domain=system.cpu_clk_domain
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
hit_latency=2
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
sequential_access=false
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
size=32768
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
[system.cpu1.interrupts]
type=SparcInterrupts
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
[system.cpu1.isa]
type=SparcISA
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
[system.cpu1.itb]
type=SparcTLB
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
size=64
[system.cpu1.tracer]
type=ExeTracer
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
[system.cpu2]
type=AtomicSimpleCPU
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
children=dcache dtb icache interrupts isa itb tracer
stats: updates due to recent ruby and x86 changes Also updates many out of date config files.
2014-09-01 23:55:52 +02:00
branchPred=Null
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
checker=Null
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.cpu_clk_domain
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
cpu_id=2
do_checkpoint_insts=true
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
do_quiesce=true
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
do_statistics_insts=true
dtb=system.cpu2.dtb
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
fastmem=false
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
function_trace=false
function_trace_start=0
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
interrupts=system.cpu2.interrupts
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
isa=system.cpu2.isa
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
itb=system.cpu2.itb
max_insts_all_threads=0
max_insts_any_thread=0
max_loads_all_threads=0
max_loads_any_thread=0
numThreads=1
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
profile=0
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
progress_interval=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
simpoint_start_insts=
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
simulate_data_stalls=false
simulate_inst_stalls=false
stats: updates due to recent ruby and x86 changes Also updates many out of date config files.
2014-09-01 23:55:52 +02:00
socket_id=0
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
switched_out=false
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
system=system
tracer=system.cpu2.tracer
width=1
workload=system.cpu0.workload
dcache_port=system.cpu2.dcache.cpu_side
icache_port=system.cpu2.icache.cpu_side
[system.cpu2.dcache]
type=BaseCache
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
children=tags
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
addr_ranges=0:18446744073709551615
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
assoc=4
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.cpu_clk_domain
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
Update stats for new single bad-address responder. Mostly just config.ini updates, though the different response latency for bad addresses caused very minor timing changes in the O3 Linux boot tests.
2009-04-22 07:55:52 +02:00
forward_snoops=true
update stats for preceeding changes
2012-11-02 17:50:06 +01:00
hit_latency=2
tests: update stats for name changes
2011-04-20 03:45:23 +02:00
is_top_level=true
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
max_miss_count=0
mshrs=4
prefetch_on_access=false
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
prefetcher=Null
update stats for preceeding changes
2012-11-02 17:50:06 +01:00
response_latency=2
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
sequential_access=false
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
size=32768
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
system=system
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
tags=system.cpu2.dcache.tags
update stats for preceeding changes
2012-11-02 17:50:06 +01:00
tgts_per_mshr=20
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
two_queue=false
write_buffers=8
cpu_side=system.cpu2.dcache_port
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
mem_side=system.toL2Bus.slave[5]
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
[system.cpu2.dcache.tags]
type=LRU
assoc=4
block_size=64
clk_domain=system.cpu_clk_domain
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
hit_latency=2
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
sequential_access=false
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
size=32768
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
[system.cpu2.dtb]
type=SparcTLB
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
size=64
[system.cpu2.icache]
type=BaseCache
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
children=tags
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
addr_ranges=0:18446744073709551615
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
assoc=1
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.cpu_clk_domain
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
Update stats for new single bad-address responder. Mostly just config.ini updates, though the different response latency for bad addresses caused very minor timing changes in the O3 Linux boot tests.
2009-04-22 07:55:52 +02:00
forward_snoops=true
update stats for preceeding changes
2012-11-02 17:50:06 +01:00
hit_latency=2
tests: update stats for name changes
2011-04-20 03:45:23 +02:00
is_top_level=true
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
max_miss_count=0
mshrs=4
prefetch_on_access=false
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
prefetcher=Null
update stats for preceeding changes
2012-11-02 17:50:06 +01:00
response_latency=2
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
sequential_access=false
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
size=32768
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
system=system
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
tags=system.cpu2.icache.tags
update stats for preceeding changes
2012-11-02 17:50:06 +01:00
tgts_per_mshr=20
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
two_queue=false
write_buffers=8
cpu_side=system.cpu2.icache_port
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
mem_side=system.toL2Bus.slave[4]
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
[system.cpu2.icache.tags]
type=LRU
assoc=1
block_size=64
clk_domain=system.cpu_clk_domain
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
hit_latency=2
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
sequential_access=false
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
size=32768
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
[system.cpu2.interrupts]
type=SparcInterrupts
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
[system.cpu2.isa]
type=SparcISA
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
[system.cpu2.itb]
type=SparcTLB
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
size=64
[system.cpu2.tracer]
type=ExeTracer
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
[system.cpu3]
type=AtomicSimpleCPU
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
children=dcache dtb icache interrupts isa itb tracer
stats: updates due to recent ruby and x86 changes Also updates many out of date config files.
2014-09-01 23:55:52 +02:00
branchPred=Null
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
checker=Null
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.cpu_clk_domain
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
cpu_id=3
do_checkpoint_insts=true
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
do_quiesce=true
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
do_statistics_insts=true
dtb=system.cpu3.dtb
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
fastmem=false
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
function_trace=false
function_trace_start=0
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
interrupts=system.cpu3.interrupts
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
isa=system.cpu3.isa
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
itb=system.cpu3.itb
max_insts_all_threads=0
max_insts_any_thread=0
max_loads_all_threads=0
max_loads_any_thread=0
numThreads=1
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
profile=0
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
progress_interval=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
simpoint_start_insts=
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
simulate_data_stalls=false
simulate_inst_stalls=false
stats: updates due to recent ruby and x86 changes Also updates many out of date config files.
2014-09-01 23:55:52 +02:00
socket_id=0
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
switched_out=false
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
system=system
tracer=system.cpu3.tracer
width=1
workload=system.cpu0.workload
dcache_port=system.cpu3.dcache.cpu_side
icache_port=system.cpu3.icache.cpu_side
[system.cpu3.dcache]
type=BaseCache
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
children=tags
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
addr_ranges=0:18446744073709551615
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
assoc=4
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.cpu_clk_domain
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
Update stats for new single bad-address responder. Mostly just config.ini updates, though the different response latency for bad addresses caused very minor timing changes in the O3 Linux boot tests.
2009-04-22 07:55:52 +02:00
forward_snoops=true
update stats for preceeding changes
2012-11-02 17:50:06 +01:00
hit_latency=2
tests: update stats for name changes
2011-04-20 03:45:23 +02:00
is_top_level=true
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
max_miss_count=0
mshrs=4
prefetch_on_access=false
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
prefetcher=Null
update stats for preceeding changes
2012-11-02 17:50:06 +01:00
response_latency=2
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
sequential_access=false
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
size=32768
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
system=system
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
tags=system.cpu3.dcache.tags
update stats for preceeding changes
2012-11-02 17:50:06 +01:00
tgts_per_mshr=20
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
two_queue=false
write_buffers=8
cpu_side=system.cpu3.dcache_port
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
mem_side=system.toL2Bus.slave[7]
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
[system.cpu3.dcache.tags]
type=LRU
assoc=4
block_size=64
clk_domain=system.cpu_clk_domain
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
hit_latency=2
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
sequential_access=false
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
size=32768
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
[system.cpu3.dtb]
type=SparcTLB
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
size=64
[system.cpu3.icache]
type=BaseCache
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
children=tags
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
addr_ranges=0:18446744073709551615
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
assoc=1
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.cpu_clk_domain
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
Update stats for new single bad-address responder. Mostly just config.ini updates, though the different response latency for bad addresses caused very minor timing changes in the O3 Linux boot tests.
2009-04-22 07:55:52 +02:00
forward_snoops=true
update stats for preceeding changes
2012-11-02 17:50:06 +01:00
hit_latency=2
tests: update stats for name changes
2011-04-20 03:45:23 +02:00
is_top_level=true
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
max_miss_count=0
mshrs=4
prefetch_on_access=false
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
prefetcher=Null
update stats for preceeding changes
2012-11-02 17:50:06 +01:00
response_latency=2
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
sequential_access=false
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
size=32768
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
system=system
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
tags=system.cpu3.icache.tags
update stats for preceeding changes
2012-11-02 17:50:06 +01:00
tgts_per_mshr=20
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
two_queue=false
write_buffers=8
cpu_side=system.cpu3.icache_port
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
mem_side=system.toL2Bus.slave[6]
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
[system.cpu3.icache.tags]
type=LRU
assoc=1
block_size=64
clk_domain=system.cpu_clk_domain
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
hit_latency=2
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
sequential_access=false
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
size=32768
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
[system.cpu3.interrupts]
type=SparcInterrupts
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
[system.cpu3.isa]
type=SparcISA
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
[system.cpu3.itb]
type=SparcTLB
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
size=64
[system.cpu3.tracer]
type=ExeTracer
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
[system.cpu_clk_domain]
type=SrcClockDomain
clock=500
stats: updates due to recent ruby and x86 changes Also updates many out of date config files.
2014-09-01 23:55:52 +02:00
domain_id=-1
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
stats: updates due to recent ruby and x86 changes Also updates many out of date config files.
2014-09-01 23:55:52 +02:00
init_perf_level=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
voltage_domain=system.voltage_domain
stats: updates due to recent ruby and x86 changes Also updates many out of date config files.
2014-09-01 23:55:52 +02:00
[system.dvfs_handler]
type=DVFSHandler
domains=
enable=false
eventq_index=0
sys_clk_domain=system.clk_domain
transition_latency=100000000
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
[system.l2c]
type=BaseCache
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
children=tags
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
addr_ranges=0:18446744073709551615
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
assoc=8
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.cpu_clk_domain
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
Update stats for new single bad-address responder. Mostly just config.ini updates, though the different response latency for bad addresses caused very minor timing changes in the O3 Linux boot tests.
2009-04-22 07:55:52 +02:00
forward_snoops=true
update stats for preceeding changes
2012-11-02 17:50:06 +01:00
hit_latency=20
tests: update stats for name changes
2011-04-20 03:45:23 +02:00
is_top_level=false
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
max_miss_count=0
update stats for preceeding changes
2012-11-02 17:50:06 +01:00
mshrs=20
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
prefetch_on_access=false
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
prefetcher=Null
update stats for preceeding changes
2012-11-02 17:50:06 +01:00
response_latency=20
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
sequential_access=false
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
size=4194304
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
system=system
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
tags=system.l2c.tags
update stats for preceeding changes
2012-11-02 17:50:06 +01:00
tgts_per_mshr=12
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
two_queue=false
write_buffers=8
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
cpu_side=system.toL2Bus.master[0]
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
mem_side=system.membus.slave[1]
[system.l2c.tags]
type=LRU
assoc=8
block_size=64
clk_domain=system.cpu_clk_domain
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
hit_latency=20
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
sequential_access=false
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
size=4194304
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
[system.membus]
stats: updates due to changes to x86, stale configs.
2014-10-11 23:18:51 +02:00
type=CoherentXBar
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.clk_domain
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
header_cycles=1
stats: updates due to changes to x86, stale configs.
2014-10-11 23:18:51 +02:00
snoop_filter=Null
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
system=system
tests: update reference config.ini files for previous cset Rename 'responder_set' to 'use_default_range'.
2010-08-17 14:06:22 +02:00
use_default_range=false
stats: Update stats for syscall emulation Linux kernel changes.
2012-08-15 16:38:05 +02:00
width=8
master=system.physmem.port
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
slave=system.system_port system.l2c.mem_side
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
[system.physmem]
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
type=SimpleMemory
Regression Tests: Update statistics
2012-10-02 21:35:46 +02:00
bandwidth=73.000000
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.clk_domain
conf_table_reported=true
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
in_addr_map=true
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
latency=30000
latency_var=0
null=false
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
range=0:134217727
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
port=system.membus.master[0]
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
[system.toL2Bus]
stats: updates due to changes to x86, stale configs.
2014-10-11 23:18:51 +02:00
type=CoherentXBar
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.cpu_clk_domain
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
header_cycles=1
stats: updates due to changes to x86, stale configs.
2014-10-11 23:18:51 +02:00
snoop_filter=Null
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
system=system
tests: update reference config.ini files for previous cset Rename 'responder_set' to 'use_default_range'.
2010-08-17 14:06:22 +02:00
use_default_range=false
stats: Update stats for syscall emulation Linux kernel changes.
2012-08-15 16:38:05 +02:00
width=8
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
master=system.l2c.cpu_side
slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu2.icache.mem_side system.cpu2.dcache.mem_side system.cpu3.icache.mem_side system.cpu3.dcache.mem_side
Set up m5threads tests on classic (non-ruby) memory system. Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs.
2009-04-21 17:37:50 +02:00
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
[system.voltage_domain]
type=VoltageDomain
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
eventq_index=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
voltage=1.000000
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