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gem5/src/arch/x86
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Andreas Hansson 5c7ebee434 x86: Move APIC clock divider to Python 
This patch moves the 16x APIC clock divider to the Python code to
avoid the post-instantiation modifications to the clock. The x86 APIC
was the only object setting the clock after creation time and this
required some custom functionality and configuration. With this patch,
the clock multiplier is moved to the Python code and the objects are
instantiated with the appropriate clock.
2013-02-19 05:56:06 -05:00
..
bios sim: Include object header files in SWIG interfaces 2012-11-02 11:32:01 -05:00
insts ISA: Put parser generated files in a "generated" directory. 2012-04-23 12:00:41 -07:00
isa x86: implements fsin, fcos instructions 2013-01-15 07:43:21 -06:00
linux sysemul: bump all linux versions of for syscal emulation to 3.0. 2012-08-15 10:38:04 -04:00
regs x86: implement fabs, fchs instructions 2013-01-15 07:43:19 -06:00
cpuid.cc x86 cpuid: enable clflush 2013-01-15 07:43:21 -06:00
cpuid.hh X86: Sometimes CPUID depends on ecx, so pass that in. 2010-05-02 00:40:17 -07:00
decoder.cc Decoder: Remove the thread context get/set from the decoder. 2013-01-04 19:00:45 -06:00
decoder.hh x86, cpu: corrects 270c9a75e91f, take over decoder on cpu switch 2013-01-22 00:10:10 -06:00
decoder_tables.cc CPU: Merge the predecoder and decoder. 2012-05-26 13:44:46 -07:00
emulenv.cc CPU: Merge the predecoder and decoder. 2012-05-26 13:44:46 -07:00
emulenv.hh gcc: Clean-up of non-C++0x compliant code, first steps 2012-03-19 06:36:09 -04:00
faults.cc ISA: Put parser generated files in a "generated" directory. 2012-04-23 12:00:41 -07:00
faults.hh gcc: Clean-up of non-C++0x compliant code, first steps 2012-03-19 06:36:09 -04:00
interrupts.cc x86: Move APIC clock divider to Python 2013-02-19 05:56:06 -05:00
interrupts.hh x86: Move APIC clock divider to Python 2013-02-19 05:56:06 -05:00
intmessage.hh MEM: Remove the Broadcast destination from the packet 2012-04-14 05:45:55 -04:00
isa.cc x86: Changes to decoder, corrects 9376 2013-01-12 22:09:48 -06:00
isa.hh x86: Changes to decoder, corrects 9376 2013-01-12 22:09:48 -06:00
isa_traits.hh ISA: generic Linux thread info support 2012-11-02 11:32:00 -05:00
kernel_stats.hh copyright: Change HP copyright on x86 code to be more friendly 2010-05-23 22:44:15 -07:00
locked_mem.hh o3: Fix issue with LLSC ordering and speculation 2013-01-07 13:05:33 -05:00
memhelpers.hh ExecContext: Rename the readBytes/writeBytes functions to readMem and writeMem. 2011-07-02 22:35:04 -07:00
microcode_rom.hh includes: sort all includes 2011-04-15 10:44:06 -07:00
mmapped_ipr.hh Clock: Add a Cycles wrapper class and use where applicable 2012-08-28 14:30:33 -04:00
nativetrace.cc gcc: Clean-up of non-C++0x compliant code, first steps 2012-03-19 06:36:09 -04:00
nativetrace.hh Make commenting on close namespace brackets consistent. 2011-01-03 14:35:43 -08:00
pagetable.cc x86: logSize and lruSeq are now optional ckpt params 2012-07-10 22:51:54 -07:00
pagetable.hh x86: added page size in bytes tlb entry function 2012-07-11 12:21:04 -07:00
pagetable_walker.cc mem: Add predecessor to SenderState base class 2013-02-19 05:56:05 -05:00
pagetable_walker.hh mem: Add predecessor to SenderState base class 2013-02-19 05:56:05 -05:00
process.cc X86: Move the GDT down to where it can be accessed in 32 bit mode. 2012-05-27 19:01:08 -07:00
process.hh includes: sort all includes 2011-04-15 10:44:06 -07:00
registers.hh O3: Clean up the O3 structures and try to pack them a bit better. 2012-06-05 01:23:09 -04:00
remote_gdb.cc X86: Get rid of more uses of FULL_SYSTEM. 2011-10-30 00:33:02 -07:00
remote_gdb.hh copyright: Change HP copyright on x86 code to be more friendly 2010-05-23 22:44:15 -07:00
SConscript arch: Make the ISA class inherit from SimObject 2013-01-07 13:05:35 -05:00
SConsopts copyright: This file need not have had the more restrictive copyright. 2009-02-09 20:10:15 -08:00
stacktrace.cc MEM: Make port proxies use references rather than pointers 2012-02-24 11:45:30 -05:00
stacktrace.hh trace: reimplement the DTRACE function so it doesn't use a vector 2011-04-15 10:44:32 -07:00
system.cc Checkpoint: Make system serialize call children 2012-10-15 08:12:29 -04:00
system.hh Checkpoint: Make system serialize call children 2012-10-15 08:12:29 -04:00
tlb.cc arch: Add support for invalidating TLBs when draining 2013-01-07 13:05:40 -05:00
tlb.hh arch: Add support for invalidating TLBs when draining 2013-01-07 13:05:40 -05:00
types.cc X86: Change the copyright holder to AMD. 2010-08-27 15:35:36 -07:00
types.hh CPU: Merge the predecoder and decoder. 2012-05-26 13:44:46 -07:00
utility.cc x86: Move APIC clock divider to Python 2013-02-19 05:56:06 -05:00
utility.hh gcc: Clean-up of non-C++0x compliant code, first steps 2012-03-19 06:36:09 -04:00
vtophys.cc X86: Use the AddrTrie class to implement the TLB. 2012-04-14 23:24:18 -07:00
vtophys.hh gcc: Clean-up of non-C++0x compliant code, first steps 2012-03-19 06:36:09 -04:00
x86_traits.hh x86: Add a separate register for D flag bit 2012-09-11 09:25:43 -05:00
X86ISA.py arch: Make the ISA class inherit from SimObject 2013-01-07 13:05:35 -05:00
X86LocalApic.py sim: Include object header files in SWIG interfaces 2012-11-02 11:32:01 -05:00
X86NativeTrace.py sim: Include object header files in SWIG interfaces 2012-11-02 11:32:01 -05:00
X86System.py sim: Include object header files in SWIG interfaces 2012-11-02 11:32:01 -05:00
X86TLB.py sim: Include object header files in SWIG interfaces 2012-11-02 11:32:01 -05:00