gem5/src
Andreas Hansson 362160c8ae mem: Add deferred packet class to prefetcher
This patch removes the time field from the packet as it was only used
by the preftecher. Similar to the packet queue, the prefetcher now
wraps the packet in a deferred packet, which also has a tick
representing the absolute time when the packet should be sent.
2013-02-19 05:56:06 -05:00
..
arch x86: Move APIC clock divider to Python 2013-02-19 05:56:06 -05:00
base base: Fix a bug in the address interleaving 2013-02-19 05:56:05 -05:00
cpu x86: Move APIC clock divider to Python 2013-02-19 05:56:06 -05:00
dev sim: Make clock private and access using clockPeriod() 2013-02-19 05:56:06 -05:00
doc MEM: Put memory system document into doxygen 2012-09-25 11:49:41 -05:00
doxygen MEM: Put memory system document into doxygen 2012-09-25 11:49:41 -05:00
kern base: Encapsulate the underlying fields in AddrRange 2013-01-07 13:05:38 -05:00
mem mem: Add deferred packet class to prefetcher 2013-02-19 05:56:06 -05:00
proto scons: Address clang 3.2 compilation error 2013-01-14 10:23:56 -05:00
python x86: Move APIC clock divider to Python 2013-02-19 05:56:06 -05:00
sim sim: Make clock private and access using clockPeriod() 2013-02-19 05:56:06 -05:00
unittest AddrRange: Transition from Range<T> to AddrRange 2012-09-19 06:15:44 -04:00
Doxyfile Doxygen: Update the version of the Doxyfile 2012-10-11 06:38:42 -04:00
SConscript scons: Remove stale compiler options 2013-01-07 13:05:39 -05:00