ISA: generic Linux thread info support
This patch takes the Linux thread info support scattered across different ISA implementations (currently in ARM, ALPHA, and MIPS), and unifies them into a single file. Adds a few more helper functions to read out TGID, mm, etc. ISA-specific information (e.g., ALPHA PCBB register) is now moved to the corresponding isa_traits.hh files.
This commit is contained in:
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d0678d1c31
commit
ac161c1d72
11 changed files with 63 additions and 162 deletions
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@ -34,6 +34,7 @@
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namespace LittleEndianGuest {}
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#include "arch/alpha/ipr.hh"
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#include "arch/alpha/types.hh"
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#include "base/types.hh"
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#include "cpu/static_inst_fwd.hh"
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@ -129,6 +130,9 @@ const ExtMachInst NoopMachInst = 0x2ffe0000;
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// Memory accesses cannot be unaligned
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const bool HasUnalignedMemAcc = false;
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const bool CurThreadInfoImplemented = true;
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const int CurThreadInfoReg = AlphaISA::IPR_PALtemp23;
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} // namespace AlphaISA
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#endif // __ARCH_ALPHA_ISA_TRAITS_HH__
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@ -33,7 +33,7 @@
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#include <stack>
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#include <string>
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#include "arch/alpha/linux/threadinfo.hh"
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#include "arch/generic/linux/threadinfo.hh"
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#include "arch/alpha/kernel_stats.hh"
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#include "arch/alpha/osfpal.hh"
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#include "base/trace.hh"
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@ -41,9 +41,9 @@
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*/
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#include "arch/alpha/linux/system.hh"
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#include "arch/alpha/linux/threadinfo.hh"
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#include "arch/alpha/idle_event.hh"
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#include "arch/alpha/system.hh"
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#include "arch/generic/linux/threadinfo.hh"
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#include "arch/vtophys.hh"
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#include "base/loader/symtab.hh"
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#include "cpu/base.hh"
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@ -114,6 +114,9 @@ namespace ArmISA
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// Memory accesses cannot be unaligned
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const bool HasUnalignedMemAcc = true;
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const bool CurThreadInfoImplemented = false;
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const int CurThreadInfoReg = -1;
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enum InterruptTypes
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{
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INT_RST,
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@ -27,10 +27,11 @@
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*
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* Authors: Ali Saidi
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* Nathan Binkert
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* Dam Sunwoo
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*/
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#ifndef __ARCH_ALPHA_LINUX_LINUX_TREADNIFO_HH__
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#define __ARCH_ALPHA_LINUX_LINUX_TREADNIFO_HH__
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#ifndef __ARCH_GENERIC_LINUX_THREADINFO_HH__
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#define __ARCH_GENERIC_LINUX_THREADINFO_HH__
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#include "cpu/thread_context.hh"
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#include "sim/system.hh"
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@ -50,12 +51,16 @@ class ThreadInfo
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get_data(const char *symbol, T &data)
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{
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Addr addr = 0;
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if (!sys->kernelSymtab->findAddress(symbol, addr))
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if (!sys->kernelSymtab->findAddress(symbol, addr)) {
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warn_once("Unable to find kernel symbol %s\n", symbol);
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warn_once("Kernel not compiled with task_struct info; can't get "
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"currently executing task/process/thread name/ids!\n");
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return false;
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}
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CopyOut(tc, &data, addr, sizeof(T));
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data = AlphaISA::gtoh(data);
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data = TheISA::gtoh(data);
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return true;
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}
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@ -72,11 +77,14 @@ class ThreadInfo
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inline Addr
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curThreadInfo()
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{
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if (!TheISA::CurThreadInfoImplemented)
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panic("curThreadInfo() not implemented for this ISA");
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Addr addr = pcbb;
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Addr sp;
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if (!addr)
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addr = tc->readMiscRegNoEffect(AlphaISA::IPR_PALtemp23);
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addr = tc->readMiscRegNoEffect(TheISA::CurThreadInfoReg);
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PortProxy &p = tc->getPhysProxy();
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p.readBlob(addr, (uint8_t *)&sp, sizeof(Addr));
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@ -113,6 +121,19 @@ class ThreadInfo
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return pid;
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}
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int32_t
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curTaskTGID(Addr thread_info = 0)
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{
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int32_t offset;
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if (!get_data("task_struct_tgid", offset))
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return -1;
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int32_t tgid;
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CopyOut(tc, &tgid, curTaskInfo(thread_info) + offset, sizeof(tgid));
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return tgid;
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}
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int64_t
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curTaskStart(Addr thread_info = 0)
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{
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@ -145,8 +166,21 @@ class ThreadInfo
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return buffer;
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}
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int32_t
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curTaskMm(Addr thread_info = 0)
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{
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int32_t offset;
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if (!get_data("task_struct_mm", offset))
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return -1;
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int32_t mm_ptr;
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CopyOut(tc, &mm_ptr, curTaskInfo(thread_info) + offset, sizeof(mm_ptr));
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return mm_ptr;
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}
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};
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} // namespace Linux
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#endif // __ARCH_ALPHA_LINUX_LINUX_THREADINFO_HH__
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#endif // __ARCH_GENERIC_LINUX_THREADINFO_HH__
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@ -160,6 +160,9 @@ const uint32_t ITOUCH_ANNOTE = 0xffffffff;
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const bool HasUnalignedMemAcc = true;
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const bool CurThreadInfoImplemented = false;
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const int CurThreadInfoReg = -1;
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} // namespace MipsISA
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#endif // __ARCH_MIPS_ISA_TRAITS_HH__
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@ -39,8 +39,8 @@
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* up boot time.
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*/
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#include "arch/generic/linux/threadinfo.hh"
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#include "arch/mips/linux/system.hh"
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#include "arch/mips/linux/threadinfo.hh"
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#include "arch/mips/idle_event.hh"
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#include "arch/mips/system.hh"
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#include "arch/vtophys.hh"
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@ -1,153 +0,0 @@
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/*
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* Copyright (c) 2004 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Ali Saidi
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* Nathan Binkert
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*/
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#ifndef __ARCH_MIPS_LINUX_LINUX_TREADNIFO_HH__
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#define __ARCH_MIPS_LINUX_LINUX_TREADNIFO_HH__
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#include "cpu/thread_context.hh"
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#include "sim/system.hh"
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#include "sim/vptr.hh"
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namespace Linux {
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class ThreadInfo
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{
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private:
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ThreadContext *tc;
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System *sys;
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Addr pcbb;
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template <typename T>
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bool
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get_data(const char *symbol, T &data)
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{
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Addr addr = 0;
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if (!sys->kernelSymtab->findAddress(symbol, addr))
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return false;
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CopyOut(tc, &data, addr, sizeof(T));
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data = MipsISA::gtoh(data);
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return true;
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}
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public:
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ThreadInfo(ThreadContext *_tc, Addr _pcbb = 0)
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: tc(_tc), sys(tc->getSystemPtr()), pcbb(_pcbb)
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{
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}
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~ThreadInfo()
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{}
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inline Addr
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curThreadInfo()
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{
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panic("curThreadInfo not implemented for MIPS");
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Addr addr = pcbb;
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Addr sp;
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if (!addr)
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addr = tc->readMiscRegNoEffect(0/*MipsISA::IPR_PALtemp23*/);
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PortProxy &p = tc->getPhysProxy();
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p.readBlob(addr, (uint8_t *)&sp, sizeof(Addr));
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return sp & ~ULL(0x3fff);
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}
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inline Addr
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curTaskInfo(Addr thread_info = 0)
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{
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int32_t offset;
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if (!get_data("thread_info_task", offset))
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return 0;
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if (!thread_info)
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thread_info = curThreadInfo();
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Addr addr;
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CopyOut(tc, &addr, thread_info + offset, sizeof(addr));
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return addr;
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}
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int32_t
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curTaskPID(Addr thread_info = 0)
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{
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Addr offset;
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if (!get_data("task_struct_pid", offset))
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return -1;
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int32_t pid;
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CopyOut(tc, &pid, curTaskInfo(thread_info) + offset, sizeof(pid));
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return pid;
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}
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int64_t
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curTaskStart(Addr thread_info = 0)
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{
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Addr offset;
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if (!get_data("task_struct_start_time", offset))
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return -1;
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int64_t data;
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// start_time is actually of type timespec, but if we just
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// grab the first long, we'll get the seconds out of it
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CopyOut(tc, &data, curTaskInfo(thread_info) + offset, sizeof(data));
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return data;
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}
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std::string
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curTaskName(Addr thread_info = 0)
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{
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int32_t offset;
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int32_t size;
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if (!get_data("task_struct_comm", offset))
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return "FailureIn_curTaskName";
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if (!get_data("task_struct_comm_size", size))
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return "FailureIn_curTaskName";
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char buffer[size + 1];
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CopyStringOut(tc, buffer, curTaskInfo(thread_info) + offset, size);
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return buffer;
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}
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};
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} // namespace Linux
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#endif // __ARCH_MIPS_LINUX_LINUX_THREADINFO_HH__
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@ -72,6 +72,9 @@ const ExtMachInst NoopMachInst = 0x60000000;
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// Memory accesses can be unaligned
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const bool HasUnalignedMemAcc = true;
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const bool CurThreadInfoImplemented = false;
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const int CurThreadInfoReg = -1;
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} // namespace PowerISA
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#endif // __ARCH_POWER_ISA_TRAITS_HH__
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// Memory accesses cannot be unaligned
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const bool HasUnalignedMemAcc = false;
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const bool CurThreadInfoImplemented = false;
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const int CurThreadInfoReg = -1;
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}
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#endif // __ARCH_SPARC_ISA_TRAITS_HH__
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@ -71,6 +71,9 @@ namespace X86ISA
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// Memory accesses can be unaligned
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const bool HasUnalignedMemAcc = true;
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const bool CurThreadInfoImplemented = false;
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const int CurThreadInfoReg = -1;
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const ExtMachInst NoopMachInst = {
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0x0, // No legacy prefixes.
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0x0, // No rex prefix.
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