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1266 commits

Author SHA1 Message Date
Lisa Hsu
5d029ff11e sycalls: implement mremap() and add DATA flag for getrlimit(). mremap has been tested on Alpha, compiles for the rest but not tested. I don't see why it wouldn't work though. 2009-02-16 17:47:39 -05:00
Korey Sewell
36d9065f5f syscall: Expose ioctl for MIPS 2009-02-10 15:49:29 -08:00
Nathan Binkert
20c5ec6e1c copyright: This file need not have had the more restrictive copyright. 2009-02-09 20:10:15 -08:00
Nathan Binkert
dd6ea8797f scons: Require SCons version 0.98.1 
This allows me to clean things up so we are up to date with respect to
deprecated features.  There are many features scheduled for permanent failure
in scons 2.0 and 0.98.1 provides the most compatability for that.  It
also paves the way for some nice new features that I will add soon
 2009-02-09 20:10:14 -08:00
Nathan Binkert
e1798d063e Quell g++ 4.3 warning about operator ambiguity 2009-02-06 20:55:50 -08:00
Gabe Black
5a4eed5d34 X86: All x86 fault classes now attempt to do something useful. 2009-02-01 17:09:08 -08:00
Gabe Black
923a14dde7 X86: Make the fault classes handle error codes better. 2009-02-01 17:08:32 -08:00
Gabe Black
2f8cec849d X86: Make the long mode interrupt/exception microcode handle an error code. 2009-02-01 17:07:43 -08:00
Gabe Black
9b4d1e0f9a X86: Distinguish between hardware and software interrupts/exceptions 2009-02-01 17:07:18 -08:00
Gabe Black
041402a949 X86: Fix the upper bound on some ranges that were setting up the micro code assembler. 2009-02-01 17:06:25 -08:00
Gabe Black
6b53b8387e X86: Make the chks microop check for the right int descriptor type. 2009-02-01 17:05:37 -08:00
Gabe Black
c0cd58812e X86: Touch up the interrupt entering microcode. 2009-02-01 17:04:21 -08:00
Gabe Black
03a00735c2 X86: Keep track of the vector for all exceptions/faults. 2009-02-01 17:03:11 -08:00
Gabe Black
6b60a29706 X86: Fix the time keeping of the Local APIC timer. 2009-02-01 00:30:11 -08:00
Gabe Black
ca6e0d75c8 X86: Fix the microcode for the LODS instruction. 2009-02-01 00:28:28 -08:00
Gabe Black
d432bd13b2 X86: Fix some incorrect register widths. 2009-02-01 00:18:13 -08:00
Gabe Black
f3b8371dfc X86: Add extended Intel MP entries correctly. 2009-02-01 00:15:38 -08:00
Gabe Black
06cdbe5ea7 X86: Compute PCI config addresses correctly. 2009-02-01 00:11:49 -08:00
Gabe Black
483c3e96b7 X86: Calculate flags based on the actual result. 2009-02-01 00:08:16 -08:00
Gabe Black
953e4bba59 X86: Set/correct some default values for x86 parameters. 2009-02-01 16:59:34 -08:00
Ali Saidi
e7293dd24e Errors: Use the correct panic/warn/fatal/info message in some places. 2009-01-30 20:04:17 -05:00
Gabe Black
52defeb4e7 X86: Implement the xadd instruction. 2009-01-25 20:33:27 -08:00
Gabe Black
3c5988b86c X86: Implement the bswap instruction. 2009-01-25 20:32:43 -08:00
Gabe Black
0449fb2b7a X86: Fix a bug in the iret microcode. 2009-01-25 20:31:17 -08:00
Gabe Black
389fbfdab1 X86: Make the interrupt object wake up the CPU when something becomes pending. 2009-01-25 20:30:51 -08:00
Gabe Black
d9794784ba CPU: Add a setCPU function to the interrupt objects. 2009-01-25 20:29:03 -08:00
Nathan Binkert
64ed39f61b pseudo inst: Add new wake cpu instruction for sending a message to wake a cpu. 
It's instantaneous and so it's somewhat bogus, but it's a first step.
 2009-01-24 07:27:22 -08:00
Nathan Binkert
c9d3113015 tracing: Add help strings for some of the trace flags 2009-01-19 09:59:14 -08:00
Nathan Binkert
8153790d00 SCons: centralize the Dir() workaround for newer versions of scons. 
Scons bug id: 2006 M5 Bug id: 308
 2009-01-13 14:17:50 -08:00
Gabe Black
b23633ad1b X86: Hook in the M5 pseudo insts. 2009-01-06 23:55:46 -08:00
Gabe Black
115b1a7ed3 X86: Autogenerate macroop generateDisassemble function. 2009-01-06 22:55:27 -08:00
Gabe Black
8cab1805f9 X86: Move the function that prints memory args into the inst base class. 2009-01-06 22:46:28 -08:00
Gabe Black
9e24d8c599 X86: Move the macroop class out of the isa description into C++. 2009-01-06 22:44:59 -08:00
Gabe Black
7b7a72158a X86: Change indentation on microop disassembly. 2009-01-06 22:40:41 -08:00
Steve Reinhardt
1704ba2273 Make Alpha pseudo-insts available from SE mode. 2008-12-17 09:51:18 -08:00
Gabe Black
02cd18f536 SPARC: Truncate syscall args and return values appropriately. 2008-12-16 23:06:37 -08:00
Lisa Hsu
993b7be4bb imported patch aux-fix.patch 2008-12-07 15:07:42 -05:00
Gabe Black
e4790bcbe2 X86: Add add_entry back in. 2008-12-06 14:48:59 -08:00
Nathan Binkert
e141cb7441 flags: Change naming of functions to be clearer 2008-12-06 14:18:18 -08:00
Lisa Hsu
f1430941cf This brings M5 closer to modernity - the kernel being advertised is newer so it won't die on binaries compiled with newer glibc's, and enables use of TLS-toolchain built binaries for ALPHA_SE by putting auxiliary vectors on the stack. There are some comments in the code to help. Finally, stats changes for ALPHA are from slight perturbations to the initial stack frame, all minimal diffs. 2008-12-05 12:09:29 -05:00
Lisa Hsu
e2c7618e50 This patch pulls out the auxiliary vector struct from individual ISA 
LiveProcesses to the base LiveProcess definition so anyone can use them.
 2008-12-04 18:03:35 -05:00
Steve Reinhardt
4514f565e3 syscalls: fix latent brk/obreak bug. 
Bogus calls to ChunkGenerator with negative size were triggering
a new assertion that was added there.
Also did a little renaming and cleanup in the process.
 2008-11-15 09:30:10 -08:00
Nathan Binkert
5711282f87 Fix a bunch of bugs I introduced when I changed the flags stuff for packets. 
I did some of the flags and assertions wrong. Thanks to Brad Beckmann
for pointing this out.  I should have run the opt regressions instead
of the fast. I also screwed up some of the logical functions in the Flags
class.
 2008-11-14 04:55:30 -08:00
Nathan Binkert
eb5d9ba72b pseudo inst: Add rpns (read processor nanoseconds) instruction. 
This instruction basically returns the number of nanoseconds that the CPU
has been running.
 2008-11-10 11:51:18 -08:00
Nathan Binkert
9c49bc7b00 mem: update stuff for changes to Packet and Request 2008-11-10 11:51:17 -08:00
Gabe Black
8c15518f30 X86: Fix completeAcc get call. 2008-11-09 21:55:43 -08:00
Nathan Binkert
44839d6b71 Fix a few more places where the context stuff wasn't changed 2008-11-05 07:20:03 -08:00
Lisa Hsu
dd99ff23c6 get rid of all instances of readTid() and getThreadNum(). Unify and eliminate 
redundancies with threadId() as their replacement.
 2008-11-04 11:35:42 -05:00
Lisa Hsu
d857faf073 Add in Context IDs to the simulator. From now on, cpuId is almost never used, 
the primary identifier for a hardware context should be contextId().  The
concept of threads within a CPU remains, in the form of threadId() because
sometimes you need to know which context within a cpu to manipulate.
 2008-11-02 21:57:07 -05:00
Lisa Hsu
67fda02dda Make it so that all thread contexts are registered with the System, even in 
SE.  Process still keeps track of the tc's it owns, but registration occurs
with the System, this eases the way for system-wide context Ids based on
registration.
 2008-11-02 21:57:06 -05:00
Lisa Hsu
c55a467a06 make BaseCPU the provider of _cpuId, and cpuId() instead of being scattered 
across the subclasses. generally make it so that member data is _cpuId and
accessor functions are cpuId(). The ID val comes from the python (default -1 if
none provided), and if it is -1, the index of cpuList will be given. this has
passed util/regress quick and se.py -n4 and fs.py -n4 as well as standard
switch.
 2008-11-02 21:56:57 -05:00
Nathan Binkert
9836d81c2b style: Use the correct m5 style for things relating to interrupts. 2008-10-21 07:12:53 -07:00
Ali Saidi
b760b99f4d O3CPU: Undo Gabe's changes to remove hwrei and simpalcheck from O3 CPU. Removing hwrei causes 
the instruction after the hwrei to be fetched before the ITB/DTB_CM register is updated in a call pal
call sys and thus the translation fails because the user is attempting to access a super page address.

Minimally, it seems as though some sort of fetch stall or refetch after a hwrei is required. I think
this works currently because the hwrei uses the exec context interface, and the o3 stalls when that occurs.

Additionally, these changes don't update the LOCK register and probably break ll/sc. Both o3 changes were
removed since a great deal of manual patching would be required to only remove the hwrei change.
 2008-10-20 16:22:59 -04:00
Nathan Binkert
81f5da1e89 get rid of local variable that's only used in an assert so fast compiles 2008-10-16 22:22:17 -07:00
Gabe Black
3c4567f2a6 X86: Set the delayed commit flag in x86 microops appropriately. 2008-10-12 23:29:10 -07:00
Gabe Black
33ebd04474 X86: Make the local APIC timer event generate an interrupt. 2008-10-12 23:28:49 -07:00
Gabe Black
bdc28d793d X86: Implement the EOI register in the local APIC. 2008-10-12 23:28:11 -07:00
Gabe Black
fd37688294 X86: Add some DPRINTFs to the local APIC. 2008-10-12 23:27:45 -07:00
Gabe Black
e3004c579f X86: Fix the segment setting code in IRET, and make it restore the flags. 2008-10-12 23:05:22 -07:00
Gabe Black
349a155b6e X86: Panic when an unimplemented fault is invoked, rather than spinning forever 2008-10-12 23:00:28 -07:00
Gabe Black
564eda827b X86: Implement the swapgs instruction. 2008-10-12 23:00:07 -07:00
Gabe Black
a2e0d539d8 X86: Add wrval/rdval microops for reading significant miscregs. 2008-10-12 22:55:55 -07:00
Gabe Black
9e8e2f9ec6 X86: Make the x86 interrupt fault kick off the interrupt microcode. 2008-10-12 22:42:10 -07:00
Gabe Black
4c19c56a77 X86: Implement entering an interrupt in microcode. 2008-10-12 22:42:03 -07:00
Gabe Black
f813a4be49 X86: Make sure register microops set fault rather than returning one. 2008-10-12 22:24:06 -07:00
Gabe Black
961b40cdb5 X86: Implement an wrdh microop which loads bases/offsets from 16 byte descriptors. 2008-10-12 22:16:53 -07:00
Gabe Black
6074b1abf2 X86: Implement local labels for the ROM that actually refer into the ROM. 2008-10-12 20:44:11 -07:00
Gabe Black
6b46e5204d X86: Implement the chks check of interrupt gate target code segments. 2008-10-12 20:38:22 -07:00
Gabe Black
30feb90c1c X86: Add a check type for interrupt gates. 2008-10-12 20:33:37 -07:00
Gabe Black
15f5bb3055 X86: Fix chks checking the submode for stack segments. 2008-10-12 20:29:52 -07:00
Gabe Black
9e1fe2050a X86: Let segment manipulation microops be conditional. 2008-10-12 20:25:06 -07:00
Gabe Black
e9158d763a X86: Let the microassembler know about the microcode only H segment. 2008-10-12 20:17:38 -07:00
Gabe Black
223fc41c07 X86: Fix the rdbase microop 2008-10-12 20:07:46 -07:00
Gabe Black
f245358343 Get rid of old RegContext code. 2008-10-12 17:57:46 -07:00
Gabe Black
cefb768131 X86: Create a handy way to access labels from the ROM in microcode. 2008-10-12 17:52:51 -07:00
Gabe Black
e5f8092467 X86: Make X86's microcode ROM actually do something. 2008-10-12 17:48:44 -07:00
Gabe Black
2736086d7c CPU: Create a microcode ROM object in the CPU which is defined by the ISA. 2008-10-12 15:59:21 -07:00
Gabe Black
6fd4eff68f X86: Create an eret microop which returns from ROM to combinational decoding. 2008-10-12 15:53:04 -07:00
Gabe Black
4aa18aa800 X86: Make Br never report itself as the last microop. 2008-10-12 15:43:35 -07:00
Gabe Black
77c0e1d110 X86: Create a SeqOp class of microops and make Br one of them. 2008-10-12 15:33:17 -07:00
Gabe Black
a76c4b8ca1 X86: Implement CPUID with a magical function instead of microcode. 2008-10-12 15:31:28 -07:00
Gabe Black
d0a43ce2b2 X86: Fix the ordering of special physical address ranges. 2008-10-12 14:01:06 -07:00
Gabe Black
ec9d3aad71 X86: Make the local APIC process interrupts and send them to the CPU. 2008-10-12 13:45:21 -07:00
Gabe Black
876f4845f2 X86: Make the local APIC handle interrupt messages from the IO APIC. 2008-10-12 13:44:24 -07:00
Gabe Black
3420ad7644 X86: Make the bases for x86 fault class public. 2008-10-12 13:29:26 -07:00
Gabe Black
557bde43c3 X86: Make APICs communicate through the memory system. 2008-10-12 13:28:54 -07:00
Gabe Black
e0f137a87c X86: Add a LocalApic trace flag. 2008-10-12 12:07:25 -07:00
Gabe Black
42ebebf99a X86: Make the local APIC accessible through the memory system directly, and make the timer work. 2008-10-12 11:08:00 -07:00
Gabe Black
d9f9c967fb Turn Interrupts objects into SimObjects. Also, move local APIC state into x86's Interrupts object. 2008-10-12 09:09:56 -07:00
Gabe Black
c4f1cc3b48 CPU: Eliminate the get_vec function. 2008-10-12 08:24:09 -07:00
Gabe Black
526933e5d0 X86: Add an Intel MP table to the simulation. 2008-10-11 15:14:37 -07:00
Gabe Black
f621b7b81f CPU: Eliminate the simPalCheck funciton. 2008-10-11 12:17:24 -07:00
Gabe Black
da7209ec93 CPU: Eliminate the hwrei function. 2008-10-11 02:27:21 -07:00
Gabe Black
8c5dfa4532 TLB: Make all tlbs derive from a common base class in both python and C++. 2008-10-10 23:47:42 -07:00
Gabe Black
3d1734ec29 X86: Create SimObjects in python and C++ to represent the ACPI system description tables. 2008-10-10 23:43:33 -07:00
Gabe Black
b03c95d075 X86: Create SimObjects in python and C++ to represent the Intel MP tables. 2008-10-10 23:39:53 -07:00
Nathan Binkert
8ac63c48a4 automerge 2008-10-10 10:38:53 -07:00
Nathan Binkert
5586b1539b misc: remove #include <cassert> from misc.hh since not everyone needs it. 2008-10-10 10:15:00 -07:00
Gabe Black
ec0fb05d64 X86: Turn SMBios structures into simobjects. 2008-10-10 03:50:51 -07:00
Gabe Black
9be6e08227 X86: Add a couple comments to the bios SConscript 2008-10-10 03:50:42 -07:00