gem5/src/arch
Lisa Hsu 67fda02dda Make it so that all thread contexts are registered with the System, even in
SE.  Process still keeps track of the tc's it owns, but registration occurs
with the System, this eases the way for system-wide context Ids based on
registration.
2008-11-02 21:57:06 -05:00
..
alpha Make it so that all thread contexts are registered with the System, even in 2008-11-02 21:57:06 -05:00
mips make BaseCPU the provider of _cpuId, and cpuId() instead of being scattered 2008-11-02 21:56:57 -05:00
sparc Make it so that all thread contexts are registered with the System, even in 2008-11-02 21:57:06 -05:00
x86 Make it so that all thread contexts are registered with the System, even in 2008-11-02 21:57:06 -05:00
isa_parser.py style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs 2008-09-10 14:26:15 -04:00
isa_specific.hh style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs 2008-09-10 14:26:15 -04:00
micro_asm.py Microcode: Fix a silent typo error in the microcode assembler. 2008-10-09 00:07:38 -07:00
micro_asm_test.py Add a second section to make sure the ROM is extended properly. 2007-05-31 22:21:21 +00:00
SConscript CPU: Create a microcode ROM object in the CPU which is defined by the ISA. 2008-10-12 15:59:21 -07:00