Commit graph

782 commits

Author SHA1 Message Date
Tony Gutierrez
1285d639eb stats: update stats to after GPU checkin 2016-01-22 10:42:13 -05:00
Brad Beckmann
97a5e5b25e ruby: changed all references to numCPs to num-cp 2016-01-22 10:42:12 -05:00
Tony Gutierrez
1a7d3f9fcb gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
Steve Reinhardt
fcfe6e798d stats: update SPARC FS stats
The fs/80.solaris-boot/sparc/solaris/t1000-simple-atomic test was
broken for so long that, now that it's working again, the stats
output is out of date.  This changeset updates the outputs, on
the assumption that the stats changes are all valid differences
due to other changes made while it was broken.
2016-01-17 21:13:29 -05:00
Steve Reinhardt
3840a72f37 stats: more updates due to PCI changes
A couple of the long regressions have been showing as CHANGED
since 11244:a2af58a06c4e despite the updates in 11245:1c5102c0a7a9.
The x86 regression looks like it was just missed, but it's not clear
why the ARM one is giving different results (perhaps a non-determinism
between zizzer and wherever the updated results were run?).
2015-12-30 11:18:44 -05:00
Steve Reinhardt
2b49d3b6ca tests: update EIO reference outputs 2015-12-28 15:43:06 -05:00
Anthony Gutierrez
4935f0d5ff stats: bump stats to reflect ruby tester changes 2015-12-12 17:27:38 -05:00
Brad Beckmann
634f34d3f2 regress: updates required for the compute-gpu patches 2015-12-11 16:07:01 -05:00
Andreas Sandberg
bbcbe028fe stats: Update to reflect changes to PCI handling 2015-12-05 00:11:25 +00:00
Andreas Sandberg
5a249e03a4 stats: Update to reflect changes to RealView platform code 2015-12-04 00:19:05 +00:00
Andreas Hansson
00b2bd7437 stats: Bump stats to match current behaviour 2015-12-02 09:58:24 -05:00
Nilay Vaish
de489e1997 stats: updates due to recent chagnesets 2015-11-16 05:08:57 -06:00
Nilay Vaish
e1385784f2 stats: remove wb_penalized and wb_penalized_rate 2015-11-16 04:58:29 -06:00
Andreas Hansson
324bc9771d stats: Update stats to match cache changes 2015-11-06 03:26:50 -05:00
Joel Hestness
735c4a8766 stats: Update for UDelayEvent quiesce change 2015-10-10 16:45:41 -05:00
Andreas Sandberg
17dbb49294 tests: Update SMT tests to correctly configure CPUs
The 01.hello-2T-smt test case for the O3 CPU didn't correctly setup
the number of threads before creating interrupt controllers, which
confused the constructor in BaseCPU. This changeset adds SMT support
to the test configuration infrastructure.

--HG--
rename : tests/configs/o3-timing.py => tests/configs/o3-timing-mt.py
rename : tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini => tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing-mt/config.ini
rename : tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/simerr => tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing-mt/simerr
rename : tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/simout => tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing-mt/simout
rename : tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/stats.txt => tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing-mt/stats.txt
2015-10-05 13:13:23 -05:00
Steve Reinhardt
d1811cc6cf stats: update EIO stats for snoop filter changes 2015-10-02 01:04:12 -04:00
Mitch Hayenga
a5c4eb3de9 isa,cpu: Add support for FS SMT Interrupts
Adds per-thread interrupt controllers and thread/context logic
so that interrupts properly get routed in SMT systems.
2015-09-30 11:14:19 -05:00
Mitch Hayenga
582a0148b4 config,cpu: Add SMT support to Atomic and Timing CPUs
Adds SMT support to the "simple" CPU models so that they can be
used with other SMT-supported CPUs. Example usage: this enables
the TimingSimpleCPU to be used to warmup caches before swapping to
detailed mode with the in-order or out-of-order based CPU models.
2015-09-30 11:14:19 -05:00
Andreas Hansson
806e1fbf0f stats: Update stats to reflect snoop-filter changes 2015-09-25 07:27:03 -04:00
Nilay Vaish
928d4b4ba8 stats: updates due to changes to MOESI_hammer 2015-09-16 22:17:54 -05:00
Nilay Vaish
c5058c0c00 stats: slight changes to MOESI_CMP_token.
Due slight change to latency for the reissue table.
2015-09-16 11:59:57 -05:00
Jason Lowe-Power
fdf2a6f439 stats: files for regression tests for Learning gem5 scripts
Committed by: Nilay Vaish <nilay@cs.wisc.edu>
2015-09-16 09:35:36 -05:00
Jason Lowe-Power
29dd04cfe9 tests: Add tests for the Learning gem5 scripts
These tests will ensure that Learning gem5 scripts are always up to date with
the changes in the mainline of gem5.

Committed by: Nilay Vaish <nilay@cs.wisc.edu>
2015-09-16 09:35:36 -05:00
Nilay Vaish
0d6a6dfd7b stats: updates due to recent changesets including d0934b57735a 2015-09-15 08:14:09 -05:00
Nilay Vaish
66941163e5 stats: updates due to recent changes. 2015-08-30 12:24:19 -05:00
Nilay Vaish
d383a08f16 stats: updates to ruby fs regression test
Changes due to recent patches: fc1e41e88fd3, 882ce080c9f7, e8a6637afa4c, and
e6e3b7097810 by Joel Hestness.
2015-08-14 19:26:43 -05:00
Joel Hestness
93c173a95e stats: Bump for MessageBuffer, cache latency changes 2015-08-14 01:19:34 -05:00
Andreas Sandberg
023f6eb0f2 stats: Update ARM stats to include programmable oscillators 2015-08-07 15:39:17 +01:00
Andreas Hansson
646994e599 stats: Reflect current behaviour
Not sure what went wrong in the pushing of the Ruby patches, but
somehow these regressions are not updated.
2015-08-05 04:36:29 -04:00
Andreas Sandberg
1a7802598b stats: Update stats for tgen to reflect CommMonitor changes
The name of the stack distance stats changed slightly when the stack
distance calculator was redesigned as a probe. Update the reference
stats to reflect this.
2015-08-04 10:29:13 +01:00
Andreas Sandberg
a3f49f60c7 mem: Move trace functionality from the CommMonitor to a probe
This changeset moves the access trace functionality from the
CommMonitor into a separate probe. The probe can be hooked up to any
component that exports probe points of the type ProbePoints::Packet.

This patch moves the dependency on Google's Protocol Buffers library
from the CommMonitor to the MemTraceProbe, which means that the
CommMonitor (including stack distance profiling) no long depends on
it.
2015-08-04 10:29:13 +01:00
Andreas Sandberg
022e69e6de mem: Redesign the stack distance calculator as a probe
This changeset removes the stack distance calculator hooks from the
CommMonitor class and implements a stack distance calculator as a
memory system probe instead. The probe can be hooked up to any
component that exports probe points of the type ProbePoints::Packet.
2015-08-04 10:29:13 +01:00
Andreas Sandberg
447a6b6442 stats: Update switcheroo reference stats
The Minor draining fixes affect perturb the timing slightly since it
affects how the simulator is drained. Update reference statistics to
reflect this expected change.
2015-07-31 17:04:59 +01:00
Andreas Sandberg
c50e429001 stats: Bump stats after Minor switcheroo inclusion 2015-07-30 10:16:36 +01:00
Andreas Sandberg
decd6b958e tests: Add Minor to the ARM full switcheroo tests
Add the Minor CPU to the RealView and RealView64 full switcheroo
tests.
2015-07-30 10:16:28 +01:00
Andreas Hansson
d8f732273e stats: Update stats for clean eviction addition 2015-07-30 03:42:27 -04:00
Andreas Hansson
222d920d6b stats: Bump stats to match current behaviour
Somehow this one seems to have slipped through. Perhaps
non-determinism somewhere?
2015-07-30 03:41:36 -04:00
Nilay Vaish
c47001de8c stats: x86: updates due to patch on vex 2015-07-18 15:07:35 -05:00
Andreas Sandberg
a0cbf55411 stats: Update pc-switcheroo stats
The pc-switcheroo test cases has slightly different timing after
decoupling draining from the SimObject hierarchy. This is expected
since objects aren't drained in the exact same order as before.
2015-07-07 09:51:05 +01:00
Andreas Sandberg
f16c0a4a90 sim: Decouple draining from the SimObject hierarchy
Draining is currently done by traversing the SimObject graph and
calling drain()/drainResume() on the SimObjects. This is not ideal
when non-SimObjects (e.g., ports) need draining since this means that
SimObjects owning those objects need to be aware of this.

This changeset moves the responsibility for finding objects that need
draining from SimObjects and the Python-side of the simulator to the
DrainManager. The DrainManager now maintains a set of all objects that
need draining. To reduce the overhead in classes owning non-SimObjects
that need draining, objects inheriting from Drainable now
automatically register with the DrainManager. If such an object is
destroyed, it is automatically unregistered. This means that drain()
and drainResume() should never be called directly on a Drainable
object.

While implementing the new functionality, the DrainManager has now
been made thread safe. In practice, this means that it takes a lock
whenever it manipulates the set of Drainable objects since SimObjects
in different threads may create Drainable objects
dynamically. Similarly, the drain counter is now an atomic_uint, which
ensures that it is manipulated correctly when objects signal that they
are done draining.

A nice side effect of these changes is that it makes the drain state
changes stricter, which the simulation scripts can exploit to avoid
redundant drains.
2015-07-07 09:51:05 +01:00
Andreas Sandberg
d7a56ee524 tests: Skip SPARC tests if the required binaries are missing
The full-system SPARC tests depend on several binaries that aren't
generally available to the wider community. Flag the tests as skipped
instead of failed if these binaries can't be found.
2015-07-07 09:51:03 +01:00
Nilay Vaish
381e9191dd stats: x86: update stats missed out on in preivous changeset 2015-07-05 20:26:18 -05:00
Nilay Vaish
9954eb74df stats: update stale config.ini files, eio and few other stats. 2015-07-04 10:43:47 -05:00
Andreas Hansson
25e1b1c1f5 stats: Update stats for cache, crossbar and DRAM changes
This update includes the changes to whole-line writes, the refinement
of Read to ReadClean and ReadShared, the introduction of CleanEvict
for snoop-filter tracking, and updates to the DRAM command scheduler
for bank-group-aware scheduling.

Needless to say, almost every regression is affected.
2015-07-03 10:15:03 -04:00
Andreas Hansson
893533a126 mem: Allow read-only caches and check compliance
This patch adds a parameter to the BaseCache to enable a read-only
cache, for example for the instruction cache, or table-walker cache
(not for x86). A number of checks are put in place in the code to
ensure a read-only cache does not end up with dirty data.

A follow-on patch adds suitable read requests to allow a read-only
cache to explicitly ask for clean data.
2015-07-03 10:14:39 -04:00
Andreas Hansson
a22c29b263 arm, stats: Update stats to reflect reduction in misc reg reads 2015-05-26 03:21:44 -04:00
Andreas Hansson
4bc7dfb697 stats: Update MinorCPU regressions after accounting fix 2015-05-26 03:21:39 -04:00
Andreas Sandberg
dbdb9ab518 arm, stats: Update stats to reflect changes to generic timer
The addition of a virtual timer affects stats in minor and o3.
2015-05-23 13:50:57 +01:00
Andreas Hansson
40e180ecbe stats, arm: Update stats for missing FPEXC.EN check
Only one regression is affected.
2015-05-05 03:22:48 -04:00