Commit graph

6346 commits

Author SHA1 Message Date
Gabe Black
43f58927d6 X86: Implement a locking version of CMPXCHG. 2009-04-19 04:56:40 -07:00
Gabe Black
b493906eb9 X86: Implement a locking version of BTS. 2009-04-19 04:56:36 -07:00
Gabe Black
985d959ea6 X86: Implement a locking version of DEC. 2009-04-19 04:56:34 -07:00
Gabe Black
4f2d4f466a X86: Implement a locking version of INC. 2009-04-19 04:56:31 -07:00
Gabe Black
2394f73f90 X86: Implement a locking version of NEG. 2009-04-19 04:56:28 -07:00
Gabe Black
9b9b7a412c X86: Implement a locking version of NOT. 2009-04-19 04:56:25 -07:00
Gabe Black
b8f81c62a2 X86: Implement a locking version of XCHG. 2009-04-19 04:56:22 -07:00
Gabe Black
750f5a0a67 X86: Implement a locking version of XOR. 2009-04-19 04:56:20 -07:00
Gabe Black
cfb289ebeb X86: Implement a locking version of SUB. 2009-04-19 04:56:16 -07:00
Gabe Black
789b3191b9 X86: Implement a locking version of AND. 2009-04-19 04:56:14 -07:00
Gabe Black
e742cad6f4 X86: Implement a locking version of SBB. 2009-04-19 04:56:11 -07:00
Gabe Black
193265c6e5 X86: Implement a locking version of ADC. 2009-04-19 04:56:08 -07:00
Gabe Black
2f607b882c X86: Implement a locking version of OR. 2009-04-19 04:56:06 -07:00
Gabe Black
a7f79c9049 X86: Implement a locking version of ADD. 2009-04-19 04:56:02 -07:00
Gabe Black
d90456a486 X86: Implement the stul microop.
This microop does a store and unlocks the requested address. The RISC86
microop ISA doesn't seem to have an equivalent to this, so I'm guessing that
the store following an ldstl is automatically unlocking. We don't do it this
way for performance reasons since the behavior is the same.
2009-04-19 04:55:58 -07:00
Gabe Black
d2554ff030 X86: Implement the ldstl microop.
This microop does a load, checks that a store would succeed, and locks the
requested address.
2009-04-19 04:55:43 -07:00
Gabe Black
1a8a765a5c CPUs: Make the atomic CPU support locked memory accesses. 2009-04-19 04:50:07 -07:00
Gabe Black
742c3f045e Memory: Add a LOCKED flag back in for x86 style locking. 2009-04-19 04:39:25 -07:00
Gabe Black
3e5f487663 Memory: Rename LOCKED for load locked store conditional to LLSC. 2009-04-19 04:25:01 -07:00
Gabe Black
ca85981478 SE mode: Make keeping track of the number of syscalls less hacky. 2009-04-19 04:15:32 -07:00
Gabe Black
b8333a5155 X86: Actually put the PCI INTA entry into the MP tables. 2009-04-19 04:15:18 -07:00
Gabe Black
e174239bd8 X86: Mask the PIC at startup to avoid a glitch which causes an NMI. 2009-04-19 04:15:06 -07:00
Gabe Black
25e223c30f X86: Make E820 report nice, round (and correct) numbers. 2009-04-19 04:14:48 -07:00
Gabe Black
5f164ba720 X86: Actually handle 16 bit mode modrm. 2009-04-19 04:14:31 -07:00
Gabe Black
93cccf7d19 X86: Make the TEST instruction set all the flags it's supposed to. 2009-04-19 04:14:16 -07:00
Gabe Black
f82c123242 X86: Implement broadcast IPIs. 2009-04-19 04:14:01 -07:00
Gabe Black
829e424353 X86: Fix the ordering of the vendor string reported by CPUID. 2009-04-19 04:13:45 -07:00
Gabe Black
8b2ac20753 X86: Keep track of what the initial count value was in the LAPIC timer. 2009-04-19 03:56:57 -07:00
Gabe Black
18b3863127 X86: Only recognize the first startup IPI after INIT or reset. 2009-04-19 03:56:36 -07:00
Gabe Black
4d32cd10ce X86: Use recvResponse to implement the idle bit in the Local APIC ICR. 2009-04-19 03:56:24 -07:00
Gabe Black
bdda224d41 X86: Add a function which gets called when an interrupt message has been delivered. 2009-04-19 03:54:11 -07:00
Gabe Black
3031af21c7 X86: Fix the flags for interrupt response messages. 2009-04-19 03:53:29 -07:00
Gabe Black
3eed59768c X86: Explicitly use the right width in a few places that need a 64 bit value. 2009-04-19 03:47:59 -07:00
Gabe Black
8761057c78 X86: Keep track of the pioAddr for the local APIC. 2009-04-19 03:47:12 -07:00
Gabe Black
038225a6ca X86: Implement far jmp. 2009-04-19 03:42:41 -07:00
Gabe Black
3b1b21cb15 X86: Some segment selectors can be used when "NULL". 2009-04-19 03:41:10 -07:00
Gabe Black
a0cc081997 X86: Fix a bug in the chks microop where it ignored that it found a fault. 2009-04-19 03:40:08 -07:00
Gabe Black
f2ff5b9249 X86: Make the interrupt entering microcode record the value to use, not actually use it. 2009-04-19 03:36:57 -07:00
Gabe Black
35eea4191b X86: LEA calculates an address before segmentation. 2009-04-19 03:24:51 -07:00
Gabe Black
bdd55ec8b6 X86: Implement the save machine status word instruction (SMSW). 2009-04-19 03:22:38 -07:00
Gabe Black
d86cd1d2a0 X86: Implement the load machine status word instruction (LMSW). 2009-04-19 03:17:14 -07:00
Gabe Black
b4ad233c0c X86: Update the stats for the fix for CPUID. 2009-04-19 03:14:33 -07:00
Gabe Black
eba640c963 X86: Only use %eax to select a function and look like we support sse2. 2009-04-19 03:11:24 -07:00
Gabe Black
27e54982b4 X86: Fix the mov to segment selector in real mode instruction microcode. 2009-04-19 03:08:40 -07:00
Gabe Black
633c96bd85 X86: The startup IPI delivery mode is not reserved. 2009-04-19 03:01:46 -07:00
Gabe Black
08f021aad0 X86: Implement the STARTUP IPI. 2009-04-19 02:56:03 -07:00
Gabe Black
d277feb925 X86: Implement the INIT IPI. 2009-04-19 02:53:00 -07:00
Gabe Black
a340b214cf X86: Fix the halt microop. 2009-04-19 02:51:09 -07:00
Gabe Black
641513fe08 X86: Start implementing the interrupt command register in the local APIC. 2009-04-19 02:43:22 -07:00
Gabe Black
9549694ecd X86: Make code that sends an interrupt from the IO APIC available for IPIs. 2009-04-19 02:42:19 -07:00