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X86: Implement the save machine status word instruction (SMSW).

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This commit is contained in:
Gabe Black 2009-04-19 03:22:38 -07:00
parent d86cd1d2a0
commit bdd55ec8b6
2 changed files with 17 additions and 2 deletions
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4
src/arch/x86/isa/decoder/two_byte_opcodes.isa
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@ -125,7 +125,7 @@
0x6: skinit();
0x7: invlpga();
}
0x4: smsw_Rv();
0x4: Inst::SMSW(Rv);
0x6: Inst::LMSW(Rv);
0x7: decode MODRM_RM {
0x0: Inst::SWAPGS();
@ -155,7 +155,7 @@
default: Inst::LIDT(M);
}
}
0x4: smsw_Mw();
0x4: Inst::SMSW(Mw);
0x6: Inst::LMSW(Mw);
0x7: Inst::INVLPG(M);
default: Inst::UD2();

15
src/arch/x86/isa/insts/system/control_registers.py
View file

@ -68,4 +68,19 @@ def macroop LMSW_P {
or t1, t1, t2, dataSize=8
wrcr 0, t1, dataSize=8
};
def macroop SMSW_R {
rdcr reg, 0
};
def macroop SMSW_M {
rdcr t1, 0
st t1, seg, sib, disp, dataSize=2
};
def macroop SMSW_P {
rdcr t1, 0
rdip t7, dataSize=asz
st t1, seg, riprel, disp, dataSize=2
};
'''