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X86: Make code that sends an interrupt from the IO APIC available for IPIs.

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This commit is contained in:
Gabe Black 2009-04-19 02:42:19 -07:00
parent 06d25dcd26
commit 9549694ecd
4 changed files with 54 additions and 48 deletions
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1
src/dev/x86/SConscript
View file

@ -67,3 +67,4 @@ if env['FULL_SYSTEM'] and env['TARGET_ISA'] == 'x86':
SimObject('X86IntPin.py')
Source('intdev.cc')
TraceFlag('IntDev')

49
src/dev/x86/i82094aa.cc
View file

@ -162,54 +162,7 @@ X86ISA::I82094AA::signalInterrupt(int line)
message.destMode = entry.destMode;
message.level = entry.polarity;
message.trigger = entry.trigger;
if (DeliveryMode::isReserved(entry.deliveryMode)) {
fatal("Tried to use reserved delivery mode "
"for IO APIC entry %d.\n", line);
} else if (DTRACE(I82094AA)) {
DPRINTF(I82094AA, "Delivery mode is: %s.\n",
DeliveryMode::names[entry.deliveryMode]);
DPRINTF(I82094AA, "Vector is %#x.\n", message.vector);
}
if (entry.destMode == 0) {
DPRINTF(I82094AA,
"Sending interrupt to APIC ID %d.\n", entry.dest);
PacketPtr pkt = buildIntRequest(entry.dest, message);
if (sys->getMemoryMode() == Enums::timing)
intPort->sendMessageTiming(pkt, latency);
else if (sys->getMemoryMode() == Enums::atomic)
intPort->sendMessageAtomic(pkt);
else
panic("Unrecognized memory mode.\n");
} else {
DPRINTF(I82094AA, "Sending interrupts to APIC IDs:"
"%s%s%s%s%s%s%s%s\n",
bits((int)entry.dest, 0) ? " 0": "",
bits((int)entry.dest, 1) ? " 1": "",
bits((int)entry.dest, 2) ? " 2": "",
bits((int)entry.dest, 3) ? " 3": "",
bits((int)entry.dest, 4) ? " 4": "",
bits((int)entry.dest, 5) ? " 5": "",
bits((int)entry.dest, 6) ? " 6": "",
bits((int)entry.dest, 7) ? " 7": ""
);
uint8_t dests = entry.dest;
uint8_t id = 0;
while(dests) {
if (dests & 0x1) {
PacketPtr pkt = buildIntRequest(id, message);
if (sys->getMemoryMode() == Enums::timing)
intPort->sendMessageTiming(pkt, latency);
else if (sys->getMemoryMode() == Enums::atomic)
intPort->sendMessageAtomic(pkt);
else
panic("Unrecognized memory mode.\n");
}
dests >>= 1;
id++;
}
}
intPort->sendMessage(message, sys->getMemoryMode() == Enums::timing);
}
}

47
src/dev/x86/intdev.cc
View file

@ -30,6 +30,53 @@
#include "dev/x86/intdev.hh"
void
X86ISA::IntDev::IntPort::sendMessage(TriggerIntMessage message, bool timing)
{
if (DeliveryMode::isReserved(message.deliveryMode)) {
fatal("Tried to use reserved delivery mode %d\n",
message.deliveryMode);
} else if (DTRACE(IntDev)) {
DPRINTF(IntDev, "Delivery mode is: %s.\n",
DeliveryMode::names[message.deliveryMode]);
DPRINTF(IntDev, "Vector is %#x.\n", message.vector);
}
if (message.destMode == 0) {
DPRINTF(IntDev,
"Sending interrupt to APIC ID %d.\n", message.destination);
PacketPtr pkt = buildIntRequest(message.destination, message);
if (timing)
sendMessageTiming(pkt, latency);
else
sendMessageAtomic(pkt);
} else {
DPRINTF(IntDev, "Sending interrupts to APIC IDs:"
"%s%s%s%s%s%s%s%s\n",
bits((int)message.destination, 0) ? " 0": "",
bits((int)message.destination, 1) ? " 1": "",
bits((int)message.destination, 2) ? " 2": "",
bits((int)message.destination, 3) ? " 3": "",
bits((int)message.destination, 4) ? " 4": "",
bits((int)message.destination, 5) ? " 5": "",
bits((int)message.destination, 6) ? " 6": "",
bits((int)message.destination, 7) ? " 7": ""
);
uint8_t dests = message.destination;
uint8_t id = 0;
while(dests) {
if (dests & 0x1) {
PacketPtr pkt = buildIntRequest(id, message);
if (timing)
sendMessageTiming(pkt, latency);
else
sendMessageAtomic(pkt);
}
dests >>= 1;
id++;
}
}
}
X86ISA::IntSourcePin *
X86IntSourcePinParams::create()
{

5
src/dev/x86/intdev.hh
View file

@ -35,6 +35,7 @@
#include <string>
#include "arch/x86/x86_traits.hh"
#include "arch/x86/intmessage.hh"
#include "mem/mem_object.hh"
#include "mem/mport.hh"
#include "sim/sim_object.hh"
@ -70,6 +71,10 @@ class IntDev
return device->recvMessage(pkt);
}
// This is x86 focused, so if this class becomes generic, this would
// need to be moved into a subclass.
void sendMessage(TriggerIntMessage message, bool timing);
void recvStatusChange(Status status)
{
if (status == RangeChange) {