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X86: Make the TEST instruction set all the flags it's supposed to.

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This commit is contained in:
Gabe Black 2009-04-19 04:14:16 -07:00
parent f82c123242
commit 93cccf7d19
1 changed files with 6 additions and 6 deletions
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12
src/arch/x86/isa/insts/general_purpose/compare_and_test/test.py
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@ -57,26 +57,26 @@ microcode = '''
def macroop TEST_M_R
{
ld t1, seg, sib, disp
and t0, t1, reg, flags=(SF, ZF, PF)
and t0, t1, reg, flags=(OF, SF, ZF, PF, CF)
};
def macroop TEST_P_R
{
rdip t7
ld t1, seg, riprel, disp
and t0, t1, reg, flags=(SF, ZF, PF)
and t0, t1, reg, flags=(OF, SF, ZF, PF, CF)
};
def macroop TEST_R_R
{
and t0, reg, regm, flags=(SF, ZF, PF)
and t0, reg, regm, flags=(OF, SF, ZF, PF, CF)
};
def macroop TEST_M_I
{
ld t1, seg, sib, disp
limm t2, imm
and t0, t1, t2, flags=(SF, ZF, PF)
and t0, t1, t2, flags=(OF, SF, ZF, PF, CF)
};
def macroop TEST_P_I
@ -84,12 +84,12 @@ def macroop TEST_P_I
rdip t7
ld t1, seg, riprel, disp
limm t2, imm
and t0, t1, t2, flags=(SF, ZF, PF)
and t0, t1, t2, flags=(OF, SF, ZF, PF, CF)
};
def macroop TEST_R_I
{
limm t1, imm
and t0, reg, t1, flags=(SF, ZF, PF)
and t0, reg, t1, flags=(OF, SF, ZF, PF, CF)
};
'''