sanchayanmaity/gem5
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Author SHA1 Message Date
Gabe Black
de445b5e96 Fixes to the isa description. 
src/arch/sparc/isa/base.isa:
    Fix a constant.
src/arch/sparc/isa/decoder.isa:
    Made carry calculation more consistent.
src/arch/sparc/isa/operands.isa:
    Use the right constant.

--HG--
extra : convert_revision : 25b3a09ff20d4b8e1a95ee8a983d14ef3cfe73bb
 2006-11-23 00:36:42 -05:00
Gabe Black
758c780651 Moved some constants from isa_traits.hh to the reg file headers. 
--HG--
extra : convert_revision : 378b2d9791e6282539900a2261ad2275d726b4be
 2006-11-22 23:49:44 -05:00
Gabe Black
0a99750ebf Merge zizzer:/bk/sparcfs 
into  zower.eecs.umich.edu:/eecshome/m5/newmem

--HG--
extra : convert_revision : 75f3398e38e18eb1f8248e23708d7a8d8cce0fc5
 2006-11-22 15:45:32 -05:00
Gabe Black
b4a31cb8b5 Make sure only real bits of pstate can be set. 
--HG--
extra : convert_revision : 8707bbed2aeb80613f86503e92b63853767adaa9
 2006-11-20 18:08:50 -05:00
Gabe Black
a0287c1e2d Set the pstate.priv bit to 1 in hyperpriveleged mode. The description in the manual of what happens during a trap says it should be 0, and other places say it doesn't matter. 
--HG--
extra : convert_revision : 9ecb6af06657e936a208cbeb8e4a18305869b949
 2006-11-20 18:07:58 -05:00
Gabe Black
cd2727694d Add in rom/rams for the nvram, hypervisor description, and partition description. 
--HG--
extra : convert_revision : a49de5fcfbea307c971964b8a68b95eb5d9a2bf4
 2006-11-20 17:59:35 -05:00
Kevin Lim
719416b60f Fix typo. 
--HG--
extra : convert_revision : 2dd830c6b3b5df894608b7596250b0181a3dfdf0
 2006-11-20 11:44:27 -05:00
Nathan Binkert
31d829d388 Implement current working directory for LiveProcesses 
--HG--
extra : convert_revision : a2d3cf29ab65c61af27d82a8c421a41a19fd5aeb
 2006-11-16 12:43:11 -08:00
Gabe Black
74654ddd1f Merge zower.eecs.umich.edu:/home/gblack/m5/newmemmemops 
into  zower.eecs.umich.edu:/eecshome/m5/newmem

--HG--
extra : convert_revision : 74b2352b8f088e38cd1ecf3a8233b45df0476d93
 2006-11-16 14:42:44 -05:00
Gabe Black
cd5b33b9ff Fixes for SPARC_FS 
configs/common/FSConfig.py:
    Make a SPARC system create an IO bus.
src/python/m5/objects/T1000.py:
    Create a T1000 platform
src/arch/sparc/miscregfile.cc:
    Initialize the strand status register to the value legion provides.
src/cpu/exetrace.cc:
    Truncate an ExtMachInst to a MachInst before comparing with Legion.

--HG--
extra : convert_revision : e4189b572a5297e8362f5bd26d87b74736c8e5f1
 2006-11-16 12:34:10 -05:00
Gabe Black
ac2c7967f6 Merge zizzer.eecs.umich.edu:/bk/newmem/ 
into  zeep.eecs.umich.edu:/home/gblack/m5/newmemmemops

--HG--
extra : convert_revision : 966246877ac1f1e6c2675d413b0b405cccfecbeb
 2006-11-14 15:23:23 -05:00
Lisa Hsu
ee777f35c2 interrupts.hh: 
make a likewise updateIntrInfo for Sparc that's blank so it doesn't fart on build

src/arch/sparc/interrupts.hh:
    make a likewise updateIntrInfo for Sparc that's blank so it doesn't fart on build

--HG--
extra : convert_revision : 5f469d0cf897479b42703104cd801a8ef923fcae
 2006-11-14 12:59:57 -05:00
Gabe Black
7632198a6e Merge 141.212.106.238:/home/gblack/m5/newmemmemops 
into  zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/m5/newmem

--HG--
extra : convert_revision : cda58e6e63f2f909b85a510fb76d35d49d8042b9
 2006-11-14 01:31:37 -05:00
Gabe Black
20730b790c Set hpstate to be what I'm assuming Legion is. 
--HG--
extra : convert_revision : 0be66513cb0cff07c0c2b50c97c1ea74d52b0dc9
 2006-11-14 01:30:34 -05:00
Gabe Black
c2ceaa887e Make sure a POR doesn't clobber the value of the hpstate. 
--HG--
extra : convert_revision : 4504f08fd94792819bd4419bbd2e0ebd1d7f29e9
 2006-11-14 01:29:11 -05:00
Gabe Black
6b95f24145 Fix up the disassembly a little. 
--HG--
extra : convert_revision : 7bdf68f445b79b1b5dbcdfa5fa1005c68d03724c
 2006-11-14 01:28:11 -05:00
Gabe Black
8d234a4bc5 Merge 141.212.106.238:/home/gblack/m5/newmemmemops 
into  zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/m5/newmem

--HG--
extra : convert_revision : 753831a9f6f79d07e6ee122ab894e24161d2e722
 2006-11-14 01:23:59 -05:00
Steve Reinhardt
51d8c59ef8 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  vm1.(none):/home/stever/bk/newmem-head

--HG--
extra : convert_revision : faab7569deefde94c20133b2f70a8567bcaa2960
 2006-11-12 22:04:00 -08:00
Steve Reinhardt
0f633c5fee Make setRegWithEffect do something in SE mode. 
--HG--
extra : convert_revision : 88fdaa403fe6d083f8c8fc064cb0d0d6a8b8daf8
 2006-11-12 22:03:42 -08:00
Kevin Lim
3052632b68 Merge ktlim@zamp:./local/clean/tmp/test-regress 
into  zamp.eecs.umich.edu:/z/ktlim2/clean/newmem-busfix

--HG--
extra : convert_revision : b98236507bb8996ce605b48b5a5a6a7aac297dc5
 2006-11-12 21:57:58 -05:00
Kevin Lim
12e26c68c3 Updates to support new interrupt processing and removal of PcPAL. 
src/arch/alpha/interrupts.hh:
    No need for this now that the ThreadContext is being used to set these IPRs in interrupts.
    Also split up the interrupt checking from the updating of the IPL and interrupt summary.
src/arch/alpha/tlb.cc:
    Check the PC for whether or not it's in PAL mode, not the addr.
src/cpu/o3/alpha/cpu.hh:
    Split up getting the interrupt from actually processing the interrupt.
src/cpu/o3/alpha/cpu_impl.hh:
    Splut up the processing of interrupts.
src/cpu/o3/commit_impl.hh:
    Update for ISA-oriented interrupt changes.
src/cpu/o3/fetch_impl.hh:
    Fix broken if statement from PcPAL updates, and properly populate the request fields.

    Also more debugging output.
src/cpu/ozone/cpu_impl.hh:
    Updates for ISA-oriented interrupt stuff.
src/cpu/ozone/front_end_impl.hh:
    Populate request fields properly.
src/cpu/simple/base.cc:
    Update for interrupt stuff.

--HG--
extra : convert_revision : 9bac3f9ffed4948ee788699b2fa8419bc1ca647c
 2006-11-12 20:15:30 -05:00
Gabe Black
fd35f02efe Fix for CAS so that it knows about all the possible code in the constructor. 
--HG--
extra : convert_revision : 863d395f8e7c8ee2aec708ffcef842317ec9a89b
 2006-11-11 07:23:13 -05:00
Gabe Black
239a89e713 Certain header files should only be used in FS. 
src/arch/alpha/faults.hh:
    Only use pagetable.hh in FS
src/arch/alpha/pagetable.hh:
    pagetable.hh should only be included in FS, so protecting it internally should be unnecessary.
src/cpu/exetrace.cc:
    Only use tlb.hh in FS

--HG--
extra : convert_revision : 91ea61f2e7970e7146b6d407ee250fcb20cd4d48
 2006-11-11 07:15:16 -05:00
Ali Saidi
aa19b2e7bc fix endian issues with condition codes 
use memcpy instead of bcopy
s/u_int32_t/uint32_t/g
fixup endian code to work with solaris
hack to make sure htole() works... Nate, have a good idea to fix this?

src/arch/sparc/faults.cc:
    set the reset address to be 40 bits. Makes PC printing easier at least for now.
src/arch/sparc/isa/base.isa:
    fix endian issues with condition codes
src/arch/sparc/tlb.hh:
    add implemented physical addres constants
src/arch/sparc/utility.hh:
    add tlb.hh to utilities
src/base/loader/raw_object.cc:
    add a symbol <filename>_start to the symbol table for binaries files
src/base/remote_gdb.cc:
    use memcpy instead of bcopy
src/cpu/exetrace.cc:
    clean up printing a bit more
src/cpu/m5legion_interface.h:
    add tons to the shared interface
src/dev/ethertap.cc:
    s/u_int32_t/uint32_t/g
src/dev/ide_atareg.h:
    fixup endian code to work with solaris
src/dev/pcidev.cc:
src/sim/param.hh:
    hack to make sure htole() works...

--HG--
extra : convert_revision : 4579392184b40bcc1062671a953c6595c685e9b2
 2006-11-10 20:17:42 -05:00
Gabe Black
6d54a77518 Elaborated on the tlb stubs so that they just set the physical address to the virtual address. 
--HG--
extra : convert_revision : 41478abc4d21d504420f6842338675c0767f7cf9
 2006-11-10 15:32:15 -05:00
Gabe Black
e3d8831857 Fixed up DepTags a little. I think NumMicroIntRegs shouldn't be added to Ctrl_Base_DepTag. 
--HG--
extra : convert_revision : 2ebb3eb781441ba936c8d8bb1f42e4c0840aff2e
 2006-11-10 15:30:59 -05:00
Gabe Black
d30e3b30af Added StrandStsReg operand. 
--HG--
extra : convert_revision : 51be41716ed9fe0e99e53f2341ad5651a525055a
 2006-11-10 15:29:32 -05:00
Gabe Black
13a8752c11 Put in provisions for rd, rdpr, rdhpr, wr, wrpr, and wrhpr to disassemble properly. 
--HG--
extra : convert_revision : f2cad8a5879999438ba9b05f15a91320e7a4cc4a
 2006-11-10 15:28:58 -05:00
Gabe Black
7bf1c8981d Made the annul of unconditional conditional branches behave properly, added code to read and write the strand_sts_reg, and made restored a Priv instruction. 
--HG--
extra : convert_revision : 386512215f7243d230717c369217f8d2f9ada935
 2006-11-10 15:27:06 -05:00
Gabe Black
27b43b62b7 Fixed up the code that prints out registers to take into account microregisters. 
--HG--
extra : convert_revision : 6809de467e4500ce34447c0544caf0ba04af81e7
 2006-11-10 15:25:52 -05:00
Gabe Black
8390e46311 Tweaked debug output. 
--HG--
extra : convert_revision : cd33b7c1ebdbefd42f18c1435b2519d06d9914a6
 2006-11-10 15:25:03 -05:00
Gabe Black
cee4d1c113 Touched up faults, and made POR actually do something. 
--HG--
extra : convert_revision : 38951352edbfc423fb6767a9aac49a703578c0ac
 2006-11-10 15:24:10 -05:00
Gabe Black
9ef51f2dba Actually finished moving the register file stuff around. 
--HG--
extra : convert_revision : 786735ecea8ff480db6b3754ac5daa562938d988
 2006-11-10 05:49:16 -05:00
Gabe Black
9731fb3fd7 Moved the Alpha float regfile into it's own regfile and got rid of constants.hh and isa_traits.cc 
--HG--
extra : convert_revision : 55afd7d21c276906520da375b3bbb563be420880
 2006-11-10 05:29:05 -05:00
Gabe Black
b4dfbf3aab Split out alpha integer register file into it's own files. 
--HG--
extra : convert_revision : 164bdcec2860c5dca3f0f11d189781b88dd717cb
 2006-11-10 04:54:25 -05:00
Gabe Black
71dc49c785 The reset function of the MiscRegFile really resets it now. This function is called from the class's constructor. 
--HG--
extra : convert_revision : 4e7a40ffe0a9a71fd1b2b171d9c0dcac50e1a1fe
 2006-11-10 04:33:41 -05:00
Gabe Black
dc6af9fbf7 Set the ASI register to be something explicitly so that simulation is deterministic. 
--HG--
extra : convert_revision : 38cd06f946fc0cc22288f71f567e77ce8fdfea99
 2006-11-10 04:14:25 -05:00
Gabe Black
4aea5deccb Fix up instructions to read and write control registers, and got rid of the control register fields which won't work on a big endian host. 
--HG--
extra : convert_revision : 1b518873b6e1a073b58cbe27642537d5ae3a604d
 2006-11-10 04:02:39 -05:00
Gabe Black
232c3f1b27 Moved the Alpha MiscRegFile into it's own file, and got rid of the Alpha specific DepTag constants. 
--HG--
extra : convert_revision : e4af5e2fb2a6953f8837ad9bda309b7d6fa7abfb
 2006-11-09 21:30:48 -05:00
Gabe Black
50462c15aa Fix a couple uninitialized variables. 
--HG--
extra : convert_revision : d17d28a9520524e5f56bd79beb9b2be6ce76a22f
 2006-11-09 19:24:35 -05:00
Ali Saidi
cb172d0332 Get SPARC to the point that it starts running. Add ability to load the ROM bin files, cleanup lockstep printing a bit 
Since we don't have a platform yet, you need to comment out the default responder stuff in Bus.py to make it work.

SConstruct:
    Add TARGET_ISA to the list of environment variables that end up in the build_env for python
configs/common/FSConfig.py:
    add a simple SPARC system to being testing with, you'll need to change makeLinuxAlphaSystem to makeSparcSystem in fs.py for now
src/SConscript:
    add a raw file object, at least until we get more info about how to compile openboot properly
src/arch/sparc/system.cc:
src/arch/sparc/system.hh:
    add parameters for ROM files (OBP/Reset/Hypervisor), a ROM, load files into ROM
src/base/loader/object_file.cc:
src/base/loader/object_file.hh:
    add option to try raw when nothing works
src/cpu/exetrace.cc:
    cleanup lockstep printing a little bit
src/cpu/m5legion_interface.h:
    change the instruction to be 32 bits because it is
src/mem/physical.cc:
    fix assert that doesn't work if memory starts somewhere above 0
src/python/m5/objects/BaseCPU.py:
    Add if statement to choose between sparc tlbs and alpha tlbs
src/python/m5/objects/System.py:
    Add a sparc system that sets the rom addresses correctly
src/python/m5/params.py:
    add the ability to add Addr() together

--HG--
extra : convert_revision : bbbd8a56134f2dda2728091f740e2f7119b0c4af
 2006-11-09 18:22:46 -05:00
Gabe Black
5b90922ad5 Put the MIPS stacktrace into the MipsISA namespace to fit with Alpha and SPARC. 
--HG--
extra : convert_revision : 86f5585fe9ceb2ee30836d35384ebcddc1357c2a
 2006-11-08 16:15:20 -05:00
Gabe Black
42c73c6a92 Make a function to say how big gdbregs is in bytes vs. regs. 
--HG--
extra : convert_revision : 10c50c2d45a8e510d71cccde520059363116da8a
 2006-11-08 15:31:52 -05:00
Gabe Black
63bbc8929d First cut at full blown SPARC faults. There are a few details that are missing. 
--HG--
extra : convert_revision : 8023db1479cb9bf99fc9edfeb521c4e5b581f895
 2006-11-08 13:58:00 -05:00
Gabe Black
67b9a2ebd8 Move the check to see if you're in user mode into the isa directory. 
--HG--
extra : convert_revision : b5b7cdf4a5e5e54228c592093516bf18d0f7dbe6
 2006-11-08 13:55:48 -05:00
Gabe Black
770b575c30 Sorted faults by the trap type constant, expanded their names, added in new faults for ua2005, and commented out ones which are apparently dropped. 
--HG--
extra : convert_revision : 32bd0c3a75d7c036ad4a3cb0bc1c32e0b6cb3d87
 2006-11-08 10:27:38 -05:00
Gabe Black
9375caa3f1 Fix for slightly mangled merge. 
--HG--
extra : convert_revision : 1dea04ca222dd423c3d462114bc1c65afa52825d
 2006-11-08 08:25:37 -05:00
Gabe Black
b82fa633bb Merge zeep.eecs.umich.edu:/home/gblack/m5/newmem 
into  zeep.eecs.umich.edu:/home/gblack/m5/newmemmemops

src/arch/sparc/faults.hh:
    Hand merged.

--HG--
extra : convert_revision : 1bcefe47fa98e878a0dfbcfa5869b5b171927911
 2006-11-08 08:19:52 -05:00
Gabe Black
635df9ba17 Major clean up of the fault code. 
--HG--
extra : convert_revision : eb7e016a127417cbb0e1e2c733b17f82469c2f24
 2006-11-08 08:12:19 -05:00
Gabe Black
f0c4d36649 The new global level is computed with min, not max. 
--HG--
extra : convert_revision : 6339c82d3655694445c3eb43e467b9aa6b4c8224
 2006-11-08 04:18:15 -05:00
Gabe Black
8cb7ac0900 Changed the getReg and setReg functions so that they work like netbsd. Apparently, gdb expects to do single stepping on its own, so those functions panic for SPARC. acc still needs to be implemented. 
--HG--
extra : convert_revision : c6e98e37b8ab3d6f8d6b3cd2c961faa65b08a179
 2006-11-08 02:13:47 -05:00
Gabe Black
f1a55570d3 Put the ProcessInfo and StackTrace objects into the ISA namespaces. 
--HG--
extra : convert_revision : 1626703583f02a1c9823874290462c1b6bdb6c3c
 2006-11-08 00:52:04 -05:00
Gabe Black
16a012e80d Stubs for SPARC's tlbs 
--HG--
extra : convert_revision : ba08da78693cc6f59f7358134f121f471910dbf6
 2006-11-08 00:32:40 -05:00
Gabe Black
746ceb93fd Replaced getArg with a SPARC implementation. 
--HG--
extra : convert_revision : ba31171a81b6c46de2997de2701d35fcf8c614b7
 2006-11-08 00:32:04 -05:00
Gabe Black
1a5d5d0b56 Force remote gdb code to use signal numbers and not ISA specific trap numbers. 
--HG--
extra : convert_revision : 4f45a4b48e3993ac6991db2afffbce2e666eab6c
 2006-11-07 23:40:54 -05:00
Gabe Black
c693c6ba9f Put kernel_stats back into arch. 
--HG--
rename : src/kern/alpha/idle_event.cc => src/arch/alpha/idle_event.cc
rename : src/kern/alpha/idle_event.hh => src/arch/alpha/idle_event.hh
rename : src/kern/alpha/kernel_stats.cc => src/arch/alpha/kernel_stats.cc
rename : src/kern/alpha/kernel_stats.hh => src/arch/alpha/kernel_stats.hh
rename : src/kern/sparc/kernel_stats.hh => src/arch/sparc/kernel_stats.hh
rename : src/kern/base_kernel_stats.cc => src/kern/kernel_stats.cc
rename : src/kern/base_kernel_stats.hh => src/kern/kernel_stats.hh
extra : convert_revision : 42bd3e36b407edbd19b912c9218f4e5923a15966
 2006-11-07 22:34:34 -05:00
Gabe Black
48415ad298 A dummy implementation of stacktrace.cc to clear up linker errors. 
--HG--
extra : convert_revision : ea1e54a529ad7ae4a6564dd6fb47c31fb0573adf
 2006-11-07 05:44:22 -05:00
Gabe Black
7e422980e9 Arguments class for SPARC. This is basically just a copy of Alpha's 
--HG--
extra : convert_revision : 9df68973c63d5ff256d6de485e8d918c454c8ff1
 2006-11-07 05:43:33 -05:00
Gabe Black
74112dec52 Added a stub implementation of fixFuncEventAddr to get past linker errors. 
--HG--
extra : convert_revision : 24ab1789496c5fae6c0992db2d521ea02354ee90
 2006-11-07 05:41:23 -05:00
Gabe Black
0c9bcf209a The normal spill and fill faults only need to behave specially in SE. 
--HG--
extra : convert_revision : 4d4b866699e3450b88418822fc198411ee3d831a
 2006-11-07 05:40:48 -05:00
Gabe Black
bcd5099aac Added in alot of missing source files. 
--HG--
extra : convert_revision : 335b458d195a00dac3d04e92fe9df915e660538f
 2006-11-07 05:40:06 -05:00
Gabe Black
54e22bfe95 Broke remote_gdb into a base class and architecture specific derived classes. 
--HG--
extra : convert_revision : 8c528fab56a95b8245ad0f2572d62bb556ce0dde
 2006-11-07 05:39:40 -05:00
Gabe Black
da24915181 Moved the idle event out of system_events.hh. The skipFuncEvent can be made ISA independent by making it use the #define for branch delay slots (and NNPC) 
--HG--
extra : convert_revision : b2631b1163397ecc99f2f315e2b88537e2002731
 2006-11-07 05:38:33 -05:00
Gabe Black
4bfb8547bb Moved the switched version of kernel_stats.hh back to kern, and moved the base kernel_stats to base_kernel_stats 
--HG--
extra : convert_revision : 2a010d2eb7ea2586ff063b99b8bcde6eb1e8e017
 2006-11-07 05:36:54 -05:00
Gabe Black
eb4ef3ad76 Made kern a switching header file directory. 
SConstruct:
    Put the code to make a switching header directory into a function so they are easy to make.
src/arch/SConscript:
    Replace switching header code with the new function call.
src/kern/SConscript:
    Created a new switching header directory in kern, and moved the declaration of some source files here.

--HG--
rename : src/kern/kernel_stats.cc => src/kern/base_kernel_stats.cc
rename : src/kern/kernel_stats.hh => src/kern/base_kernel_stats.hh
extra : convert_revision : 98f5320a5ade567c3e4f67fef123dfb0c5122545
 2006-11-07 05:33:21 -05:00
Gabe Black
02abca6b9e Merge zizzer.eecs.umich.edu:/bk/newmem/ 
into  zeep.eecs.umich.edu:/home/gblack/m5/newmemmemops

src/SConscript:
    SCCS merged

--HG--
extra : convert_revision : f130c8a2d33f58d857e5d5a02bb9698c1bceb23b
 2006-11-06 19:52:32 -05:00
Gabe Black
b04a2653f9 Got rid of obsolete ivlb and ivle psuedo instructions. 
--HG--
extra : convert_revision : c3c2dd5a6e7181ad94194146d7fa2b33b21074fb
 2006-11-06 19:09:23 -05:00
Gabe Black
ef1a92eb9b Stub for SPARC interrupt handling object. 
--HG--
extra : convert_revision : 7257e3387c01e84e5a1018a9cdcc09a79edfa934
 2006-11-06 18:30:28 -05:00
Gabe Black
85a6079db7 Remote GDB support has been changed to use inheritance. Alpha should work, but isn't tested. Other architectures will not. 
--HG--
extra : convert_revision : fc7e1e73e2f3b1a4ab9905a1eb98c5f07c6c8707
 2006-11-06 18:29:58 -05:00
Gabe Black
e39de58d21 Took the Alpha prefix off of AlphaArguments, and made sure it was being used from TheISA:: rather than AlphaISA:: 
--HG--
extra : convert_revision : 17c143d3cbc2f58a7a9d01366a8f649810ff7f33
 2006-11-06 18:28:10 -05:00
Gabe Black
1ffff78ca9 Created seperate SConscript for the dev directory. Made subdirectories for Alpha and SPARC and put SConscripts in them. 
--HG--
rename : src/base/kgdb.h => src/arch/alpha/kgdb.h
rename : src/dev/alpha_access.h => src/dev/alpha/access.h
rename : src/dev/alpha_console.cc => src/dev/alpha/console.cc
rename : src/dev/alpha_console.hh => src/dev/alpha/console.hh
extra : convert_revision : a7dd466308cb83edc40528689aacb72413089cdf
 2006-11-06 18:26:11 -05:00
Ali Saidi
de90ae4825 Merge zizzer:/bk/newmem 
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : d7133e32cfca9f15869ee9ab7a93e3470e7d9038
 2006-11-04 21:41:10 -05:00
Ali Saidi
21cf4a46b9 fixes so that M5 will compile under solaris 
SConstruct:
    Add check to see if we need to include libsocket
src/arch/sparc/floatregfile.cc:
src/arch/sparc/intregfile.cc:
    use memset rather than bzero and include the appropriate headerfile
src/base/pollevent.cc:
    If we're compling under solaris we need sys/file.h
src/base/random.cc:
src/base/random.hh:
    solaris doesn't have random(), so use rint with the correct rounding mode
    if we're compiling on solaris
src/base/stats/flags.hh:
    u_int32_t??
src/base/time.hh:
    grab the timersub() define from freebsd since it doesn't exist in solaris
src/cpu/inst_seq.hh:
    we don't need to include stdint here
src/sim/byteswap.hh:
    the method to detect endianness on Solaris is a little more complex...

--HG--
extra : convert_revision : 6b7db0e900e7bccfc250d65c125065f27280dda1
 2006-11-04 21:41:01 -05:00
Gabe Black
601822c6b5 Make things compile in SE again. 
--HG--
extra : convert_revision : cf7faf5001b31d61c61ddce2386d61c919075800
 2006-11-03 14:42:12 -05:00
Gabe Black
8778d85b2d Use a PowerOnReset to initialize the cpu. 
--HG--
extra : convert_revision : 9e65af095c37c7c67db377424d2d4363fa8065f9
 2006-11-03 14:41:27 -05:00
Gabe Black
6ad386f1a8 Calling syscalls from within the trap instruction's invoke method won't work because apparently you need an xc for that and not a tc. Cleaned up the TrapInstruction fault in light of this. 
--HG--
extra : convert_revision : 1805c9244cfd62d0ee7862d8fd7c9983e00c5747
 2006-11-03 14:40:35 -05:00
Gabe Black
29a79acb7c Gutted out the old Alpha stuff. 
--HG--
extra : convert_revision : 6767dc1305a58e3e7eb0ee909d54768e51744927
 2006-11-03 11:05:13 -05:00
Gabe Black
3f4b098985 Added a stub initCPU function. This would be a good place to force in a PowerOnReset fault to kick start the CPU. 
--HG--
extra : convert_revision : 79e1fa2ef40e326682069639e260db255fd29d93
 2006-11-03 11:04:10 -05:00
Gabe Black
6b701a6d25 Compilation fixes. 
--HG--
extra : convert_revision : 44d67a3bb95f875f17586499aa4a04268aa2fd46
 2006-11-03 11:03:03 -05:00
Gabe Black
ab651344dd Add the syscall number as the second parameter for the trap fault. This could be improved and syscalls could be called from the trap's invoke method. 
--HG--
extra : convert_revision : 127a3673a076110fb3605c0fbc93e8d7e9fec84b
 2006-11-03 10:56:47 -05:00
Gabe Black
e6fed44625 Add an invoke function for PowerOnReset 
--HG--
extra : convert_revision : a1cdd35c74f6e85f42a04061b466ec7617da8ac2
 2006-11-03 10:55:29 -05:00
Gabe Black
694323b7c4 Move around misc reg code 
src/arch/sparc/faults.cc:
    Moved some code here from miscregfile.cc
src/arch/sparc/miscregfile.cc:
    Moved code from here to faults.cc, and merged (read|set)MiscRegWithEffect and it's FS version from ua2005.cc
src/arch/sparc/miscregfile.hh:
    readFSRegWithEffect is no longer a seperate function, and is instead done in the main readRegWith Effect.

--HG--
extra : convert_revision : 0b45f0f78e83929b32ddd2f443c8b1dbf9bc04fb
 2006-11-03 10:54:34 -05:00
Gabe Black
7c5a859243 removed ua2005.cc since it's been obsorbed into the miscregfile, and added system.cc 
--HG--
extra : convert_revision : 2a124adcefe0d15860632a05e8788d3fd34008c2
 2006-11-03 10:52:08 -05:00
Gabe Black
118b9dc1f9 Got rid of "inPalMode". Some places are still effectively checking if they are in PAL mode, however. 
--HG--
extra : convert_revision : b52d9642efc474eaf97437fa2df879efefa0062b
 2006-11-03 04:25:33 -05:00
Gabe Black
c8fc116c76 Add a new file which describes an ISA's interrupt handling mechanism. It records when interrupts are requested, and returns an interrupt to execute if the 
--HG--
extra : convert_revision : c535000a6a170caefd441687b60f940513d29739
 2006-11-03 02:25:39 -05:00
Gabe Black
fa91832900 Fixed a comment 
--HG--
extra : convert_revision : bebc701508e1d38ee74a07377c634d5e46e89abe
 2006-11-03 01:15:31 -05:00
Kevin Lim
e71ccde663 Merge ktlim@zizzer:/bk/newmem 
into  zamp.eecs.umich.edu:/z/ktlim2/clean/newmem-busfix

--HG--
extra : convert_revision : a9a41e2c292bd95aa148e1cf4d9a77c0622a462b
 2006-11-02 15:20:47 -05:00
Kevin Lim
ccaf80cc46 Use ISA specific makeExtMI. 
src/arch/alpha/utility.hh:
    For now makeExtMI will be specific to the ISA.

--HG--
extra : convert_revision : 89959c6499efcc3df9301ad8ea039580764a1496
 2006-11-02 13:11:38 -05:00
Gabe Black
6f78d49410 Fix a range check on the ipr_index. 
--HG--
extra : convert_revision : 84e25abd4bb2de0c877c883804d39feb019c7030
 2006-11-01 18:46:18 -05:00
Gabe Black
2b11b47357 Adjustments for the AlphaTLB changing to AlphaISA::TLB and changing register file functions to not take faults 
--HG--
extra : convert_revision : 1cef0734462ee2e4db12482462c2ab3c134d3675
 2006-11-01 16:44:45 -05:00
Gabe Black
f3ba6d20f6 Arg! 
--HG--
extra : convert_revision : 8328d002780c0291e7eb264076a62084de88b7a5
 2006-10-31 18:59:50 -05:00
Gabe Black
1543c3d0a1 More typos! I need to get nfs to work. 
--HG--
extra : convert_revision : f5693e96d376254f777fb0cce7b5be3d36efbea9
 2006-10-31 18:51:26 -05:00
Gabe Black
1dd903e856 Fix another typo 
--HG--
extra : convert_revision : ad7058babf2a13bfe543e05f2662dc49a18a8b8b
 2006-10-31 18:39:17 -05:00
Gabe Black
39de635fbf Check for out of range IPR values as well. 
--HG--
extra : convert_revision : 9ca241bb71d8a1d022e54485383a88d2abece663
 2006-10-31 18:19:45 -05:00
Gabe Black
45368c0300 Fix stupid typo 
--HG--
extra : convert_revision : fbfc82974e89b2c726b689674c9f5d957682b280
 2006-10-31 18:01:31 -05:00
Gabe Black
fb5ba85abb Make two simple utility functions to determine if a MiscReg index corresponding to an IPR is readable or writable. 
--HG--
extra : convert_revision : 89eebba5eec01e629213997d24c734a6acad0ecb
 2006-10-31 17:50:57 -05:00
Gabe Black
ad201172c9 We don't include ipr.cc in SE builds, so don't call it. 
--HG--
extra : convert_revision : 45e52d7afbf74e0ddde11f58aeb084186389fc06
 2006-10-31 16:59:41 -05:00
Gabe Black
ace4f0c188 Made the old name refer to the miscreg index to prevent having to change code all over the place. 
--HG--
extra : convert_revision : e890a3ce420336acdb220396dcbf66d4b9974c76
 2006-10-31 16:36:45 -05:00
Gabe Black
44f2c05118 Forgot to change the index. 
--HG--
extra : convert_revision : 5a444e635d20bcca445a10e43592b6c10d25e879
 2006-10-31 16:18:54 -05:00
Gabe Black
ece796ab8a Make the IPRs use regular miscreg indexes, and make a table or two to find the miscreg index of a specific IPR. 
--HG--
extra : convert_revision : dd235261e7086d6667b1b2bdc4a81b2573e21d53
 2006-10-31 16:02:28 -05:00