Moved the Alpha float regfile into it's own regfile and got rid of constants.hh and isa_traits.cc

--HG--
extra : convert_revision : 55afd7d21c276906520da375b3bbb563be420880

src/arch/alpha/SConscript

@@ -48,27 +48,29 @@ Import('env')
 # Base sources used by all configurations.
 base_sources = Split('''
 	faults.cc
-	isa_traits.cc
-	miscregfile.cc
+	floatregfile.cc
 	intregfile.cc
+	miscregfile.cc
+	regfile.cc
 	''')
 
 # Full-system sources
 full_system_sources = Split('''
-	tlb.cc
 	arguments.cc
 	ev5.cc
+	freebsd/system.cc
 	idle_event.cc
 	ipr.cc
 	kernel_stats.cc
+	linux/system.cc
 	osfpal.cc
+	pagetable.cc
 	stacktrace.cc
-	vtophys.cc
 	remote_gdb.cc
 	system.cc
-	freebsd/system.cc
-	linux/system.cc
+	tlb.cc
 	tru64/system.cc
+	vtophys.cc
 	''')
 
 

src/arch/alpha/floatregfile.cc

@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2003-2005 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Steve Reinhardt
+ *          Gabe Black
+ *          Kevin Lim
+ */
+
+#include "arch/alpha/floatregfile.hh"
+#include "sim/serialize.hh"
+
+namespace AlphaISA
+{
+    void
+    FloatRegFile::serialize(std::ostream &os)
+    {
+        SERIALIZE_ARRAY(q, NumFloatRegs);
+    }
+
+    void
+    FloatRegFile::unserialize(Checkpoint *cp, const std::string &section)
+    {
+        UNSERIALIZE_ARRAY(q, NumFloatRegs);
+    }
+}

src/arch/alpha/floatregfile.hh

@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2003-2005 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Steve Reinhardt
+ *          Gabe Black
+ */
+
+#ifndef __ARCH_ALPHA_FLOATREGFILE_HH__
+#define __ARCH_ALPHA_FLOATREGFILE_HH__
+
+#include "arch/alpha/isa_traits.hh"
+#include "arch/alpha/types.hh"
+
+#include <string.h>
+#include <iostream>
+
+class Checkpoint;
+
+namespace AlphaISA
+{
+    class FloatRegFile
+    {
+      public:
+
+        union {
+            uint64_t q[NumFloatRegs];	// integer qword view
+            double d[NumFloatRegs];	// double-precision floating point view
+        };
+
+        void serialize(std::ostream &os);
+
+        void unserialize(Checkpoint *cp, const std::string &section);
+
+        void clear()
+        { bzero(d, sizeof(d)); }
+    };
+}
+
+#endif

src/arch/alpha/pagetable.cc

@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2006 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#include "arch/alpha/pagetable.hh"
+#include "sim/serialize.hh"
+
+namespace AlphaISA
+{
+    void
+    PTE::serialize(std::ostream &os)
+    {
+        SERIALIZE_SCALAR(tag);
+        SERIALIZE_SCALAR(ppn);
+        SERIALIZE_SCALAR(xre);
+        SERIALIZE_SCALAR(xwe);
+        SERIALIZE_SCALAR(asn);
+        SERIALIZE_SCALAR(asma);
+        SERIALIZE_SCALAR(fonr);
+        SERIALIZE_SCALAR(fonw);
+        SERIALIZE_SCALAR(valid);
+    }
+
+    void
+    PTE::unserialize(Checkpoint *cp, const std::string &section)
+    {
+        UNSERIALIZE_SCALAR(tag);
+        UNSERIALIZE_SCALAR(ppn);
+        UNSERIALIZE_SCALAR(xre);
+        UNSERIALIZE_SCALAR(xwe);
+        UNSERIALIZE_SCALAR(asn);
+        UNSERIALIZE_SCALAR(asma);
+        UNSERIALIZE_SCALAR(fonr);
+        UNSERIALIZE_SCALAR(fonw);
+        UNSERIALIZE_SCALAR(valid);
+    }
+}

src/arch/alpha/regfile.cc

@@ -0,0 +1,101 @@
+/*
+ * Copyright (c) 2003-2005 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Steve Reinhardt
+ *          Gabe Black
+ *          Kevin Lim
+ */
+
+#include "arch/alpha/regfile.hh"
+#include "cpu/thread_context.hh"
+
+namespace AlphaISA
+{
+    void
+    RegFile::serialize(std::ostream &os)
+    {
+        intRegFile.serialize(os);
+        floatRegFile.serialize(os);
+        miscRegFile.serialize(os);
+        SERIALIZE_SCALAR(pc);
+        SERIALIZE_SCALAR(npc);
+#if FULL_SYSTEM
+        SERIALIZE_SCALAR(intrflag);
+#endif
+    }
+
+    void
+    RegFile::unserialize(Checkpoint *cp, const std::string &section)
+    {
+        intRegFile.unserialize(cp, section);
+        floatRegFile.unserialize(cp, section);
+        miscRegFile.unserialize(cp, section);
+        UNSERIALIZE_SCALAR(pc);
+        UNSERIALIZE_SCALAR(npc);
+#if FULL_SYSTEM
+        UNSERIALIZE_SCALAR(intrflag);
+#endif
+    }
+
+    void
+    copyRegs(ThreadContext *src, ThreadContext *dest)
+    {
+        // First loop through the integer registers.
+        for (int i = 0; i < NumIntRegs; ++i) {
+            dest->setIntReg(i, src->readIntReg(i));
+        }
+
+        // Then loop through the floating point registers.
+        for (int i = 0; i < TheISA::NumFloatRegs; ++i) {
+            dest->setFloatRegBits(i, src->readFloatRegBits(i));
+        }
+
+        // Copy misc. registers
+        copyMiscRegs(src, dest);
+
+        // Lastly copy PC/NPC
+        dest->setPC(src->readPC());
+        dest->setNextPC(src->readNextPC());
+    }
+
+    void
+    copyMiscRegs(ThreadContext *src, ThreadContext *dest)
+    {
+        dest->setMiscReg(AlphaISA::MISCREG_FPCR,
+                src->readMiscReg(AlphaISA::MISCREG_FPCR));
+        dest->setMiscReg(AlphaISA::MISCREG_UNIQ,
+                src->readMiscReg(AlphaISA::MISCREG_UNIQ));
+        dest->setMiscReg(AlphaISA::MISCREG_LOCKFLAG,
+                src->readMiscReg(AlphaISA::MISCREG_LOCKFLAG));
+        dest->setMiscReg(AlphaISA::MISCREG_LOCKADDR,
+                src->readMiscReg(AlphaISA::MISCREG_LOCKADDR));
+
+#if FULL_SYSTEM
+        copyIprs(src, dest);
+#endif
+    }
+}