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Merge 141.212.106.238:/home/gblack/m5/newmemmemops

Browse source 
into  zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/m5/newmem

--HG--
extra : convert_revision : cda58e6e63f2f909b85a510fb76d35d49d8042b9
This commit is contained in:
Gabe Black 2006-11-14 01:31:37 -05:00
parent 8d234a4bc5 20730b790c
commit 7632198a6e
4 changed files with 49 additions and 21 deletions
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11
src/arch/sparc/faults.cc
View file

@ -593,7 +593,16 @@ void PowerOnReset::invoke(ThreadContext * tc)
tc->setMiscReg(MISCREG_PSTATE, 1 << 4);
//Turn on red and hpriv, set everything else to 0
tc->setMiscReg(MISCREG_HPSTATE, (1 << 5) | (1 << 2));
MiscReg HPSTATE = tc->readMiscReg(MISCREG_HPSTATE);
//HPSTATE.red = 1
HPSTATE |= (1 << 5);
//HPSTATE.hpriv = 1
HPSTATE |= (1 << 2);
//HPSTATE.ibe = 0
HPSTATE &= ~(1 << 10);
//HPSTATE.tlz = 0
HPSTATE &= ~(1 << 0);
tc->setMiscReg(MISCREG_HPSTATE, HPSTATE);
//The tick register is unreadable by nonprivileged software
tc->setMiscReg(MISCREG_TICK, 1ULL << 63);

37
src/arch/sparc/isa/formats/mem/util.isa
View file

@ -76,23 +76,26 @@ output decoder {{
{
std::stringstream response;
bool load = flags[IsLoad];
bool save = flags[IsStore];
bool store = flags[IsStore];
printMnemonic(response, mnemonic);
if(save)
if(store)
{
printReg(response, _srcRegIdx[0]);
printReg(response, _srcRegIdx[0]);
ccprintf(response, ", ");
}
ccprintf(response, "[ ");
printReg(response, _srcRegIdx[!save ? 0 : 1]);
ccprintf(response, " + ");
printReg(response, _srcRegIdx[!save ? 1 : 2]);
ccprintf(response, " ]");
ccprintf(response, "[");
if(_srcRegIdx[!store ? 0 : 1] != 0)
{
printSrcReg(response, !store ? 0 : 1);
ccprintf(response, " + ");
}
printSrcReg(response, !store ? 1 : 2);
ccprintf(response, "]");
if(load)
{
ccprintf(response, ", ");
printReg(response, _destRegIdx[0]);
printReg(response, _destRegIdx[0]);
}
return response.str();
@ -108,19 +111,23 @@ output decoder {{
printMnemonic(response, mnemonic);
if(save)
{
printReg(response, _srcRegIdx[0]);
printReg(response, _srcRegIdx[0]);
ccprintf(response, ", ");
}
ccprintf(response, "[ ");
printReg(response, _srcRegIdx[!save ? 0 : 1]);
ccprintf(response, "[");
if(_srcRegIdx[!save ? 0 : 1] != 0)
{
printReg(response, _srcRegIdx[!save ? 0 : 1]);
ccprintf(response, " + ");
}
if(imm >= 0)
ccprintf(response, " + 0x%x ]", imm);
ccprintf(response, "0x%x]", imm);
else
ccprintf(response, " + -0x%x ]", -imm);
ccprintf(response, "-0x%x]", -imm);
if(load)
{
ccprintf(response, ", ");
printReg(response, _destRegIdx[0]);
printReg(response, _destRegIdx[0]);
}
return response.str();

19
src/arch/sparc/isa/formats/priv.isa
View file

@ -153,8 +153,13 @@ output decoder {{
printMnemonic(response, mnemonic);
ccprintf(response, " ");
printSrcReg(response, 0);
ccprintf(response, ", ");
//If the first reg is %g0, don't print it.
//This improves readability
if(_srcRegIdx[0] != 0)
{
printSrcReg(response, 0);
ccprintf(response, ", ");
}
printSrcReg(response, 1);
ccprintf(response, ", %%%s", regName);
@ -169,8 +174,14 @@ output decoder {{
printMnemonic(response, mnemonic);
ccprintf(response, " ");
printSrcReg(response, 0);
ccprintf(response, ", 0x%x, %%%s", imm, regName);
//If the first reg is %g0, don't print it.
//This improves readability
if(_srcRegIdx[0] != 0)
{
printSrcReg(response, 0);
ccprintf(response, ", ");
}
ccprintf(response, "0x%x, %%%s", imm, regName);
return response.str();
}

3
src/arch/sparc/miscregfile.cc
View file

@ -88,7 +88,8 @@ void MiscRegFile::reset()
otherwin = 0;
wstate = 0;
gl = 0;
hpstate = 0;
//In a T1, bit 11 is apparently always 1
hpstate = (1 << 11);
memset(htstate, 0, sizeof(htstate));
hintp = 0;
htba = 0;