From 6b95f24145d363ab72d26bf74a4ddb43ba9f9835 Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Tue, 14 Nov 2006 01:28:11 -0500
Subject: [PATCH 1/3] Fix up the disassembly a little.

--HG--
extra : convert_revision : 7bdf68f445b79b1b5dbcdfa5fa1005c68d03724c
---
 src/arch/sparc/isa/formats/mem/util.isa | 37 +++++++++++++++----------
 src/arch/sparc/isa/formats/priv.isa     | 19 ++++++++++---
 2 files changed, 37 insertions(+), 19 deletions(-)

diff --git a/src/arch/sparc/isa/formats/mem/util.isa b/src/arch/sparc/isa/formats/mem/util.isa
index 00360aa43..857f37160 100644
--- a/src/arch/sparc/isa/formats/mem/util.isa
+++ b/src/arch/sparc/isa/formats/mem/util.isa
@@ -76,23 +76,26 @@ output decoder {{
         {
             std::stringstream response;
             bool load = flags[IsLoad];
-            bool save = flags[IsStore];
+            bool store = flags[IsStore];
 
             printMnemonic(response, mnemonic);
-            if(save)
+            if(store)
             {
-                    printReg(response, _srcRegIdx[0]);
+                printReg(response, _srcRegIdx[0]);
                 ccprintf(response, ", ");
             }
-            ccprintf(response, "[ ");
-            printReg(response, _srcRegIdx[!save ? 0 : 1]);
-            ccprintf(response, " + ");
-            printReg(response, _srcRegIdx[!save ? 1 : 2]);
-            ccprintf(response, " ]");
+            ccprintf(response, "[");
+            if(_srcRegIdx[!store ? 0 : 1] != 0)
+            {
+                printSrcReg(response, !store ? 0 : 1);
+                ccprintf(response, " + ");
+            }
+            printSrcReg(response, !store ? 1 : 2);
+            ccprintf(response, "]");
             if(load)
             {
                 ccprintf(response, ", ");
-                    printReg(response, _destRegIdx[0]);
+                printReg(response, _destRegIdx[0]);
             }
 
             return response.str();
@@ -108,19 +111,23 @@ output decoder {{
             printMnemonic(response, mnemonic);
             if(save)
             {
-                    printReg(response, _srcRegIdx[0]);
+                printReg(response, _srcRegIdx[0]);
                 ccprintf(response, ", ");
             }
-            ccprintf(response, "[ ");
-            printReg(response, _srcRegIdx[!save ? 0 : 1]);
+            ccprintf(response, "[");
+            if(_srcRegIdx[!save ? 0 : 1] != 0)
+            {
+                printReg(response, _srcRegIdx[!save ? 0 : 1]);
+                ccprintf(response, " + ");
+            }
             if(imm >= 0)
-                ccprintf(response, " + 0x%x ]", imm);
+                ccprintf(response, "0x%x]", imm);
             else
-                ccprintf(response, " + -0x%x ]", -imm);
+                ccprintf(response, "-0x%x]", -imm);
             if(load)
             {
                 ccprintf(response, ", ");
-                    printReg(response, _destRegIdx[0]);
+                printReg(response, _destRegIdx[0]);
             }
 
             return response.str();
diff --git a/src/arch/sparc/isa/formats/priv.isa b/src/arch/sparc/isa/formats/priv.isa
index 94a68aebe..3d47ca02f 100644
--- a/src/arch/sparc/isa/formats/priv.isa
+++ b/src/arch/sparc/isa/formats/priv.isa
@@ -153,8 +153,13 @@ output decoder {{
             printMnemonic(response, mnemonic);
 
             ccprintf(response, " ");
-            printSrcReg(response, 0);
-            ccprintf(response, ", ");
+            //If the first reg is %g0, don't print it.
+            //This improves readability
+            if(_srcRegIdx[0] != 0)
+            {
+                printSrcReg(response, 0);
+                ccprintf(response, ", ");
+            }
             printSrcReg(response, 1);
             ccprintf(response, ", %%%s", regName);
 
@@ -169,8 +174,14 @@ output decoder {{
             printMnemonic(response, mnemonic);
 
             ccprintf(response, " ");
-            printSrcReg(response, 0);
-            ccprintf(response, ", 0x%x, %%%s", imm, regName);
+            //If the first reg is %g0, don't print it.
+            //This improves readability
+            if(_srcRegIdx[0] != 0)
+            {
+                printSrcReg(response, 0);
+                ccprintf(response, ", ");
+            }
+            ccprintf(response, "0x%x, %%%s", imm, regName);
 
             return response.str();
         }

From c2ceaa887e07a219b16423d8f9c20624785ee4a1 Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Tue, 14 Nov 2006 01:29:11 -0500
Subject: [PATCH 2/3] Make sure a POR doesn't clobber the value of the hpstate.

--HG--
extra : convert_revision : 4504f08fd94792819bd4419bbd2e0ebd1d7f29e9
---
 src/arch/sparc/faults.cc | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/src/arch/sparc/faults.cc b/src/arch/sparc/faults.cc
index 4cf411d3b..3ec41ba61 100644
--- a/src/arch/sparc/faults.cc
+++ b/src/arch/sparc/faults.cc
@@ -593,7 +593,16 @@ void PowerOnReset::invoke(ThreadContext * tc)
     tc->setMiscReg(MISCREG_PSTATE, 1 << 4);
 
     //Turn on red and hpriv, set everything else to 0
-    tc->setMiscReg(MISCREG_HPSTATE, (1 << 5) | (1 << 2));
+    MiscReg HPSTATE = tc->readMiscReg(MISCREG_HPSTATE);
+    //HPSTATE.red = 1
+    HPSTATE |= (1 << 5);
+    //HPSTATE.hpriv = 1
+    HPSTATE |= (1 << 2);
+    //HPSTATE.ibe = 0
+    HPSTATE &= ~(1 << 10);
+    //HPSTATE.tlz = 0
+    HPSTATE &= ~(1 << 0);
+    tc->setMiscReg(MISCREG_HPSTATE, HPSTATE);
 
     //The tick register is unreadable by nonprivileged software
     tc->setMiscReg(MISCREG_TICK, 1ULL << 63);

From 20730b790c98bfb29d1f57911b32610af4d6e35b Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Tue, 14 Nov 2006 01:30:34 -0500
Subject: [PATCH 3/3] Set hpstate to be what I'm assuming Legion is.

--HG--
extra : convert_revision : 0be66513cb0cff07c0c2b50c97c1ea74d52b0dc9
---
 src/arch/sparc/miscregfile.cc | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/arch/sparc/miscregfile.cc b/src/arch/sparc/miscregfile.cc
index d52e3983f..d9d7f4411 100644
--- a/src/arch/sparc/miscregfile.cc
+++ b/src/arch/sparc/miscregfile.cc
@@ -88,7 +88,8 @@ void MiscRegFile::reset()
     otherwin = 0;
     wstate = 0;
     gl = 0;
-    hpstate = 0;
+    //In a T1, bit 11 is apparently always 1
+    hpstate = (1 << 11);
     memset(htstate, 0, sizeof(htstate));
     hintp = 0;
     htba = 0;