gem5/src/arch
Gabe Black 1ffff78ca9 Created seperate SConscript for the dev directory. Made subdirectories for Alpha and SPARC and put SConscripts in them.
--HG--
rename : src/base/kgdb.h => src/arch/alpha/kgdb.h
rename : src/dev/alpha_access.h => src/dev/alpha/access.h
rename : src/dev/alpha_console.cc => src/dev/alpha/console.cc
rename : src/dev/alpha_console.hh => src/dev/alpha/console.hh
extra : convert_revision : a7dd466308cb83edc40528689aacb72413089cdf
2006-11-06 18:26:11 -05:00
..
alpha Created seperate SConscript for the dev directory. Made subdirectories for Alpha and SPARC and put SConscripts in them. 2006-11-06 18:26:11 -05:00
mips Adjustments for the AlphaTLB changing to AlphaISA::TLB and changing register file functions to not take faults 2006-11-01 16:44:45 -05:00
sparc Make things compile in SE again. 2006-11-03 14:42:12 -05:00
isa_parser.py Change the default function from setMiscRegWithEffect to setMiscReg 2006-10-26 20:22:23 -04:00
isa_specific.hh Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
SConscript Add a new file which describes an ISA's interrupt handling mechanism. It records when interrupts are requested, and returns an interrupt to execute if the 2006-11-03 02:25:39 -05:00