Commit graph

8245 commits

Author SHA1 Message Date
Steve Reinhardt 41680f4bad Change default regression build from 'fast' to 'opt' 2011-04-20 13:47:42 -07:00
Brad Danofsky 46a538ceab stats: add user settable separator string for arrayed stats
Default is '::', so no visible change unless it is overridden
2011-04-20 11:14:52 -07:00
Brad Danofsky dd38b4b83e scons: Allow the build directory live under an EXTRAS directory 2011-04-20 11:14:51 -07:00
Nathan Binkert 8c1563096c tests: update stats for name changes 2011-04-19 18:45:23 -07:00
Nathan Binkert 63371c8664 stats: rename stats so they can be used as python expressions 2011-04-19 18:45:21 -07:00
Nathan Binkert 615c5e0eaa python: different import for dealing with demandimport 2011-04-19 11:13:01 -07:00
Nathan Binkert ddb0f1bca0 style: fix all_regions code and remove bogus region type 2011-04-17 14:21:04 -07:00
Nathan Binkert 6402721d8e style: remove extra debugging print 2011-04-17 13:57:40 -07:00
Nathan Binkert a2889ef16d file_types: Make code work in Python 2.4 2011-04-17 13:57:03 -07:00
Nathan Binkert 915f49ae92 unittest: Make unit tests capable of using swig and python, convert stattest 2011-04-15 10:45:11 -07:00
Nathan Binkert 8c97726266 python: cleanup python code so stuff doesn't automatically happen at startup
this allows things to be overridden at startup (e.g. for tests)
2011-04-15 10:44:59 -07:00
Nathan Binkert 3182913e94 scons: make a flexible system for guarding source files
This is similar to guards on mercurial queues and they're used for selecting
which files are compiled into some given object.  We already do something
similar, but it's mostly hard coded for the m5 binary and the m5 library
and I'd like to make it more flexible to better support the unittests
2011-04-15 10:44:44 -07:00
Nathan Binkert eddac53ff6 trace: reimplement the DTRACE function so it doesn't use a vector
At the same time, rename the trace flags to debug flags since they
have broader usage than simply tracing.  This means that
--trace-flags is now --debug-flags and --trace-help is now --debug-help
2011-04-15 10:44:32 -07:00
Nathan Binkert f946d7bcdb debug: create a Debug namespace 2011-04-15 10:44:15 -07:00
Nathan Binkert bbb1392c08 includes: fix up code after sorting 2011-04-15 10:44:14 -07:00
Nathan Binkert 39a055645f includes: sort all includes 2011-04-15 10:44:06 -07:00
Nathan Binkert 50fda09ac7 style: add sort_includes to the style hook 2011-04-15 10:43:51 -07:00
Nathan Binkert 5add771e85 style: move style verifiers into classes 2011-04-15 10:43:47 -07:00
Nathan Binkert 2d5e1de4d9 style: add a user interface wrapper class
makes things work both with mercurial and stand alone with stdio
2011-04-15 10:43:30 -07:00
Nathan Binkert e5ecfde222 util: python implementation of a routine that will sort includes
I didn't realize that the perl version existed when I started this,
this version has a lot more features than the previous one since it will
sort and separate python, system, and m5 headers in separate groups, it
will remove duplicates, it will also convert c headers to stl headers
2011-04-15 10:43:06 -07:00
Nathan Binkert 07815c3379 region: add a utility class for keeping track of regions of some range
This is basically like the range_map stuff in src/base (range already
exists in Python).  This code is like a set of ranges.  I'm using it
to keep track of changed lines in source code, but it could be use to
keep track of memory ranges and holes in memory regions.  It could
also be used in memory allocation type stuff.  (Though it's not at all
optimized.)
2011-04-15 10:42:32 -07:00
Nathan Binkert 12446e9659 SortedDict: add functions for getting ranges of keys, values, items 2011-04-15 10:38:02 -07:00
Nathan Binkert 1f7f79781e python: figure out if the m5.internal package exists even with demandimport 2011-04-15 10:37:28 -07:00
Nathan Binkert 3c78005c1e refcnt: Update doxygen comments 2011-04-13 09:32:19 -07:00
Nathan Binkert e748d921fd refcnt: Inline comparison functions 2011-04-13 09:32:18 -07:00
Nathan Binkert 9d94d48a7d main: separate out interact() so it can be used by other functions 2011-04-13 09:32:18 -07:00
Nathan Binkert 326adda5f3 util: fix the language type function 2011-04-13 09:32:17 -07:00
Ali Saidi d50d0152d0 ARM: Fix stats for ARM_SE checkpoint restore fix.
Register reads/writes done in startup() count against the stats while they
don't count if done in initState().
2011-04-12 16:09:20 -04:00
Ali Saidi 4b61abe8da ARM: Fix checkpoint restoration in ARM_SE. 2011-04-10 21:02:28 -04:00
Ali Saidi b9dc954d89 ARM: Get rid of some comments/todos that no longer apply. 2011-04-10 21:02:28 -04:00
Brad Beckmann 95faf1904b ruby: fixes to support more types of RubyRequests 2011-04-06 14:41:41 -07:00
Ali Saidi afa897403d ARM: Update stats for default inclusion of CF adapter. 2011-04-04 11:42:32 -05:00
Ali Saidi d6289507d8 ARM: Include IDE/CF controller by default in PBX model.
Frame buffer and boot linux:
./build/ARM_FS/m5.opt configs/example/fs.py --benchmark=ArmLinuxFrameBuf --kernel=vmlinux.touchkit
Linux from a CF card:
./build/ARM_FS/m5.opt configs/example/fs.py --benchmark=ArmLinuxCflash --kernel=vmlinux.touchkit
Run Android
./build/ARM_FS/m5.opt configs/example/fs.py --benchmark=ArmAndroid --kernel=vmlinux.android
Run MP
./build/ARM_FS/m5.opt configs/example/fs.py --benchmark=ArmLinuxCflash --kernel=vmlinux.mp-2.6.38
2011-04-04 11:42:31 -05:00
Anthony Gutierrez 332adcdd1a Sim: Fix Simulation.py to allow more than 1 core for standard switching.
This patch moves the assignment of testsys.switch_cpus, testsys.switch_cpus_1,
switch_cpu_list, and switch_cpu_list1 outside of the for loop so they are
assigned only once, after switch_cpus and switch_cpus_1 are constructed.
2011-04-04 11:42:31 -05:00
Ali Saidi b20e92e1ca ARM: Update stats for previous changes. 2011-04-04 11:42:31 -05:00
Ali Saidi 8af1eeec6f ARM: Use CPU local lock before sending load to mem system.
This change uses the locked_mem.hh header to handle implementing CLREX. It
simplifies the current implementation greatly.
2011-04-04 11:42:29 -05:00
Ali Saidi 6b69890493 ARM: Fix checkpoint restoration into O3 CPU and the way O3 switchCpu works.
This change fixes a small bug in the arm copyRegs() code where some registers
wouldn't be copied if the processor was in a mode other than MODE_USER.
Additionally, this change simplifies the way the O3 switchCpu code works by
utilizing TheISA::copyRegs() to copy the required context information
rather than the adhoc copying that goes on in the CPU model. The current code
makes assumptions about the visibility of int and float registers that aren't
true for all architectures in FS mode.
2011-04-04 11:42:28 -05:00
Ali Saidi f926fa7711 ARM: Fix bug in MicroLdrNeon templates for initiateAcc(). 2011-04-04 11:42:28 -05:00
William Wang 16fcad3907 ARM: Cleanup and small fixes to some NEON ops to match the spec.
Only certain bits of the cpacr can be written, some must be equal.
Mult instructions that write the same register should do something sane
2011-04-04 11:42:28 -05:00
Ali Saidi a679cd917a ARM: Cleanup implementation of ITSTATE and put important code in PCState.
Consolidate all code to handle ITSTATE in the PCState object rather than
touching a variety of structures/objects.
2011-04-04 11:42:28 -05:00
Ali Saidi ac650199ee ARM: Fix m5op parameters bug.
All the m5op parameters are 64 bits, but we were only sending 32 bits;
and the static register indexes were incorrectly specified.
2011-04-04 11:42:28 -05:00
Ali Saidi be096f91b9 ARM: Tag appropriate instructions as IsReturn 2011-04-04 11:42:27 -05:00
Ali Saidi 55920a5ca7 ARM: Fix table walk going on while ASID changes error 2011-04-04 11:42:27 -05:00
Ali Saidi 5962fecc1d CPU: Remove references to memory copy operations 2011-04-04 11:42:26 -05:00
Ali Saidi 1114be4b78 O3: Update stats for memory order violation checking patch. 2011-04-04 11:42:25 -05:00
Ali Saidi 7dde557fdc O3: Tighten memory order violation checking to 16 bytes.
The comment in the code suggests that the checking granularity should be 16
bytes, however in reality the shift by 8 is 256 bytes which seems much
larger than required.
2011-04-04 11:42:23 -05:00
Ali Saidi ee489a541a IDE: Support x86, Alpha, and ARM use of the IDE controller. 2011-04-04 11:42:23 -05:00
Ali Saidi c56eb8fb3c ARM: Fix checkpointing case where PL111 is powered off. 2011-04-04 11:42:23 -05:00
Ali Saidi 6fd271ffb3 ARM: Remove debugging warn that was accidently left in. 2011-04-04 11:42:23 -05:00
Ali Saidi dfdabbd751 ARM: Fix multiplication error in udelay 2011-04-04 11:42:23 -05:00