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Author SHA1 Message Date
Ron Dreslinski
a00e13b1fe Merge zizzer:/bk/newmem 
into  zazzer.eecs.umich.edu:/z/rdreslin/m5bk/newmemcleanest

--HG--
extra : convert_revision : 1fc55d7d5707bb7c63790aab306ca5ea8ade5fab
 2006-11-17 22:01:18 -05:00
Ron Dreslinski
cd0b65508e Make an initialization pass for the thread context and set the [phys,virt]Port correctly 
src/cpu/simple/atomic.cc:
src/cpu/simple/timing.cc:
    Call the thread context initialization

--HG--
extra : convert_revision : d7dc2a8b893dc670077b7f6150d4b710a1778620
 2006-11-17 21:55:28 -05:00
Nathan Binkert
f028865d35 add warn_once which will print any given warning message 
only once.

--HG--
extra : convert_revision : b64bb495c1bd0c4beb3db6ca28fad5af4d05ef8e
 2006-11-16 13:18:21 -08:00
Nathan Binkert
bd8cc37650 Implement a single config file to encompass all of the SPEC 
CPU2000 stuff, and use it in all of the tests that currently
use SPEC

--HG--
extra : convert_revision : 8cd26a597e51a90b6d2810d344a075f5aa0f011b
 2006-11-16 13:10:38 -08:00
Nathan Binkert
4c2e65c94e implement RUSAGE_CHILDREN for getrusage since it's trivial 
--HG--
extra : convert_revision : bc12b3b2e9ee02f42c437cbc20680ea00e19a801
 2006-11-16 13:08:29 -08:00
Nathan Binkert
31d829d388 Implement current working directory for LiveProcesses 
--HG--
extra : convert_revision : a2d3cf29ab65c61af27d82a8c421a41a19fd5aeb
 2006-11-16 12:43:11 -08:00
Gabe Black
74654ddd1f Merge zower.eecs.umich.edu:/home/gblack/m5/newmemmemops 
into  zower.eecs.umich.edu:/eecshome/m5/newmem

--HG--
extra : convert_revision : 74b2352b8f088e38cd1ecf3a8233b45df0476d93
 2006-11-16 14:42:44 -05:00
Gabe Black
14ebaa1ecc Merge zizzer.eecs.umich.edu:/bk/newmem/ 
into  zower.eecs.umich.edu:/home/gblack/m5/newmemmemops

--HG--
extra : convert_revision : c49b760eac758dbde30867cb638fcb3b790f4721
 2006-11-16 14:41:56 -05:00
Gabe Black
cd5b33b9ff Fixes for SPARC_FS 
configs/common/FSConfig.py:
    Make a SPARC system create an IO bus.
src/python/m5/objects/T1000.py:
    Create a T1000 platform
src/arch/sparc/miscregfile.cc:
    Initialize the strand status register to the value legion provides.
src/cpu/exetrace.cc:
    Truncate an ExtMachInst to a MachInst before comparing with Legion.

--HG--
extra : convert_revision : e4189b572a5297e8362f5bd26d87b74736c8e5f1
 2006-11-16 12:34:10 -05:00
Ron Dreslinski
dbdf2f14ae Add L2 cache option to fs.py --l2cache 
--HG--
extra : convert_revision : 5bdd1129c3b23e91d441e7b83f6a824ef7740fab
 2006-11-15 18:22:15 -05:00
Ron Dreslinski
4fbbb74a5c Merge zizzer:/bk/newmem 
into  zazzer.eecs.umich.edu:/z/rdreslin/m5bk/newmemcleanest

--HG--
extra : convert_revision : 8d61b474428d494b1a5382e4cf95934ad54e35dd
 2006-11-14 18:41:37 -05:00
Kevin Lim
069c7c30d1 Various fixes to delete packet and request a little better. 
src/cpu/simple/timing.cc:
    Various updates for deleting requests more properly.

    The major change is moving the deletion of the fetch request/packet to after the instruction has executed and completed.  This should fix a few bugs because Ron's memory system didn't expect a call for a functional access while a timing access was being processed.

--HG--
extra : convert_revision : c7cf114bb1ff3cdaa7b0a40ed4c5302dc9d3a522
 2006-11-14 17:22:32 -05:00
Ron Dreslinski
7cd05a998d Merge zizzer:/bk/newmem 
into  zazzer.eecs.umich.edu:/z/rdreslin/m5bk/newmemcleanest

--HG--
extra : convert_revision : b216fcdb2632dce68ac18932b0c13408eb1aeaf4
 2006-11-14 17:19:57 -05:00
Ron Dreslinski
c32f3056f9 Fix bugs around uni-coherence invalidates being propogated properly. 
src/mem/bus.cc:
    Make it so that invalidates being sent from the responder up don't call the responder
    but they should also not Panic.
src/mem/packet.hh:
    If we don't have data in the packet, don't call deleteData:
    Example: InvalidateRequests never have data.

--HG--
extra : convert_revision : 18766bc9f3bb4d852ac651d094254d347abd1634
 2006-11-14 17:15:05 -05:00
Gabe Black
ac2c7967f6 Merge zizzer.eecs.umich.edu:/bk/newmem/ 
into  zeep.eecs.umich.edu:/home/gblack/m5/newmemmemops

--HG--
extra : convert_revision : 966246877ac1f1e6c2675d413b0b405cccfecbeb
 2006-11-14 15:23:23 -05:00
Gabe Black
079dd45417 Merge 141.212.106.238:/home/gblack/m5/newmemmemops 
into  zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/m5/newmem

--HG--
extra : convert_revision : 8e805b9bbd5c64c2e5951384b3c6ef712062d08c
 2006-11-14 15:14:28 -05:00
Gabe Black
bc4d15ddd1 Create a stub t1000 platform. 
--HG--
extra : convert_revision : 7e27b23b66c743b4625a1dd9d8d6ba61bff45168
 2006-11-14 15:14:27 -05:00
Lisa Hsu
2f6a9454d1 Merge zizzer:/bk/newmem 
into  zed.eecs.umich.edu:/z/hsul/work/sparc/m5

--HG--
extra : convert_revision : 6abd919711966eaaa157483557a3f953b02dde01
 2006-11-14 13:00:05 -05:00
Lisa Hsu
ee777f35c2 interrupts.hh: 
make a likewise updateIntrInfo for Sparc that's blank so it doesn't fart on build

src/arch/sparc/interrupts.hh:
    make a likewise updateIntrInfo for Sparc that's blank so it doesn't fart on build

--HG--
extra : convert_revision : 5f469d0cf897479b42703104cd801a8ef923fcae
 2006-11-14 12:59:57 -05:00
Ron Dreslinski
21dc65bc47 If all the targets aren't satisfied, reinitialize the packet. 
--HG--
extra : convert_revision : 5b0a977a162a1b881b97a3185fb386cc76632a4a
 2006-11-14 10:09:13 -05:00
Ron Dreslinski
8155e61a60 Update atomic and functional paths for snoops as well 
--HG--
extra : convert_revision : 566d73438efb87ca683e4dee23454d880db3dfc7
 2006-11-14 01:38:42 -05:00
Gabe Black
7632198a6e Merge 141.212.106.238:/home/gblack/m5/newmemmemops 
into  zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/m5/newmem

--HG--
extra : convert_revision : cda58e6e63f2f909b85a510fb76d35d49d8042b9
 2006-11-14 01:31:37 -05:00
Gabe Black
20730b790c Set hpstate to be what I'm assuming Legion is. 
--HG--
extra : convert_revision : 0be66513cb0cff07c0c2b50c97c1ea74d52b0dc9
 2006-11-14 01:30:34 -05:00
Gabe Black
c2ceaa887e Make sure a POR doesn't clobber the value of the hpstate. 
--HG--
extra : convert_revision : 4504f08fd94792819bd4419bbd2e0ebd1d7f29e9
 2006-11-14 01:29:11 -05:00
Gabe Black
6b95f24145 Fix up the disassembly a little. 
--HG--
extra : convert_revision : 7bdf68f445b79b1b5dbcdfa5fa1005c68d03724c
 2006-11-14 01:28:11 -05:00
Gabe Black
8d234a4bc5 Merge 141.212.106.238:/home/gblack/m5/newmemmemops 
into  zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/m5/newmem

--HG--
extra : convert_revision : 753831a9f6f79d07e6ee122ab894e24161d2e722
 2006-11-14 01:23:59 -05:00
Ron Dreslinski
ac309071af Update phase param in the .py file for the cpus 
--HG--
extra : convert_revision : cd2eb8c00adcb34b8693a4d1a66187927c0f6803
 2006-11-14 01:13:26 -05:00
Ron Dreslinski
4135dd48ed Update bus bridges now that snoop ranges are passed properly 
src/mem/bridge.cc:
    Update brdiges, now that snoop addresses are properly forwarded.
    Bus bridge should only handle snoops on the second phase (SNOOP_COMMIT)
src/mem/bus.cc:
src/mem/bus.hh:
    Make sure if a busBridge has access to both things that snoop and things that respond it only takes the request once

--HG--
extra : convert_revision : 26cc9ee4429be45d4476fa435e0e9a54843c2509
 2006-11-14 01:12:52 -05:00
Ron Dreslinski
7babf6b3a8 Make cpu's capable of having a phase shift 
--HG--
extra : convert_revision : 7f082ba5c1cd2445aec731950c31a877aac23a75
 2006-11-14 01:10:36 -05:00
Ron Dreslinski
903a618714 Fix a bug to handle the fact that a CPU can send Functional accesses while a sendTiming has not returned in the call stack. 
src/mem/cache/base_cache.cc:
    Sometimes a functional access comes while waiting on a outstanding packet being sent.
    This could be because Timing CPU does some post processing on the recvTiming which send functional access.
    Either the CPU should leave the pkt/req around (so They can be referenced in the mem system). Or the mem
    system should remove them from outstanding lists and reinsert them if they fail in the sendTiming.

    I did the later, eventually we should consider doing the former if that is the correct behavior.

--HG--
extra : convert_revision : be41e0d2632369dca9d7c15e96e5576d7583fe6a
 2006-11-13 22:37:22 -05:00
Ron Dreslinski
db0895084d Merge zizzer:/bk/newmem 
into  zazzer.eecs.umich.edu:/z/rdreslin/m5bk/newmemcleanest

--HG--
extra : convert_revision : 253766a17bb5e109f8ad76b3c54e443db5274ef5
 2006-11-13 21:59:50 -05:00
Ron Dreslinski
69e183941f If we didn't satisfy all targets, reset the packet we are requesting with. 
--HG--
extra : convert_revision : 736372131b046eccf3520292fb3c086dc568d918
 2006-11-13 21:34:25 -05:00
Ron Dreslinski
9b6fd56dd5 Fix some errors related to snooping and functional access in the bus 
src/mem/bus.cc:
    Only call snoop once per port, need to fix it so snoop ranges that overlap aren't added to list
    Functional accesses that call snoop and it goes to a higher bus may change the src, reset it after each snoop.

--HG--
extra : convert_revision : 7276059c798a85cb9d138ccc5531298ecd055c13
 2006-11-13 21:33:01 -05:00
Ron Dreslinski
6c5c51338d Fix problems with snoop ranges not working properly on functional accesses 
src/mem/bus.cc:
    Actually return the snoop list when asked for it.
    Don't get stuck in infinite functional loops

--HG--
extra : convert_revision : 8e6dafbd10b30d48d28b6b5d4b464e8e8f6a3ddc
 2006-11-13 19:56:34 -05:00
Ron Dreslinski
dfc82bdcfc Changes needed for a bus from CPU->L1 
src/cpu/simple/atomic.cc:
    Make the atomic cpu return 0 on snoops.

--HG--
extra : convert_revision : aad96ad36e0c764c7cfef8b0c8e97877574f5845
 2006-11-13 19:12:45 -05:00
Ron Dreslinski
356a4f9f59 Since cpus now send out snoop ranges, remove it from the cache. 
--HG--
extra : convert_revision : 82882eb131aa66eba9f281b64db21d5cbfefb1b9
 2006-11-13 19:00:50 -05:00
Ron Dreslinski
a962fc4f56 Make CPU models signal to update the snoop ranges 
--HG--
extra : convert_revision : 717b62510f28a69af99453309fbbb458359eeb2a
 2006-11-13 18:51:16 -05:00
Lisa Hsu
69623a892e main.i: 
swig still thought the default arg for simulate() was -1, make it MaxTick

--HG--
extra : convert_revision : 2bcbef7e5e5d28cf55645fdc53d43e3953b1a11c
 2006-11-13 16:18:47 -05:00
Ron Dreslinski
023fccff0e Update splash2 config files 
configs/splash2/run.py:
    Fix MaxTick for splash configs
configs/splash2/cluster.py:
    Add a config that allows clusters of CPU's to be attached to a single L1

--HG--
extra : convert_revision : 1bb0a0c5f4889316940a9858be90ae2eaa849f1a
 2006-11-13 16:09:47 -05:00
Nathan Binkert
afed455e77 Expose debugBreakCycle through swig and get rid of 
the Debug param context

--HG--
extra : convert_revision : 40e9dcfa9faedbe0c90a43f908f20a7c14ded6a4
 2006-11-13 12:20:08 -08:00
Nathan Binkert
2370e638ce Clean up comment 
--HG--
extra : convert_revision : 75c6415c49305e2f8cf7f833c66a46a4dee503ea
 2006-11-13 12:18:36 -08:00
Ali Saidi
ef5b842247 Parse CC/CXX early so that we use the correct compiler for testing dependencies/versions/libraries/etc 
--HG--
extra : convert_revision : b34ee03e44b35df30b746c4c570316db75d6ffe5
 2006-11-13 13:26:36 -05:00
Kevin Lim
fd213f7270 Merge ktlim@zizzer:/bk/newmem 
into  zamp.eecs.umich.edu:/z/ktlim2/clean/newmem-busfix

--HG--
extra : convert_revision : 6ef2249bfa3f7149830efdb42a313422090da7d7
 2006-11-13 02:49:13 -05:00
Kevin Lim
41a9196f60 More interrupt reworking. 
--HG--
extra : convert_revision : 40dfbb72c4e418c54e909c54dad5fe6ef7017cb4
 2006-11-13 02:49:03 -05:00
Steve Reinhardt
51d8c59ef8 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  vm1.(none):/home/stever/bk/newmem-head

--HG--
extra : convert_revision : faab7569deefde94c20133b2f70a8567bcaa2960
 2006-11-12 22:04:00 -08:00
Steve Reinhardt
0f633c5fee Make setRegWithEffect do something in SE mode. 
--HG--
extra : convert_revision : 88fdaa403fe6d083f8c8fc064cb0d0d6a8b8daf8
 2006-11-12 22:03:42 -08:00
Kevin Lim
4c21fab575 Change warn to DPRINTF. 
--HG--
extra : convert_revision : 746bdf92334d220158eb0eb6bf113b4dcedbb354
 2006-11-13 00:26:38 -05:00
Kevin Lim
b0db4e4dcf Update output refs. Some FS statistics will change (namely the ITB) due to the recent TLB changes. Now PAL mode accesses are counted as hits in the TLB. 
tests/quick/00.hello/ref/alpha/linux/o3-timing/config.ini:
tests/quick/00.hello/ref/alpha/linux/o3-timing/config.out:
tests/quick/00.hello/ref/alpha/linux/o3-timing/stderr:
tests/quick/00.hello/ref/alpha/linux/o3-timing/stdout:
tests/quick/00.hello/ref/alpha/linux/simple-atomic/config.ini:
tests/quick/00.hello/ref/alpha/linux/simple-atomic/config.out:
tests/quick/00.hello/ref/alpha/linux/simple-timing/config.ini:
tests/quick/00.hello/ref/alpha/linux/simple-timing/config.out:
tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.ini:
tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.out:
tests/quick/00.hello/ref/alpha/tru64/o3-timing/stderr:
tests/quick/00.hello/ref/alpha/tru64/o3-timing/stdout:
tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.ini:
tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.out:
tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.ini:
tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.out:
tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini:
tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.out:
tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/m5stats.txt:
tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/stderr:
tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/stdout:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.out:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/m5stats.txt:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.out:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/m5stats.txt:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.out:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/m5stats.txt:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.out:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/m5stats.txt:
tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.ini:
tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.out:
tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini:
tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.out:
    Update refs.

--HG--
extra : convert_revision : 6798c5753d4d7bd7b5667d59cf564012b781ce8a
 2006-11-13 00:24:22 -05:00
Kevin Lim
9e53eed88a Fix typo. 
--HG--
extra : convert_revision : 05db10e20d33302fe830d5759b8881b1233aca87
 2006-11-12 23:31:29 -05:00
Kevin Lim
8a0cbbe27b Fix for regression failure. 
src/cpu/o3/fetch_impl.hh:
    Fetch needs to make sure it isn't waiting on an Icache access.

--HG--
extra : convert_revision : b53eb58b9e5a00bdb394134586d1f84f84d1c6e1
 2006-11-12 23:30:09 -05:00