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Ron Dreslinski 903a618714 Fix a bug to handle the fact that a CPU can send Functional accesses while a sendTiming has not returned in the call stack. 
src/mem/cache/base_cache.cc:
    Sometimes a functional access comes while waiting on a outstanding packet being sent.
    This could be because Timing CPU does some post processing on the recvTiming which send functional access.
    Either the CPU should leave the pkt/req around (so They can be referenced in the mem system). Or the mem
    system should remove them from outstanding lists and reinsert them if they fail in the sendTiming.

    I did the later, eventually we should consider doing the former if that is the correct behavior.

--HG--
extra : convert_revision : be41e0d2632369dca9d7c15e96e5576d7583fe6a
2006-11-13 22:37:22 -05:00
build_opts Add o3-timing configuration for ALPHA_SE "Hello world" tests. 2006-09-01 17:59:36 -04:00
configs Update splash2 config files 2006-11-13 16:09:47 -05:00
ext New directory structure: 2006-05-22 14:29:33 -04:00
src Fix a bug to handle the fact that a CPU can send Functional accesses while a sendTiming has not returned in the call stack. 2006-11-13 22:37:22 -05:00
tests Update output refs. Some FS statistics will change (namely the ITB) due to the recent TLB changes. Now PAL mode accesses are counted as hits in the TLB. 2006-11-13 00:24:22 -05:00
util Cleaned up remnants of ivlb and ivle 2006-11-06 20:49:48 -05:00
AUTHORS AUTHORS: 2006-08-17 00:44:54 -04:00
LICENSE Remove authors from copyright. 2006-05-28 23:26:15 -04:00
README Update for 2.0 beta 1 patch 1 2006-08-25 15:17:25 -04:00
RELEASE_NOTES Update for 2.0 beta 1 patch 1 2006-08-25 15:17:25 -04:00
SConstruct Parse CC/CXX early so that we use the correct compiler for testing dependencies/versions/libraries/etc 2006-11-13 13:26:36 -05:00

README 

This is release 2.0_beta (patch 1) of the M5 simulator.

For detailed information about building the simulator and getting
started please refer to http://www.m5sim.org.

Specific pages of interest are:
http://www.m5sim.org/wiki/index.php/Compiling_M5
http://www.m5sim.org/wiki/index.php/Running_M5

Short version:

1. If you don't have SCons version 0.96.91 or newer, get it from
http://wwww.scons.org.

2. If you don't have SWIG version 1.3.28 or newer, get it from
http://wwww.swig.org.

3. In this directory, type 'scons build/ALPHA_SE/tests/debug/quick'.  This
will build the debug version of the m5 binary (m5.debug) for the Alpha
syscall emulation target, and run the quick regression tests on it.

If you have questions, please send mail to m5-users@m5sim.org

WHAT'S INCLUDED (AND NOT)
-------------------------

The basic source release includes these subdirectories:
 - m5: 
   - src: source code of the m5 simulator
   - tests: regression tests
   - ext: less-common external packages needed to build m5
   - system/alpha: source for Alpha console and PALcode

To run full-system simulations, you will need compiled console,
PALcode, and kernel binaries and one or more disk images.  These files
are collected in a separate archive, m5_system.tar.bz2.  This file
can he downloaded separately.

M5 supports Linux 2.4/2.6, FreeBSD, and the proprietary Compaq/HP
Tru64 version of Unix. We are able to distribute Linux and FreeBSD
bootdisks, but we are unable to distribute bootable disk images of
Tru64 Unix. If you have a Tru64 license and are interested in
obtaining disk images, contact us at m5-dev@eecs.umich.edu.