gem5/src/arch/arm
Brandon Potter 2367198921 syscall_emul: [PATCH 15/22] add clone/execve for threading and multiprocess simulations
Modifies the clone system call and adds execve system call. Requires allowing
processes to steal thread contexts from other processes in the same system
object and the ability to detach pieces of process state (such as MemState)
to allow dynamic sharing.
2017-02-27 14:10:15 -05:00
..
freebsd syscall_emul: [patch 5/22] remove LiveProcess class and use Process instead 2016-11-09 14:27:40 -06:00
insts style: [patch 1/22] use /r/3648/ to reorganize includes 2016-11-09 14:27:37 -06:00
isa arm: Fix DPRINTFs with arguments in the instruction declarations 2017-02-21 14:14:44 +00:00
kvm arm, kvm: remove KvmGic 2017-02-14 15:09:18 -06:00
linux syscall_emul: [PATCH 15/22] add clone/execve for threading and multiprocess simulations 2017-02-27 14:10:15 -05:00
ArmInterrupts.py sim: Include object header files in SWIG interfaces 2012-11-02 11:32:01 -05:00
ArmISA.py arm: compute ID_AA64PFR{0,1}_EL1 registers 2016-12-19 11:03:28 -06:00
ArmNativeTrace.py cpu: Put all CPU instruction tracers in a single file 2015-01-25 07:22:17 -05:00
ArmPMU.py arm: Add helper methods to setup architected PMU events 2014-10-16 05:49:42 -04:00
ArmSystem.py sim: Remove redundant export_method_cxx_predecls 2017-01-03 12:03:06 +00:00
ArmTLB.py arm: Share a port for the two table walker objects 2015-03-02 04:00:42 -05:00
ccregs.hh arm: use condition code registers for ARM ISA 2014-04-29 16:05:02 -05:00
decoder.cc isa: Add parameter to pick different decoder inside ISA 2015-10-09 14:50:54 -05:00
decoder.hh isa: Add parameter to pick different decoder inside ISA 2015-10-09 14:50:54 -05:00
faults.cc syscall_emul: [patch 13/22] add system call retry capability 2015-07-20 09:15:21 -05:00
faults.hh arm: Add AArch64 hypervisor call instruction 'hvc' 2016-08-02 10:38:02 +01:00
interrupts.cc style: [patch 1/22] use /r/3648/ to reorganize includes 2016-11-09 14:27:37 -06:00
interrupts.hh arm: Fix secure state checking in various places 2016-08-02 10:38:02 +01:00
intregs.hh arm: ISA X31 destination register fix 2014-09-03 07:42:43 -04:00
isa.cc arm: AArch64 report cache size correctly when reading CTR_EL0 2017-02-09 18:54:28 -05:00
isa.hh arm: miscreg refactoring 2016-12-19 11:03:27 -06:00
isa_device.cc arm: Add support for filtering in the PMU 2014-12-23 09:31:17 -05:00
isa_device.hh misc: Remove redundant compiler-specific defines 2015-10-12 04:07:59 -04:00
isa_traits.hh arch: Cleanup unused ISA traits constants 2014-09-03 07:42:21 -04:00
kernel_stats.hh Make commenting on close namespace brackets consistent. 2011-01-03 14:35:43 -08:00
locked_mem.hh mem, cpu: Add assertions to snoop invalidation logic 2015-08-10 11:25:52 +01:00
microcode_rom.hh arm: include missing file for arm 2009-04-21 15:40:26 -07:00
miscregs.cc arm: miscreg refactoring 2016-12-19 11:03:27 -06:00
miscregs.hh arm: update AArch{64,32} register mappings 2016-12-19 11:03:27 -06:00
mmapped_ipr.hh arch: Add support for m5ops using mmapped IPRs 2013-09-30 12:20:43 +02:00
nativetrace.cc style: [patch 1/22] use /r/3648/ to reorganize includes 2016-11-09 14:27:37 -06:00
nativetrace.hh ARM: Add vfpv3 support to native trace. 2011-05-04 20:38:26 -05:00
pagetable.hh arm: Mark uninitialized new TLB entries as not valid 2016-06-20 15:51:31 +01:00
pmu.cc arm,dev: remove PMU assertion hit on reset 2016-04-15 10:03:03 -05:00
pmu.hh misc: Remove redundant compiler-specific defines 2015-10-12 04:07:59 -04:00
process.cc syscall_emul: [PATCH 15/22] add clone/execve for threading and multiprocess simulations 2017-02-27 14:10:15 -05:00
process.hh syscall_emul: [patch 5/22] remove LiveProcess class and use Process instead 2016-11-09 14:27:40 -06:00
pseudo_inst.hh kvm, x86: Adding support for SE mode execution 2014-11-23 18:01:08 -08:00
registers.hh revert 5af8f40d8f2c 2015-07-28 01:58:04 -05:00
remote_gdb.cc style: [patch 1/22] use /r/3648/ to reorganize includes 2016-11-09 14:27:37 -06:00
remote_gdb.hh arm: remote GDB: rationalize structure of register offsets 2015-12-18 15:12:07 -06:00
SConscript style: remove trailing whitespace 2016-02-06 17:21:18 -08:00
SConsopts arm: add ARM support to M5 2009-04-05 18:53:15 -07:00
stacktrace.cc style: [patch 1/22] use /r/3648/ to reorganize includes 2016-11-09 14:27:37 -06:00
stacktrace.hh arch: Use const StaticInstPtr references where possible 2014-09-27 09:08:36 -04:00
stage2_lookup.cc style: [patch 1/22] use /r/3648/ to reorganize includes 2016-11-09 14:27:37 -06:00
stage2_lookup.hh sim: Move the BaseTLB to src/arch/generic/ 2015-02-11 10:23:27 -05:00
stage2_mmu.cc sim: Decouple draining from the SimObject hierarchy 2015-07-07 09:51:05 +01:00
stage2_mmu.hh sim: Decouple draining from the SimObject hierarchy 2015-07-07 09:51:05 +01:00
system.cc style: [patch 1/22] use /r/3648/ to reorganize includes 2016-11-09 14:27:37 -06:00
system.hh arm: enable EL2 support 2016-08-02 10:38:01 +01:00
table_walker.cc arm: refactor page table walking 2016-08-02 10:38:03 +01:00
table_walker.hh arm: refactor page table walking 2016-08-02 10:38:03 +01:00
tlb.cc arm: Blame the right instruction address on a Prefetch Abort 2017-02-21 14:14:44 +00:00
tlb.hh arm: Add TLBI instruction for stage 2 IPA's 2016-08-02 10:38:03 +01:00
types.hh arch: get rid of unused LargestRead typedef 2016-01-17 18:27:46 -08:00
utility.cc style: [patch 1/22] use /r/3648/ to reorganize includes 2016-11-09 14:27:37 -06:00
utility.hh arm: Fix trapping to Hypervisor during MSR/MRS read/write 2016-08-02 10:38:03 +01:00
vtophys.cc style: [patch 1/22] use /r/3648/ to reorganize includes 2016-11-09 14:27:37 -06:00
vtophys.hh gcc: Clean-up of non-C++0x compliant code, first steps 2012-03-19 06:36:09 -04:00