Commit graph

186 commits

Author SHA1 Message Date
Gabe Black 5cca5ca3d9 Hook x86 nop into the decoder.
--HG--
extra : convert_revision : 26f765ecf74a0bb6a1ec89816f1d630a1a8e4553
2007-07-18 16:11:52 -07:00
Gabe Black 3bd42af99e Implement the x86 nop to be a "fault" microop which returns "NoFault".
--HG--
extra : convert_revision : 1b446def756f1d0f80631db944d1cc41be95efbd
2007-07-18 16:10:44 -07:00
Gabe Black dffc40ff62 Add a generateDisassembly function to the MicroFault StaticInst.
--HG--
extra : convert_revision : 73811bf99b26fad413c9b84a54f44e3763ff1835
2007-07-18 16:09:35 -07:00
Gabe Black e524240d68 Make disassembled x86 register indices reflect their size.
This doesn't handle high byte register accesses. It also highlights the fact that address size isn't actually being calculated, and that the size a microop uses needs to be overridable from the microassembly.

--HG--
extra : convert_revision : d495ac4f5756dc55a5f71953ff6963b3c030e6cb
2007-07-17 18:12:33 -07:00
Gabe Black 2e80f71dcd Implemented jnz.
--HG--
extra : convert_revision : ea169ad68acbb3383443586b783b831b3a9eecf9
2007-07-17 16:55:33 -07:00
Gabe Black 62ffc71fab Use limm to set up immediate value for subtract instruction.
--HG--
extra : convert_revision : f94e391e36a47c2f5222f30d7e28f48f7875db58
2007-07-17 16:50:13 -07:00
Gabe Black d77d4c04b7 Implement the jz instruction.
--HG--
extra : convert_revision : 7c0bd7ce244f724ac03bbb5fdf770c7a3eba78b4
2007-07-17 15:36:45 -07:00
Gabe Black c4004482a5 Make "test" set some condition codes.
It still needs to zero the overflow and carry flags to be correct.

--HG--
extra : convert_revision : 73cb3a55f7b4234389d9355f5ad45da6aaaa6c60
2007-07-17 15:35:34 -07:00
Gabe Black a6757095c3 Add in support for condition code flags.
Some microops can set the condition codes, and some of them can be predicated on them. Some of the codes aren't implemented because it was unclear from the AMD patent what they actually did. They are used with string instructions, but they use variables IP, DTF, and SSTF which don't appear to be documented.

--HG--
extra : convert_revision : 2236cccd07d0091762b50148975f301bb1d2da3f
2007-07-17 15:33:18 -07:00
Gabe Black cf846d5205 Add in operand which holds the condition code bits of the flag register.
--HG--
extra : convert_revision : 416052f41fccc8286b3bdbe8d559512a761224f2
2007-07-17 15:28:48 -07:00
Gabe Black bbf7163dd9 Add symbols for each of the flags a microop could set and each condition it could check.
--HG--
extra : convert_revision : 1f542b8aadfd5146539cadef631b49d77f578472
2007-07-17 15:27:28 -07:00
Gabe Black cbc24d6600 Actually include miscregs.hh
--HG--
extra : convert_revision : 6ebf906d2211b94f28c173f0d2da91bd446fcb2c
2007-07-17 13:30:23 -07:00
Gabe Black 4f7809d5e6 Pull some hard coded base classes out of the isa description.
--HG--
rename : src/arch/x86/isa/base.isa => src/arch/x86/isa/outputblock.isa
extra : convert_revision : 7954e7d5eea3b5966c9e273a08bcd169a39f380c
2007-07-14 17:14:19 -07:00
Gabe Black 70d6044527 Make symbols for regular registers.
--HG--
extra : convert_revision : 28a6df1efe4298877dc2b20179caeb25dfdc4622
2007-06-21 20:35:27 +00:00
Gabe Black ec24de8b59 Get rid of an unnecessary include file.
--HG--
extra : convert_revision : d8d139180917f54006a5a79df4a0f206ddd39fed
2007-06-21 20:35:26 +00:00
Gabe Black 25e385e0cf Use the new symbols to clean up the assembler.
--HG--
extra : convert_revision : 005464e875ede1e37dfe0e0482c29fd793ca52be
2007-06-21 15:30:05 +00:00
Gabe Black 13bf022053 Needed for last change set to work :P
--HG--
extra : convert_revision : 9e57e582dd1ef2805d5adffcc0ccfd99596d9f54
2007-06-21 15:29:02 +00:00
Gabe Black ae60d58083 Define symbols for the x86 specialization of the microassembler.
--HG--
extra : convert_revision : 1fd66ba519d211fec18641b6df94b7640c56080c
2007-06-21 15:28:08 +00:00
Gabe Black efce09e958 Add in code that lays the ground work for setting flags.
--HG--
extra : convert_revision : e4fcb64d45804700a0ef34e8acf5615b66e2a527
2007-06-21 13:48:44 +00:00
Gabe Black 77aa98d0f8 Implement rip relative addressing and put in some missing loads and stores.
--HG--
extra : convert_revision : 99053414cef40f13c5226871a72909b2622d8c26
2007-06-20 19:08:04 +00:00
Gabe Black 6c4b3db04c Fix a typo in one of the operand type tags.
--HG--
extra : convert_revision : bea87214ba4b40d75a350b803154836ec6d0ae9e
2007-06-20 19:04:41 +00:00
Gabe Black e6328170e1 Comment out some unnecessary debug output.
--HG--
extra : convert_revision : 9df17841d970a7995d8ed1d51ee66e2c5457e5e3
2007-06-20 19:04:40 +00:00
Gabe Black a68ddf685c Make memory instructions work better, add more macroop implementations, add an lea microop, move EmulEnv into it's own .cc and .hh.
--HG--
extra : convert_revision : 1212b8463eab1c1dcba7182c487d1e9184cf9bea
2007-06-20 15:02:50 +00:00
Gabe Black d2ccf5e509 More faithfulness to what instructions should work in what modes, and added the MOVSXD instruction.
--HG--
extra : convert_revision : 38b9bf6cd4bdec6355b1158967c7d3562715cacd
2007-06-19 22:40:10 +00:00
Gabe Black d496492793 Make instructions that are illegal in 64 bit mode not do the wrong thing in 64 bit mode. Also add in more versions of PUSH and POP, and a version of near CALL.
--HG--
extra : convert_revision : 7d8266cdfa54ac25610466b3533d3e9e5433297b
2007-06-19 17:56:06 +00:00
Gabe Black ebe4d05f70 Renovate the "fault" microop implementation.
--HG--
extra : convert_revision : dc9d67dd5413f00f16d37cb2d0f8b0d10971e14a
2007-06-19 14:50:35 +00:00
Gabe Black 056cfc345b Get rid of the commented out versions of macroops which have been reimplemented. The comments are basically functioning like a todo list.
--HG--
extra : convert_revision : cb07e3813f6cf882b4a5c77c498ffbca26adf586
2007-06-19 14:26:42 +00:00
Gabe Black 6e286cddfa Get rid of the immediate and displacement components of the EmulEnv struct and use them directly out of the instruction. The extra copies are conceptually realistic but are just innefficient as implemented. Also don't use the zeroeth microcode register for general storage since it's now the zero register, and implement a load and a store microops.
--HG--
extra : convert_revision : 0686296ca8b72940d961ecc6051063bfda1e932d
2007-06-19 14:18:25 +00:00
Gabe Black 8caef7d25a Add a stack size bitfield and expose the mode component of the ExtMachInst.
--HG--
extra : convert_revision : aad0ec51745fb94335898b0565bb11c1b399bbee
2007-06-19 14:15:21 +00:00
Gabe Black 1012fd4427 Add a function to print out segment names.
--HG--
extra : convert_revision : 8cbe3ca0d05165f7da5d6fa38c899ecc9e782511
2007-06-19 14:14:17 +00:00
Gabe Black 4ae284282e Get rid of unnecessary output.
--HG--
extra : convert_revision : 0df9a12788b8ce3225c113c095d5f13e49a7c544
2007-06-18 14:15:47 +00:00
Gabe Black 6c12577937 Add in incomplete pick and merge functions which read and write pieces of registers, and fill out microcode disassembly.
--HG--
extra : convert_revision : 56332b3999a9079b1bd305ee2826abdf593367e1
2007-06-18 14:15:00 +00:00
Gabe Black 7213944110 Fix limm.
--HG--
extra : convert_revision : ab76b11c2bb2f3abc0e7a84f7167d92d16ed074e
2007-06-14 20:52:23 +00:00
Gabe Black 866cc8214b Implement a handful more instructions and differentiate macroops based on the operand types they expect.
--HG--
extra : convert_revision : f9c8e694a8c0eb33b988657dca03ab495b65bee8
2007-06-14 20:52:22 +00:00
Gabe Black 752199f827 Make POP special case its dataSize to default to 64 bits in 64 bit mode.
--HG--
extra : convert_revision : 5c6251d962d9997676ffc795bb92eeb588caed39
2007-06-14 13:52:08 +00:00
Gabe Black 640ab1d2e7 Get rid of an unnecessary debug statement.
--HG--
extra : convert_revision : 0b306dd96f5358474ad6a8bf4a949c12bcd139cd
2007-06-14 13:49:23 +00:00
Gabe Black 20ec77fdc1 Get rid of some debug output and let macroops set headers in their constructor. The intention is to allow them to modify the emulation environment struct before it's used to construct its microops.
--HG--
extra : convert_revision : b04fc9ead8e3322fc3af3f14d75e2206ddfbe561
2007-06-14 13:47:52 +00:00
Gabe Black 5fd567425d Fix the operand type tag parser to recognize multi character register names.
--HG--
extra : convert_revision : e025620e29f2515d51240e96c4a05a4f74bdf72e
2007-06-13 18:08:06 +00:00
Gabe Black 715efab3b9 Partially implement "POP"
--HG--
extra : convert_revision : ba454579a6a82ce4924102a633e5758fb2a30b2d
2007-06-13 18:06:34 +00:00
Gabe Black fd45c4a58f Move load/store microops into their own file. They still don't do anything, though.
--HG--
extra : convert_revision : 251763c614b9056c3ca7a85ef92c416552da893f
2007-06-13 18:05:08 +00:00
Gabe Black dc13db8578 Fix the immediate version of register operations, and get their name to show up correctly.
--HG--
extra : convert_revision : 9fc36b99c9027e35f22983d5d1e22c940fa093de
2007-06-13 18:01:23 +00:00
Gabe Black 4e7786d971 Minor comment fix up.
--HG--
extra : convert_revision : 20d517c4bc2aae54e53368c708b5abb27ed3a469
2007-06-12 17:35:11 +00:00
Gabe Black 0d8d3f988f Make use of some of the REX prefix.
--HG--
extra : convert_revision : 948eceb59a1cd9b02ad9355dd5894af0bbec4e83
2007-06-12 16:47:10 +00:00
Gabe Black 548b121c1c Flesh out the bitfields for prefixes.
--HG--
extra : convert_revision : 0956b3d3532cba3856deda914d7cc708377b701b
2007-06-12 16:45:06 +00:00
Gabe Black ea3f7c9531 Add in MOV instructions.
--HG--
extra : convert_revision : 54a6b36dff3c15699faf2c767fc594359422c0ee
2007-06-12 16:31:42 +00:00
Gabe Black eb68c9986e Fix up a comment that wasn't changed over to x86.
--HG--
extra : convert_revision : 58448b984447babba708b9dcb1b4939ed35308a6
2007-06-12 16:30:48 +00:00
Gabe Black 2e9fa55f51 Get rid of unnecessary namespace prototype.
--HG--
extra : convert_revision : 388c0d6f2af96c4d33c1fe5d42a21866a4d71556
2007-06-12 16:29:49 +00:00
Gabe Black 7a52faa39b Use objects to pass around output code, and fix/implement a few things.
src/arch/x86/isa/formats/multi.isa:
    Make the formats use objects to pass around output code.

--HG--
extra : convert_revision : 428915bda22e848befac15097f56375c1818426e
2007-06-12 16:25:47 +00:00
Gabe Black d0c5da2cd4 Add an address size bitfield to the isa description and the ExtMachInst
--HG--
extra : convert_revision : f8907ef5ef77e050eeb00d895263b49da4a9b6e9
2007-06-12 16:23:42 +00:00
Gabe Black a7f3bbcfab Make microOp vs microop and macroOp vs macroop capitilization consistent.
src/arch/x86/isa/macroop.isa:
    Make microOp vs microop and macroOp vs macroop capitilization consistent. Also fill out the emulation environment handling a little more, and use an object to pass around output code.
src/arch/x86/isa/microops/base.isa:
    Make microOp vs microop and macroOp vs macroop capitilization consistent. Also adjust python to C++ bool translation.

--HG--
extra : convert_revision : 6f4bacfa334c42732c845f9a7f211cbefc73f96f
2007-06-12 16:21:47 +00:00
Gabe Black 1493ceda8f Fix another outdated comment.
--HG--
extra : convert_revision : 55f89d9f96734e96ae082399df6b0206d112cd6c
2007-06-08 18:41:58 +00:00
Gabe Black 78910a7b3d Adjust a few more comments.
--HG--
extra : convert_revision : 9b79ce72acf8932ce26e1744a149f2fd2435ea96
2007-06-08 17:41:23 +00:00
Gabe Black b9c38660ef Fix up a potentially misleading comment.
--HG--
extra : convert_revision : 58d37d8cc8e41c9640038d6dddae4cb5649638aa
2007-06-08 17:30:16 +00:00
Gabe Black 57a8c32bea Fix the formatting on a comment.
--HG--
extra : convert_revision : 89636a7410dec54235416e3c16db98cc5eecf2b0
2007-06-08 17:16:05 +00:00
Gabe Black 038fa48990 Clean up where files are included, and get rid of some cruft.
src/arch/x86/isa/main.isa:
    Clean up where files are included.

--HG--
extra : convert_revision : 0528359432bf0fb9198b63de9611176bc78e07c7
2007-06-08 17:14:39 +00:00
Gabe Black 658df56bf3 Clean things up a little.
--HG--
extra : convert_revision : 62ad0839847db85738054da6f7da8a956b24143e
2007-06-08 17:06:34 +00:00
Gabe Black 8bd213b3b8 Move the microcode assembly to a python package instead of isa_parser files. Also, the code is now a single string which runs through the microcode assembler rather than docstrings associated with classes named after each architectural level instruction.
--HG--
extra : convert_revision : 20e6d6ac625dde8f1885acc445882096df562778
2007-06-08 16:13:20 +00:00
Gabe Black 1f7ed5b7b4 Big changes to use the new microcode assembler.
--HG--
extra : convert_revision : 7d1a43c5791a2e7e30533746da3dd7036a5b8799
2007-06-08 16:09:43 +00:00
Gabe Black ce8f4c1f16 Fixed format arguments for XOR.
--HG--
extra : convert_revision : d64fe734fcdcc414ba9af9fc5f0f795429d5dad3
2007-06-08 16:07:31 +00:00
Gabe Black 2f194cc6f7 Add a bitfield to refer to the opSize member of the extMachInst.
--HG--
extra : convert_revision : 1854ebc00a9f3ae8c36cc579de6c3a2b48c0fdb6
2007-06-08 16:06:22 +00:00
Gabe Black dba02f703b Make limm (load immediate) microop
--HG--
extra : convert_revision : f4883febd92cfade61c1a6a31fdb2d27296d9044
2007-06-04 19:53:06 +00:00
Gabe Black 41bc0fc5b2 Reworking x86's microcode system. This is a work in progress, and X86 doesn't compile.
src/arch/x86/isa/decoder/one_byte_opcodes.isa:
src/arch/x86/isa/macroop.isa:
src/arch/x86/isa/main.isa:
src/arch/x86/isa/microasm.isa:
src/arch/x86/isa/microops/base.isa:
src/arch/x86/isa/microops/microops.isa:
src/arch/x86/isa/operands.isa:
src/arch/x86/isa/microops/regop.isa:
src/arch/x86/isa/microops/specop.isa:
    Reworking x86's microcode system

--HG--
extra : convert_revision : cab66be59ed758b192226af17eddd5a86aa190f3
2007-06-04 15:59:20 +00:00
Gabe Black 7860c045e2 x86 work that hadn't been checked in.
src/arch/x86/isa/decoder/one_byte_opcodes.isa:
    Give the "MOV" instruction the format of it's arguments. This will likely need to be completely overhauled in the near future.
src/arch/x86/predecoder.cc:
src/arch/x86/predecoder.hh:
    Make the predecoder explicitly reset itself rather than counting on it happening naturally.
src/arch/x86/predecoder_tables.cc:
    Fix the immediate size table
src/arch/x86/regfile.cc:
    nextnpc is bogus

--HG--
extra : convert_revision : 0926701fedaab41817e64bb05410a25174484a5a
2007-05-31 13:50:35 +00:00
Gabe Black 798caa36ad Include the new GenFault microop.
--HG--
extra : convert_revision : 6c943329525d2a01f35ad5e56ff91505d5011d7b
2007-04-10 17:26:04 +00:00
Gabe Black 9f4ebf9156 Reworked x86 a bit
--HG--
extra : convert_revision : def1a30e54b59c718c451a631a1be6f8e787e843
2007-04-10 17:25:15 +00:00
Gabe Black b79cacaf3f Changed some instruction names to be in all caps, and "implemented" move to test the stub code for instructions.
--HG--
extra : convert_revision : a377daf20545dfcbb0f97d8cafbe3d68416dc4b2
2007-04-10 17:22:45 +00:00
Gabe Black 1320e294fe Added a class which lets you manipulate all the strings returned by the parser as a unit.
--HG--
extra : convert_revision : eec4b188b44b80cee643542bbd1aaa139cbc4ef0
2007-04-10 17:14:51 +00:00
Gabe Black 85f9213b8a Accidentally didn't save when moving the specialization code out of here.
--HG--
extra : convert_revision : 1ffe0c497e10fef1eb84b3c97c00b98d820fbb97
2007-04-09 01:08:05 +00:00
Gabe Black 5d52cd6409 Move the instruction specialization stuff out of the microassembler file, and added some comments to main.isa
--HG--
extra : convert_revision : 1534ae7d5a9e95bf662d79a04f9286c227541c6c
2007-04-06 16:55:56 +00:00
Gabe Black 59df95c7e6 Consolidated the microcode assembler to help separate it from more x86-centric stuff.
--HG--
extra : convert_revision : 5e7e8026e24ce44a3dac4a358e0c3e5560685958
2007-04-06 16:39:25 +00:00
Gabe Black 2a1c102f25 Refactored the x86 isa description some more. There should be more seperation between x86 specific parts, and those parts which are implemented in the isa description but could eventually be moved elsewhere.
--HG--
rename : src/arch/x86/isa/formats/macroop.isa => src/arch/x86/isa/macroop.isa
extra : convert_revision : 5ab40eedf574fce438d9fe90e00a496dc95c8bcf
2007-04-06 16:00:56 +00:00
Gabe Black e633e23a3a Add in a stub merging function
--HG--
extra : convert_revision : 15e3cdb4ebcd31bc44204687ba59dde00c56c6be
2007-04-06 15:16:36 +00:00
Gabe Black 47c24ff07a Clean up the macroop code.
--HG--
extra : convert_revision : 3cf83c3e038fece6190dbb91f56deb0498c9a70d
2007-04-06 15:15:36 +00:00
Gabe Black ff7b89beee The process of going from an instruction definition to an instruction to be returned by the decoder has been fleshed out more. The following steps describe how an instruction implementation becomes a StaticInst.
1. Microops are created. These are StaticInsts use templates to provide a basic form of polymorphism without having to make the microassembler smarter.
2. An instruction class is created which has a "templated" microcode program as it's docstring. The template parameters are refernced with ^ following by a number.
3. An instruction in the decoder references an instruction template using it's mnemonic. The parameters to it's format end up replacing the placeholders. These parameters describe a source for an operand which could be memory, a register, or an immediate. It it's a register, the register index is used. If it's memory, eventually a load/store will be pre/postpended to the instruction template and it's destination register will be used in place of the ^. If it's an immediate, the immediate is used. Some operand types, specifically those that come from the ModRM byte, need to be decoded further into memory vs. register versions. This is accomplished by making the decode_block text for these instructions another case statement based off ModRM.
4. Once all of the template parameters have been handled, the instruction goes throw the microcode assembler which resolves labels and creates a list of python op objects. If an operand is a register, it uses a % prefix, an immediate uses $, and a label uses @. If the operand is just letters, numbers, and underscores, it can appear immediately after the prefix. If it's not, it can be encolsed in non nested {}s.
5. If there is a single "op" object (which corresponds to a single microop) the decoder is set up to return it directly. If not, a macroop wrapper is created around it.

In the future, I'm considering seperating the operand type specialization from the template substitution step. A problem this introduces is that either the template arguments need to be kept around for the specialization step, or they need to be re-extracted. Re-extraction might be the way to go so that the operand formats can be coded directly into the micro assembler template without having to pass them in as parameters. I don't know if that's actually useful, though.

src/arch/x86/isa/decoder/one_byte_opcodes.isa:
src/arch/x86/isa/microasm.isa:
src/arch/x86/isa/microops/microops.isa:
src/arch/x86/isa/operands.isa:
src/arch/x86/isa/microops/base.isa:
    Implemented polymorphic microops and changed around the microcode assembler syntax.

--HG--
extra : convert_revision : e341f7b8ea9350a31e586a3d33250137e5954f43
2007-04-04 23:35:20 +00:00
Gabe Black 4285990a96 Reworking how x86's isa description works. I'm adopting the following definitions to make figuring out what's what a little easier:
MicroOp: A single operation actually implemented in hardware.
MacroOp: A collection of microops which are executed as a unit.
Instruction: An architected instruction which can be implemented with a macroop or a microop.

--HG--
extra : convert_revision : 1cfc8409cc686c75220767839f55a30551aa6f13
2007-04-04 14:31:59 +00:00
Gabe Black 61c56ffeaf A batch of changes and fixes. Macroops are now generated automatically, multiops do alot more of what they're supposed to (excluding memory operands), and microops are slightly more implemented.
--HG--
extra : convert_revision : 518059f47e11df50aa450d4a322ef2ac069c99c9
2007-04-03 15:01:09 +00:00
Gabe Black 7fcc9d2106 Made the MultiOp format do a little more. It now sets up single microop instructions to return an instance of the right class. The code to decode register numbers and generate loads and stores still needs to be added. Also, a syntax for specifying operands as sources, destinations, or both needs to be established. Multipl microop instructions are also not handled, pending real macroop generation support.
--HG--
extra : convert_revision : 1a0a4b36afce8255e23e3cdd7a85c1392dda5f72
2007-03-29 17:57:19 +00:00
Gabe Black e67a207ad3 Add a microcode assembler. A microcode "program" is a series of statements. Each statement has an optional label at the beginning, a capitilized microcode class name which is roughly equivalent to a mnemonic in a regular ISA, and then an optional series of operands seperated by white space. The operands are either a decimal constant, a label, or a code fragment surrounded by non nested {}s. Labels are a letter or underscore followed by letters, underscores, or digits. The syntax for describing code segments might need to be changed if a need arrises to have {}s in the code itself.
--HG--
extra : convert_revision : 8e5cfdd1a3c9a7e3731fdf6acd615ee82ac2b9b7
2007-03-29 17:57:18 +00:00
Gabe Black 77ce05f478 Fidget with the syntax of the MultiOp format in anticipation of making it actually work.
--HG--
extra : convert_revision : f62a1f035cc11677df8eb5a839ca1247d819fab3
2007-03-29 00:50:54 -07:00
Gabe Black fd77212b72 Add code to generate register and immediate based integer op microop classes.
--HG--
extra : convert_revision : 718f941da74dd3b4557cd21e1772879ac21aa9c6
2007-03-29 00:49:53 -07:00
Gabe Black 276f6d794d Add a junk operand. With no operands, the parser breaks.
--HG--
extra : convert_revision : 7410fd3681ed3d9b1293d982ed5f3553a6c75f3f
2007-03-21 21:09:24 +00:00
Gabe Black bbffaa8ee0 Start implementing groups of instructions which do the same thing on different sets of inputs.
--HG--
extra : convert_revision : 6a5be61831588f801965dd4e80cb52f28911c320
2007-03-21 21:07:43 +00:00
Gabe Black 0a80d06dea Break out the one and two byte opcodes into different files. Also change what bits decode is done on to reflect where clumps of instructions are.
--HG--
extra : convert_revision : 8768676eac25e6a4f0dc50ce2dc576bdcdd6e025
2007-03-21 19:19:53 +00:00
Gabe Black 3efec59fc5 Missed a const
--HG--
rename : src/arch/x86/isa/decoder.isa => src/arch/x86/isa/decoder/decoder.isa
extra : convert_revision : a60e7495da6fe99fa2375a3f801f2962c3e41adb
2007-03-21 19:15:40 +00:00
Gabe Black a2b56088fb Make the predecoder an object with it's own switched header file. Start adding predecoding functionality to x86.
src/arch/SConscript:
src/arch/alpha/utility.hh:
src/arch/mips/utility.hh:
src/arch/sparc/utility.hh:
src/cpu/base.hh:
src/cpu/o3/fetch.hh:
src/cpu/o3/fetch_impl.hh:
src/cpu/simple/atomic.cc:
src/cpu/simple/base.cc:
src/cpu/simple/base.hh:
src/cpu/static_inst.hh:
src/arch/alpha/predecoder.hh:
src/arch/mips/predecoder.hh:
src/arch/sparc/predecoder.hh:
    Make the predecoder an object with it's own switched header file.

--HG--
extra : convert_revision : 77206e29089130e86b97164c30022a062699ba86
2007-03-15 02:47:42 +00:00
Gabe Black a41b86ba01 Stub decoder. This is probably even farther from finished than it looks...
--HG--
extra : convert_revision : a39a158fec4560f6eb7a6987592c473677c0b1ba
2007-03-05 16:16:28 +00:00