gem5/src/arch/x86/isa
Gabe Black 6c12577937 Add in incomplete pick and merge functions which read and write pieces of registers, and fill out microcode disassembly.
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extra : convert_revision : 56332b3999a9079b1bd305ee2826abdf593367e1
2007-06-18 14:15:00 +00:00
..
decoder Implement a handful more instructions and differentiate macroops based on the operand types they expect. 2007-06-14 20:52:22 +00:00
formats Implement a handful more instructions and differentiate macroops based on the operand types they expect. 2007-06-14 20:52:22 +00:00
insts Implement a handful more instructions and differentiate macroops based on the operand types they expect. 2007-06-14 20:52:22 +00:00
microops Add in incomplete pick and merge functions which read and write pieces of registers, and fill out microcode disassembly. 2007-06-18 14:15:00 +00:00
base.isa Add in incomplete pick and merge functions which read and write pieces of registers, and fill out microcode disassembly. 2007-06-18 14:15:00 +00:00
bitfields.isa Flesh out the bitfields for prefixes. 2007-06-12 16:45:06 +00:00
includes.isa Get rid of unnecessary namespace prototype. 2007-06-12 16:29:49 +00:00
macroop.isa Get rid of some debug output and let macroops set headers in their constructor. The intention is to allow them to modify the emulation environment struct before it's used to construct its microops. 2007-06-14 13:47:52 +00:00
main.isa Fix up a comment that wasn't changed over to x86. 2007-06-12 16:30:48 +00:00
microasm.isa Adjust a few more comments. 2007-06-08 17:41:23 +00:00
operands.isa Reworking x86's microcode system. This is a work in progress, and X86 doesn't compile. 2007-06-04 15:59:20 +00:00
specialize.isa Implement a handful more instructions and differentiate macroops based on the operand types they expect. 2007-06-14 20:52:22 +00:00