Gabe Black
a1aba01a02
CPU: Get rid of translate... functions from various interface classes.
2009-02-25 10:15:34 -08:00
Lisa Hsu
5d029ff11e
sycalls: implement mremap() and add DATA flag for getrlimit(). mremap has been tested on Alpha, compiles for the rest but not tested. I don't see why it wouldn't work though.
2009-02-16 17:47:39 -05:00
Steve Reinhardt
89a7fb0393
Fixes to get prefetching working again.
...
Apparently we broke it with the cache rewrite and never noticed.
Thanks to Bao Yungang <baoyungang@gmail.com> for a significant part
of these changes (and for inspiring me to work on the rest).
Some other overdue cleanup on the prefetch code too.
2009-02-16 08:56:40 -08:00
Nathan Binkert
8153790d00
SCons: centralize the Dir() workaround for newer versions of scons.
...
Scons bug id: 2006 M5 Bug id: 308
2009-01-13 14:17:50 -08:00
Nathan Binkert
e141cb7441
flags: Change naming of functions to be clearer
2008-12-06 14:18:18 -08:00
Steve Reinhardt
4514f565e3
syscalls: fix latent brk/obreak bug.
...
Bogus calls to ChunkGenerator with negative size were triggering
a new assertion that was added there.
Also did a little renaming and cleanup in the process.
2008-11-15 09:30:10 -08:00
Steve Reinhardt
640b415688
Cache: get rid of obsolete Tag methods.
...
I think readData() and writeData() were used for Erik's compression
work, but that code is gone, these aren't called anymore, and they
don't even really do what their names imply.
2008-11-14 14:14:35 -08:00
Nathan Binkert
5711282f87
Fix a bunch of bugs I introduced when I changed the flags stuff for packets.
...
I did some of the flags and assertions wrong. Thanks to Brad Beckmann
for pointing this out. I should have run the opt regressions instead
of the fast. I also screwed up some of the logical functions in the Flags
class.
2008-11-14 04:55:30 -08:00
Gabe Black
7a4d75bae3
CPU: Refactor read/write in the simple timing CPU.
2008-11-13 23:30:37 -08:00
Nathan Binkert
c25d966b06
Clean up the SimpleTimingPort class a little bit.
...
Move the constructor into the .cc file and get rid of the typedef for
SendEvent.
2008-11-10 11:51:18 -08:00
Nathan Binkert
3535d746ab
style: clean up the Packet stuff
2008-11-10 11:51:17 -08:00
Steve Reinhardt
63127cbf37
mem: Assert that requests have non-negative size.
...
Would have saved me much debugging time if these
had been in there previously.
2008-11-10 14:11:07 -08:00
Steve Reinhardt
42bd460d7f
Cache: Refactor packet forwarding a bit.
...
Makes adding write-through operations easier.
2008-11-10 14:10:28 -08:00
Lisa Hsu
c68032ddcb
decouple eviction from insertion in the cache.
2008-11-04 11:35:58 -05:00
Lisa Hsu
4ab52cb986
Change the findBlock(addr, lat) to accessBlock, which I think has better connotations for what is really happening and how it should be used.
2008-11-04 11:35:57 -05:00
Lisa Hsu
dd99ff23c6
get rid of all instances of readTid() and getThreadNum(). Unify and eliminate
...
redundancies with threadId() as their replacement.
2008-11-04 11:35:42 -05:00
Lisa Hsu
d857faf073
Add in Context IDs to the simulator. From now on, cpuId is almost never used,
...
the primary identifier for a hardware context should be contextId(). The
concept of threads within a CPU remains, in the form of threadId() because
sometimes you need to know which context within a cpu to manipulate.
2008-11-02 21:57:07 -05:00
Lisa Hsu
8788d703f8
s/cpu_id/cpuId in o3 (to be consistent and match style), also fix some typos in
...
comments.
2008-10-23 16:49:17 -04:00
Lisa Hsu
546a6c0c1b
probe function no longer used anywhere.
2008-10-23 16:49:13 -04:00
Lisa Hsu
7a28ab2d18
remove the totally obsolete split cache
2008-10-23 16:11:28 -04:00
Lisa Hsu
90e40ca982
This function declaration isn't used anywhere.
...
HG: user: Lisa Hsu <hsul@eecs.umich.edu> HG: branch default HG: changed
src/mem/cache/cache.hh
2008-10-14 17:22:03 -04:00
Gabe Black
34ca72d16d
Get rid of some commented out code.
2008-10-12 23:50:22 -07:00
Gabe Black
e459013182
Create a message port for sending messages as apposed to reading/writing a memory range.
2008-10-12 12:08:51 -07:00
Nathan Binkert
b556dc4119
mem: Add a method for setting the time on a packet.
2008-10-09 04:58:24 -07:00
Nathan Binkert
e06321091d
eventq: convert all usage of events to use the new API.
...
For now, there is still a single global event queue, but this is
necessary for making the steps towards a parallelized m5.
2008-10-09 04:58:24 -07:00
Nathan Binkert
8291d9db0a
eventq: Major API change for the Event and EventQueue structures.
...
Since the early days of M5, an event needed to know which event queue
it was on, and that data was required at the time of construction of
the event object. In the future parallelized M5, this sort of
requirement does not work well since the proper event queue will not
always be known at the time of construction of an event. Now, events
are created, and the EventQueue itself has the schedule function,
e.g. eventq->schedule(event, when). To simplify the syntax, I created
a class called EventManager which holds a pointer to an EventQueue and
provides the schedule interface that is a proxy for the EventQueue.
The intent is that objects that frequently schedule events can be
derived from EventManager and then they have the schedule interface.
SimObject and Port are examples of objects that will become
EventManagers. The end result is that any SimObject can just call
schedule(event, when) and it will just call that SimObject's
eventq->schedule function. Of course, some objects may have more than
one EventQueue, so this interface might not be perfect for those, but
they should be relatively few.
2008-10-09 04:58:23 -07:00
Nathan Binkert
9838be2521
When nesting if statements, use braces to avoid ambiguous else clauses.
2008-09-26 08:18:57 -07:00
Ali Saidi
3a3e356f4e
style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs
2008-09-10 14:26:15 -04:00
Nathan Binkert
9cf8ad3a17
params: Get rid of the remnants of the old style parameter configuration stuff.
2008-08-11 12:22:17 -07:00
Steve Reinhardt
62c08a75ad
Make default PhysicalMemory latency slightly more realistic.
...
Also update stats to reflect change.
2008-08-03 18:13:29 -04:00
Steve Reinhardt
8e7ddce284
Use ReadResp instead of LoadLockedResp for LoadLockedReq responses.
2008-07-15 14:38:51 -04:00
Steve Reinhardt
6262e0d909
Add missing newlines to Bus DPRINTFs.
2008-07-15 14:38:51 -04:00
Ali Saidi
a4a7a09e96
Remove delVirtPort() and make getVirtPort() only return cached version.
2008-07-01 10:25:07 -04:00
Ali Saidi
c5fbbf376a
Change everything to use the cached virtPort rather than created their own each time.
...
This appears to work, but I don't want to commit it until it gets tested a lot more.
I haven't deleted the functionality in this patch that will come later, but one question
is how to enforce encourage objects that call getVirtPort() to not cache the virtual port
since if the CPU changes out from under them it will be worse than useless. Perhaps a null
function like delVirtPort() is still useful in that case.
2008-07-01 10:24:19 -04:00
Steve Reinhardt
96bbccc36b
Automated merge after backout.
2008-06-28 13:20:00 -04:00
Steve Reinhardt
caaac16803
Backed out changeset 94a7bb476fca: caused memory leak.
2008-06-28 13:19:38 -04:00
Steve Reinhardt
1434b86943
Make bus address conflict error more informative
2008-06-21 01:06:27 -04:00
Steve Reinhardt
6b45238316
Generate more useful error messages for unconnected ports.
...
Force all non-default ports to provide a name and an
owner in the constructor.
2008-06-21 01:04:43 -04:00
Nathan Binkert
fa8f91fdc0
physmem: Add a null option to physical memory so it doesn't store data.
2008-06-15 21:39:29 -07:00
Nathan Binkert
e3c267a3db
port: Clean up default port setup and port switchover code.
2008-06-15 21:34:32 -07:00
Nathan Binkert
fe325c7f43
MemReq: Add option to reset the time on a request.
2008-06-14 19:39:01 -07:00
Steve Reinhardt
caccbd1edc
Get rid of bogus bus assertion.
...
It runs out that if a MemObject turns around and does a send in its
receive callback, and there are other sends already scheduled, then
it could observe a state where it's not at the head of the list but
the bus's sendEvent is not scheduled (because we're still in the
middle of processing the prior sendEvent).
2008-06-13 01:33:49 -04:00
Steve Reinhardt
024ec4c5c3
Get rid of bogus cache assertion.
...
I was asserting that the only reason you would defer targets is if
a write came in while you had an outstanding read miss, but there's
another case where you could get a read access after you've snooped
an invalidation and buffered it because it applies to a prior
outstanding miss.
2008-06-13 01:29:20 -04:00
Ali Saidi
e71a5270a2
Make sure that output files are always checked success before they're used.
...
Make OutputDirectory::resolve() private and change the functions using
resolve() to instead use create().
--HG--
extra : convert_revision : 36d4be629764d0c4c708cec8aa712cd15f966453
2008-05-15 19:10:26 -04:00
Ali Saidi
8af6dc118c
SCons: add comments to SConscript documenting bug workaround
...
--HG--
extra : convert_revision : e6cdffe953d56b96c76c7ff14d2dcc3de3ccfcc3
2008-04-10 15:38:10 -04:00
Ali Saidi
fe12f38353
PhysicalMemory: Add parameter for variance in memory delay.
...
--HG--
extra : convert_revision : b931472e81dedb650b7accb9061cb426f1c32e66
2008-04-10 14:44:52 -04:00
Ali Saidi
ed27c4c521
SCons: Manually specifying header only directories with Dir() works around the problem
...
--HG--
extra : convert_revision : d9713228d934cf4a45114a972603b8bca2bd27d3
2008-04-08 11:08:26 -04:00
Steve Reinhardt
29be31ce31
Fix handling of writeback-induced writebacks in atomic mode.
...
--HG--
extra : convert_revision : 4fa64f8a929f1aa36a9d5a71b8d1816b497aca4c
2008-03-25 10:01:21 -04:00
Steve Reinhardt
623dd7ed3a
Delete the Request for a no-response Packet
...
when the Packet is deleted, since the requester
can't possibly do it.
--HG--
extra : convert_revision : 8571b144ecb3c70efc06d09faa8b3161fb58352d
2008-03-24 01:08:02 -04:00
Steve Reinhardt
93ab43288a
Don't FastAlloc MSHRs since we don't allocate them on the fly.
...
--HG--
extra : convert_revision : 02775cfb460afe6df0df0938c62cccd93a71e775
2008-03-24 01:08:02 -04:00
Steve Reinhardt
407710d387
Fix cache problem with writes to tempBlock
...
getting wrong writeback address.
--HG--
extra : convert_revision : 023dfb69c227c13a69bfe2744c6af75a45828b0b
2008-03-22 22:17:15 -04:00
Steve Reinhardt
b051ae6acc
Fix a few Packet memory leaks.
...
--HG--
extra : convert_revision : 00db19f0698c0786f0dff561eea9217860a5a05a
2008-03-17 03:08:28 -04:00
Steve Reinhardt
131c65f429
Restructure bus timing calcs to cope with pkt being deleted by target.
...
--HG--
extra : convert_revision : db8497e73a44f2a06aab121e797e88b4c0c31330
2008-03-17 03:07:38 -04:00
Steve Reinhardt
19c367fa8f
Fix subtle cache bug where read could return stale data
...
if a prior write miss arrived while an even earlier
read miss was still outstanding.
--HG--
extra : convert_revision : 4924e145829b2ecf4610b88d33f4773510c6801a
2008-03-15 05:03:55 -07:00
Steve Reinhardt
e6d6adc731
Revamp cache timing access mshr check to make stats sane again.
...
--HG--
extra : convert_revision : 37009b8ee536807073b5a5ca07ed1d097a496aea
2008-02-26 22:03:28 -08:00
Steve Reinhardt
bdf3323915
Cache: better comments particularly regarding writeback situation.
...
--HG--
extra : convert_revision : 59ff9ee63ee0fec5a7dfc27b485b737455ccf362
2008-02-26 20:17:26 -08:00
Gabe Black
ec1a4cbbc7
Bus: Fix the bus timing to be more realistic.
...
--HG--
extra : convert_revision : acd70dc98ab840e55b114706fbb6afb2a95e54bc
2008-02-26 02:20:08 -05:00
Steve Reinhardt
4597a71cef
Make L2+ caches allocate new block for writeback misses
...
instead of forwarding down the line.
--HG--
extra : convert_revision : b0d6e7862c92ea7a2d21f817d30398735e7bb8ba
2008-02-16 14:58:03 -05:00
Nicolas Zea
4c7eb21119
Bus: Only update port cache when there is an item to update it with.
...
--HG--
extra : convert_revision : 84848fd48bb9e6693a0518c862364142b1969aa8
2008-02-10 19:41:03 -05:00
Steve Reinhardt
9d7a69c582
Fix #include lines for renamed cache files.
...
--HG--
extra : convert_revision : b5008115dc5b34958246608757e69a3fa43b85c5
2008-02-10 14:45:25 -08:00
Steve Reinhardt
d56e77c180
Rename cache files for brevity and consistency with rest of tree.
...
--HG--
rename : src/mem/cache/base_cache.cc => src/mem/cache/base.cc
rename : src/mem/cache/base_cache.hh => src/mem/cache/base.hh
rename : src/mem/cache/cache_blk.cc => src/mem/cache/blk.cc
rename : src/mem/cache/cache_blk.hh => src/mem/cache/blk.hh
rename : src/mem/cache/cache_builder.cc => src/mem/cache/builder.cc
rename : src/mem/cache/miss/mshr.cc => src/mem/cache/mshr.cc
rename : src/mem/cache/miss/mshr.hh => src/mem/cache/mshr.hh
rename : src/mem/cache/miss/mshr_queue.cc => src/mem/cache/mshr_queue.cc
rename : src/mem/cache/miss/mshr_queue.hh => src/mem/cache/mshr_queue.hh
rename : src/mem/cache/prefetch/base_prefetcher.cc => src/mem/cache/prefetch/base.cc
rename : src/mem/cache/prefetch/base_prefetcher.hh => src/mem/cache/prefetch/base.hh
rename : src/mem/cache/prefetch/ghb_prefetcher.cc => src/mem/cache/prefetch/ghb.cc
rename : src/mem/cache/prefetch/ghb_prefetcher.hh => src/mem/cache/prefetch/ghb.hh
rename : src/mem/cache/prefetch/stride_prefetcher.cc => src/mem/cache/prefetch/stride.cc
rename : src/mem/cache/prefetch/stride_prefetcher.hh => src/mem/cache/prefetch/stride.hh
rename : src/mem/cache/prefetch/tagged_prefetcher.cc => src/mem/cache/prefetch/tagged.cc
rename : src/mem/cache/prefetch/tagged_prefetcher.hh => src/mem/cache/prefetch/tagged.hh
rename : src/mem/cache/tags/base_tags.cc => src/mem/cache/tags/base.cc
rename : src/mem/cache/tags/base_tags.hh => src/mem/cache/tags/base.hh
rename : src/mem/cache/tags/Repl.py => src/mem/cache/tags/iic_repl/Repl.py
rename : src/mem/cache/tags/repl/gen.cc => src/mem/cache/tags/iic_repl/gen.cc
rename : src/mem/cache/tags/repl/gen.hh => src/mem/cache/tags/iic_repl/gen.hh
rename : src/mem/cache/tags/repl/repl.hh => src/mem/cache/tags/iic_repl/repl.hh
extra : convert_revision : ff7a35cc155a8d80317563c45cebe405984eac62
2008-02-10 14:15:42 -08:00
Stephen Hines
6cc1573923
Make the Event::description() a const function
...
--HG--
extra : convert_revision : c7768d54d3f78685e93920069f5485083ca989c0
2008-02-06 16:32:40 -05:00
Geoffrey Blake
f9c54d5a4b
Temporary fix for ll/sc bug see flyspray task for more info:
...
http://www.m5sim.org/flyspray/task/197
Signed-off by: Ali Saidi <saidi@eecs.umich.edu>
--HG--
extra : convert_revision : cdeece7e3163de9abf2c6c7435f1bc93570fab81
2008-01-06 00:19:45 -05:00
Steve Reinhardt
6c5a3ab8b2
Add ReadRespWithInvalidate to handle multi-level coherence situation
...
where we defer a response to a read from a far-away cache A, then later
defer a ReadExcl from a cache B on the same bus as us. We'll assert
MemInhibit in both cases, but in the latter case MemInhibit will keep
the invalidation from reaching cache A. This special response tells
cache A that it gets the block to satisfy its read, but must immediately
invalidate it.
--HG--
extra : convert_revision : f85c8b47bb30232da37ac861b50a6539dc81161b
2008-01-02 15:22:38 -08:00
Steve Reinhardt
bf9b3821bd
Mark cache-to-cache MSHRs as downstreamPending when necessary.
...
Don't mark upstream MSHR as pending if downstream MSHR is already in service.
--HG--
extra : convert_revision : e1c135ff00217291db58ce8a06ccde34c403d37f
2008-01-02 15:18:33 -08:00
Steve Reinhardt
538da9e24d
Don't DPRINTF in the middle of a PrintReq.
...
--HG--
extra : convert_revision : 6358c014d14a19a34111c39827b05987507544bb
2008-01-02 14:42:42 -08:00
Steve Reinhardt
87e5fd1755
Bug fix: functional cache port now needs otherPort set.
...
--HG--
extra : convert_revision : fb007df73a77535a5dba19341f7b0b32e8c99548
2008-01-02 14:42:24 -08:00
Steve Reinhardt
cde5a79eab
Additional comments and helper functions for PrintReq.
...
--HG--
extra : convert_revision : 7eadf9b7db8c0289480f771271b6efe2400006d4
2008-01-02 13:46:22 -08:00
Steve Reinhardt
3952e41ab1
Add functional PrintReq command for memory-system debugging.
...
--HG--
extra : convert_revision : 73b753e57c355b7e6873f047ddc8cb371c3136b7
2008-01-02 12:20:15 -08:00
Steve Reinhardt
659aef3eb8
Fix formatting and comments in cache_impl.hh
...
--HG--
extra : convert_revision : 26d71cca5420ad03e16bf174e15dabe7f902da41
2008-01-02 12:15:48 -08:00
Gabe Black
8a020d40d3
Make ports that aren't connected to anything fail more gracefully.
...
--HG--
extra : convert_revision : 3803b28fb2fdfd729f01f1a44df2ae02ef83a2fc
2007-11-28 14:39:19 -08:00
Ali Saidi
8026ecbb8e
Memory: Cache the physical memory start and size so we don't need a dynamic cast on every access.
...
--HG--
extra : convert_revision : d6c3e93718991e7b68248242c80d8e6ac637ac51
2007-11-19 18:23:43 -05:00
Steve Reinhardt
7d83cf35e1
Tweak check for writable block fill.
...
--HG--
extra : convert_revision : c04281bcfc4cd23c7613aeccb21dc74452bcc951
2007-11-16 20:10:33 -08:00
Steve Reinhardt
f03a62008a
Fix bug on exclusive response to ReadReq with pending WriteReq.
...
--HG--
extra : convert_revision : 5429cd7ca84cf6348813a4607fa16f76aa5df7e0
2007-11-16 20:10:32 -08:00
Korey Sewell
375ddf8d25
branch merge
...
--HG--
extra : convert_revision : 1c56f3c6f2c50d642d2de5ddde83a55234455cec
2007-11-15 00:14:20 -05:00
Ali Saidi
7c8e4ca3a3
Checkpointing: Name SE page table entries better so that there isn't a problem if multiple workloads are being run at once.
...
--HG--
extra : convert_revision : 3bac9bd7fd93fcadf764e2991c5b029f2c745c08
2007-11-14 23:42:08 -05:00
Korey Sewell
bfdd2f379b
remove unnecessary debug messages I added
...
--HG--
extra : convert_revision : 5c23218fd1b899fa7fe42701f7cb2f6033f7a583
2007-11-14 06:18:58 -05:00
Korey Sewell
2692590049
Add in files from merge-bare-iron, get them compiling in FS and SE mode
...
--HG--
extra : convert_revision : d4e19afda897bc3797868b40469ce2ec7ec7d251
2007-11-13 16:58:16 -05:00
Ali Saidi
c8123cef1b
Cache: Fix for OS X 10.5 compiling.
...
--HG--
extra : convert_revision : ba3c33ed524367280eefc096177d767168ac2cf6
2007-11-04 18:57:36 -05:00
Ali Saidi
333ac6cc32
DRAM: Make latency parameters be Param.Latency instead of ints.
...
--HG--
extra : convert_revision : 553b86cc4653da089d7aa0045a3f3bdcabf6c4d8
2007-11-01 17:30:50 -04:00
Steve Reinhardt
90f42bf3ad
Merge in bus DPRINTF changes.
...
--HG--
extra : convert_revision : 3bbd7c0745b31bb2a628b604ab1627cd9c61643c
2007-10-31 00:39:16 -07:00
Ali Saidi
538fae951b
Traceflags: Add SCons function to created a traceflag instead of having one file with them all.
...
--HG--
extra : convert_revision : 427f6bd8f050861ace3bc0d354a1afa5fc8319e6
2007-10-31 01:21:54 -04:00
Gabe Black
fddfa71658
TLB: Fix serialization issues with the tlb entries and make the page table store the process, not the system.
...
--HG--
extra : convert_revision : 2421af11f62f60fb48faeee6bddadac2987df0e8
2007-10-25 19:04:44 -07:00
Ali Saidi
0711f4f17a
SE: Fix page table and system serialization, don't reinit process if this is a checkpoint restore.
...
--HG--
extra : convert_revision : 03dcf3c088e57b7abab60efe700d947117888306
2007-10-25 20:13:35 -04:00
Steve Reinhardt
76c4c5fabc
mem: clean up bus/cache DPRINTFs a bit
...
Not so much noise on failed sends, and more complete
info when grepping a trace using an address.
--HG--
extra : convert_revision : 05a8261c9452072ca08b906200c6322b33e2b9f1
2007-09-16 16:46:38 -07:00
Ali Saidi
bf7c01d43d
Bus: Fix drain code; old method could return 1 in atomic mode and never call de->process().
...
--HG--
extra : convert_revision : 35990e5eaf93f7a95a0ec72e9f92034a042def3e
2007-09-05 17:12:41 -04:00
Miles Kaufmann
54cc0053f0
params: Deprecate old-style constructors; update most SimObject constructors.
...
SimObjects not yet updated:
- Process and subclasses
- BaseCPU and subclasses
The SimObject(const std::string &name) constructor was removed. Subclasses
that still rely on that behavior must call the parent initializer as
: SimObject(makeParams(name))
--HG--
extra : convert_revision : d6faddde76e7c3361ebdbd0a7b372a40941c12ed
2007-08-30 15:16:59 -04:00
Gabe Black
7227ab5f22
Merge with head
...
--HG--
extra : convert_revision : cc73b9aaf73e9dacf52f3350fa591e67ca4ccee6
2007-08-26 21:45:40 -07:00
Gabe Black
9b49a78cfd
Address translation: Make the page table more flexible.
...
The page table now stores actual page table entries. It is still a templated
class here, but this will be corrected in the near future.
--HG--
extra : convert_revision : 804dcc6320414c2b3ab76a74a15295bd24e1d13d
2007-08-26 20:33:57 -07:00
Ali Saidi
02353a60ee
MemorySystem: Fix the use of ?: to produce correct results.
...
--HG--
extra : convert_revision : 31aad7170b35556a4c984f4ebc013137d55d85eb
2007-08-12 19:43:54 -04:00
Ali Saidi
06a9f58c68
DMA: Add IOCache and fix bus bridge to optionally only send requests one
...
way so a cache can handle partial block requests for i/o devices.
--HG--
extra : convert_revision : a68b5ae826731bc87ed93eb7ef326a2393053964
2007-08-10 16:14:01 -04:00
Ali Saidi
5c38668ed6
Bus: Only call end() on an stl object once in a loop
...
--HG--
extra : convert_revision : 238dcd6da7577b533e52ada2107591c4e9168ebd
2007-08-10 16:14:01 -04:00
Vincentius Robby
3d40cba8d4
Port, StaticInst: Revert unnecessary changes.
...
--HG--
extra : convert_revision : e6ef262bbbc5ad53498e55caac1897e6cc2a61e6
2007-08-08 14:54:02 -04:00
Vincentius Robby
13d10e844c
alpha: Make the TLB cache to actually work.
...
Improve MRU checking for StaticInst, Bus, TLB
--HG--
extra : convert_revision : 9116b5655cd2986aeb4205438aad4a0f5a440006
2007-08-08 14:18:09 -04:00
Vincentius Robby
1db9e1fb8f
port: Implement cache for port interfaces and ranges
...
--HG--
extra : convert_revision : d7cbec7c277fb8f4d8846203caae36ce629602d5
2007-08-04 16:05:55 -04:00
Steve Reinhardt
62aa1d7f55
cache: get rid of obsolete params from python.
...
--HG--
extra : convert_revision : cd40e0ef938ef6da1cccedf7be01c3ac5b4883fb
2007-08-03 03:51:13 -04:00
Steve Reinhardt
2f93db6f95
memory system: fix functional access bug.
...
Make sure not to keep processing functional accesses
after they've been responded to.
Also use checkFunctional() return value instead of checking
packet command field where possible, mostly just for consistency.
--HG--
extra : convert_revision : 29fc76bc18731bd93a4ed05a281297827028ef75
2007-07-29 20:17:03 -07:00
Steve Reinhardt
4a7d0c4b79
bus: take out response prioritization (timing was messed up).
...
Also make express snoops not occupy bus (since they're magic).
--HG--
extra : convert_revision : 75aa5211a59380026d1e3f122778425e48e2edcd
2007-07-29 13:24:48 -07:00
Steve Reinhardt
8705b0799b
packet: get rid of unused intersect() function.
...
--HG--
extra : convert_revision : f0a2947ccc49e0d18bc17a59371fa396d9ebd6c0
2007-07-27 12:46:55 -07:00
Steve Reinhardt
0cbcb715e0
cache/memtest: fixes for functional accesses.
...
--HG--
extra : convert_revision : 688ba4d882cad2c96cf44c9e46999f74266e02ee
2007-07-27 12:46:45 -07:00