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3731 commits

Author SHA1 Message Date
Brad Beckmann
4f044605e8 ruby: Adds configurable bit selection for numa mapping 2010-03-21 21:22:21 -07:00
Brad Beckmann
8b15ed7ebf ruby: Added flag to disable mem_vec allocation 
The RubySystem flag no_mem_vec will disable Ruby from allocating it's memory
data array.
 2010-03-21 21:22:21 -07:00
Brad Beckmann
92cfd1cac7 ruby: Ruby support for sparse memory 
The patch includes direct support for the MI example protocol.
 2010-03-21 21:22:21 -07:00
Brad Beckmann
b5e4c3cbf2 ruby: Finally removed bash code cira. 2001ish! 2010-03-21 21:22:21 -07:00
Brad Beckmann
6d22db4eaa ruby: Ruby support for LLSC 2010-03-21 21:22:21 -07:00
Brad Beckmann
f53287f9ad ruby: Minor dma latency initialization fix 2010-03-21 21:22:21 -07:00
Tushar Krishna
7c20d5511a ruby: Fix multiple wakeups in Ruby Eventqueue 
Fix bug in Ruby Event queue to avoid multiple wakeups of same consumer in
same cycle
 2010-03-21 21:22:21 -07:00
Brad Beckmann
103f5a2c94 ruby: Removed the obsolete file specified network files 2010-03-21 21:22:21 -07:00
Brad Beckmann
d464087101 ruby: Added copyright to many Ruby *.py files 2010-03-21 21:22:20 -07:00
Brad Beckmann
378fbce911 ruby: Fixed small data msg bug in MOESI_hammer-dir 2010-03-21 21:22:20 -07:00
Brad Beckmann
4ee3b0da45 TimingSimpleCPU: Fixed uncacacheable request read bug 
Previously the recording of an uncached read occurred after the request was
possibly deleted within the translateTiming function.
 2010-03-21 21:22:20 -07:00
Brad Beckmann
0368ef915a ruby: Removed the no longer used rubymem files 2010-03-21 21:22:20 -07:00
Brad Beckmann
c48a735336 ruby: Fix MOESI_hammer cache profiler calls for L2 misses 2010-03-21 21:22:20 -07:00
Brad Beckmann
391b4e64e6 ruby: Removed deprecated stats from the main profiler 2010-03-21 21:22:20 -07:00
Nathan Binkert
86207a69e4 orion: Make declarations match definition 2010-03-16 08:15:16 -07:00
Nathan Binkert
edb59ed263 ruby: Fix copyrights on files 
Mostly files missed during import or screwed up during import
 2010-03-14 20:58:45 -07:00
Nathan Binkert
0bbf63f17a slicc: Change the code generation so that the generated code is easier to read 2010-03-12 18:42:56 -08:00
Nathan Binkert
c8f296bca0 packet: add a method to set the size 2010-03-12 17:31:08 -08:00
Nathan Binkert
671faf3316 eventq: rearrange a little bit so I can add some stuff 2010-03-12 17:31:04 -08:00
Nathan Binkert
402f42ebfa eventq: remove some unused includes 2010-03-12 17:31:02 -08:00
Nathan Binkert
fce7c820f4 bugfix: since pow() causes a bug don't use it 
It's a power of two anyway, so why use it in the first place.
 2010-03-12 15:11:09 -08:00
Nathan Binkert
140785d24c ruby: get rid of std-includes.hh 
Do not use "using namespace std;" in headers
Include header files as needed
 2010-03-10 18:33:11 -08:00
Nathan Binkert
1badec39a9 ruby: remove calc_host.diff since we don't use it 2010-03-10 16:22:27 -08:00
Nathan Binkert
226eaf9ddf ruby: get rid of the ioutil stuff since it isn't used anymore 2010-03-10 16:22:26 -08:00
Nathan Binkert
cf86532857 slicc: have a central mechanism for creating a code_formatter. 
This makes it easier to add global variables like protocol
 2010-03-10 16:22:26 -08:00
Nathan Binkert
1068ca85d0 scons: import ply to work around scons sys.path weirdness 2010-03-10 15:39:34 -08:00
Nathan Binkert
25aac791de SmartDict: Make SmartDict an attrdict 2010-02-28 19:28:09 -08:00
Nathan Binkert
ebdd004eb2 uart: use integer versions of time instead of messing around with floats 2010-02-28 19:28:09 -08:00
Nathan Binkert
f0b4259e98 cpu_models: get rid of cpu_models.py and move the stuff into SCons 2010-02-26 18:14:48 -08:00
Nathan Binkert
ac106767c8 isa_parser: Make SCons import the isa_parser 
this is instead of forking a new interpreter
 2010-02-26 18:14:48 -08:00
Nathan Binkert
629e8df196 isa_parser: move the operand map stuff into the ISAParser class. 2010-02-26 18:14:48 -08:00
Nathan Binkert
4db57edade isa_parser: move more support functions into the ISAParser class 2010-02-26 18:14:48 -08:00
Nathan Binkert
5ad139375e isa_parser: move more stuff into the ISAParser class 2010-02-26 18:14:48 -08:00
Nathan Binkert
4ef6e129d6 isa_parser: move the formatMap and exportContext into the ISAParser class 2010-02-26 18:14:48 -08:00
Nathan Binkert
4e105f6fe1 isa_parser: Make stack objects class members instead of globals 2010-02-26 18:14:48 -08:00
Nathan Binkert
b4178b1ae7 isa_parser: add a debug variable that changes how errors are reported. 
This allows us to get tracebacks in certain cases where they're more
useful than our error message.
 2010-02-26 18:14:48 -08:00
Nathan Binkert
40a05f04fb isa_parser: Use an exception to flag error 
This allows the error to propagate more easily
 2010-02-26 18:14:48 -08:00
Nathan Binkert
f82a92925c isa_parser: Move more stuff into the ISAParser class 2010-02-26 18:14:48 -08:00
Nathan Binkert
f7a627338c isa_parser: move code around to prepare for putting more stuff in the class 2010-02-26 18:14:48 -08:00
Nathan Binkert
eb4ce01056 isa_parser: simple fixes, formatting and style 2010-02-26 18:14:48 -08:00
Nathan Binkert
a9f6c8edc3 events: Give EventWrapped a default name and description 2010-02-26 18:09:41 -08:00
Lisa Hsu
7f3cd9a9fd cache stats: account for writebacks and/or device occupancy in the cache. 
Plus, a minor bugfix that neglects to update blk->contextSrc in certain cases on a cache insert.
 2010-02-24 13:46:55 -08:00
Lisa Hsu
1d3228481f cache: Make caches sharing aware and add occupancy stats. 
On the config end, if a shared L2 is created for the system, it is
parameterized to have n sharers as defined by option.num_cpus. In addition to
making the cache sharing aware so that discriminating tag policies can make use
of context_ids to make decisions, I added an occupancy AverageStat and an occ %
stat to each cache so that you could know which contexts are occupying how much
cache on average, both in terms of blocks and percentage. Note that since
devices have context_id -1, having an array of occ stats that correspond to
each context_id will break here, so in FS mode I add an extra bucket for device
blocks. This bucket is explicitly not added in SE mode in order to not only
avoid ugliness in the stats.txt file, but to avoid broken stats (some formulas
break when a bucket is 0).
 2010-02-23 09:34:22 -08:00
Lisa Hsu
be4cf50c5a stats: this makes some fixes to AverageStat and AverageVector. 
Also, make Formulas work on AverageVector.  First, Stat::Average (and thus
Stats::AverageVector) was broken when coming out of a checkpoint and on resets,
this fixes that.  Formulas also didn't work with AverageVector, but added
support for that.
 2010-02-23 09:33:18 -08:00
Lisa Hsu
2ad386f104 cache: pull CacheSet out of LRU so that other tags can use associative sets. 2010-02-23 09:33:09 -08:00
Timothy M. Jones
a5feaa6a69 BaseDynInst: Preserve the faults returned from read and write. 
When implementing timing address translations instead of atomic, I
forgot to preserve the faults that are returned from the read and
write calls.  This patch reinstates them.
 2010-02-20 20:11:58 +00:00
Timothy M. Jones
29e8bcead5 O3PCU: Split loads and stores that cross cache line boundaries. 
When each load or store is sent to the LSQ, we check whether it will cross a
cache line boundary and, if so, split it in two. This creates two TLB
translations and two memory requests. Care has to be taken if the first
packet of a split load is sent but the second blocks the cache. Similarly,
for a store, if the first packet cannot be sent, we must store the second
one somewhere to retry later.

This modifies the LSQSenderState class to record both packets in a split
load or store.

Finally, a new const variable, HasUnalignedMemAcc, is added to each ISA
to indicate whether unaligned memory accesses are allowed. This is used
throughout the changed code so that compiler can optimise away code dealing
with split requests for ISAs that don't need them.
 2010-02-12 19:53:20 +00:00
Timothy M. Jones
7fe9f92cfc BaseDynInst: Make the TLB translation timing instead of atomic. 
This initiates a timing translation and passes the read or write on to the
processor before waiting for it to finish. Once the translation is finished,
the instruction's state is updated via the 'finish' function. A new
DataTranslation class is created to handle this.

The idea is taken from the implementation of timing translations in
TimingSimpleCPU by Gabe Black. This patch also separates out the timing
translations from this CPU and uses the new DataTranslation class.
 2010-02-12 19:53:19 +00:00
Timothy M. Jones
dd60902152 Power ISA: Add an alignment fault to Power ISA and check alignment in TLB. 2010-02-12 19:53:19 +00:00
Brad Beckmann
64999b4343 ruby: fixed data block assignment fix 
Fixed data block assignment to not delete if not internally allocated.
 2010-02-10 16:40:54 -08:00
Brad Beckmann
714865e4a4 ruby: Initialize sender in MI_example-dir 2010-02-10 16:40:54 -08:00
Brad Beckmann
a407675106 ruby: Fixed slicc to initialize the m_is_blocking flag 2010-02-10 16:40:54 -08:00
Brad Beckmann
1d4c3ecdc3 ruby: Added FS support to the simple mesh topology 
Added full-system support to the simple mesh toplogy by allowing dma contrllers
to be attached to router zero in the network.
 2010-02-01 14:27:16 -08:00
Brad Beckmann
db2ecbb6b6 ruby: Set default protocol back to MI_example 2010-02-01 11:07:38 -08:00
Korey Sewell
c7f6e2661c inorder: double delete inst bug 
Make sure that instructions are dereferenced/deleted twice by marking they are
on the remove list
 2010-01-31 18:30:59 -05:00
Korey Sewell
9357e353fc inorder: inst count mgmt 2010-01-31 18:30:48 -05:00
Korey Sewell
be6724f7e7 inorder: implement split stores 2010-01-31 18:30:43 -05:00
Korey Sewell
6939482c49 inorder: implement split loads 2010-01-31 18:30:35 -05:00
Korey Sewell
ea8909925f inorder: add activity stats 2010-01-31 18:30:24 -05:00
Korey Sewell
f3bc2df663 inorder: object cleanup in destructors 2010-01-31 18:30:08 -05:00
Korey Sewell
1a89e8f4cb inorder: user per-thread dummy insts/reqs 2010-01-31 18:29:59 -05:00
Korey Sewell
002f1b8b7e inorder: add execution unit stats 2010-01-31 18:29:49 -05:00
Korey Sewell
82c5a754e6 inorder: recvRetry bug fix 
- on certain retry requests you can get an assertion failure
- fix by allowing the request to literally "Retry" itself
  if it wasnt successful before, and then block any requests
  through cache port while waiting for the cache to be
  made available for access
 2010-01-31 18:29:18 -05:00
Korey Sewell
349d86c0e4 inorder-stats: add prereq to basic stat 
only show requests processed when the resource is actually in use
 2010-01-31 18:29:06 -05:00
Korey Sewell
0b29c2d057 inorder: ctxt switch stats 
- m5 line enforcement on use_def.cc,hh
 2010-01-31 18:28:59 -05:00
Korey Sewell
ffa9ecb1fa inorder: pipeline stage stats 
add idle/run/utilization stats for each pipeline stage
 2010-01-31 18:28:51 -05:00
Korey Sewell
4d749472e3 inorder: enforce stage bandwidth 
each stage keeps track of insts_processed on a per_thread basis but we should
be keeping that on a total basis inorder to enforce stage width limits
 2010-01-31 18:28:31 -05:00
Korey Sewell
b4e0ef7837 inorder: set thread status' 
set Active/Suspended/Halted status for threads.  useful for system when determining
if/when to exit simulation
 2010-01-31 18:28:12 -05:00
Korey Sewell
5e0b8337ed inorder: add/remove halt/deallocate context respectively 
Halt is called from the exit() system call while
deallocate is unused. So to clear up things, just
use halt and remove deallocate.
 2010-01-31 18:28:05 -05:00
Korey Sewell
069b38c0d5 inorder: track last branch committed 
when threads are switching in/out the CPU, we need to keep
track of special cases like branches. Add appropriate
variables in ThreadState t track this and then use
these variables when updating pc after context switch
 2010-01-31 18:27:58 -05:00
Korey Sewell
aacc5cb205 inorder: add updatePC event to resPool 
this will be used for when a thread comes back from a cache miss, it needs to update the PCs
because the inst might of been a branch or delayslot in which the next PC isnt always
a straight addition
 2010-01-31 18:27:49 -05:00
Korey Sewell
90d3b45a56 inorder: ready thread wakeup 
allow a thread to wakeup and be activated after
it has been in suspended state and another
thread is switched out. Need to give
pipeline stages a "activateThread" function
so that can get to their suspended instruction
when the time is right.
 2010-01-31 18:27:38 -05:00
Korey Sewell
3eb04b4ad7 inorder: add threadmodel flag 
this prints out messages relative to what
threading model is being used (smt, switch-on-miss, single, etc.)
 2010-01-31 18:27:25 -05:00
Korey Sewell
611a8642c2 inorder: mem. mgmt. update 
update address List and address Map to take
into account multiple threads
 2010-01-31 18:27:12 -05:00
Korey Sewell
4dbc2f1718 inorder: suspend in respool 
give resources their own specific
activity to do for a "suspend" event
instead of defaulting to deactivating the thread for a
suspend thread event. This really matters
for the fetch sequence unit which wants to remove the
thread from fetching while other units want to
ignore a thread suspension. If you deactivate a thread
in a resource then you may lose some of the allotted
bandwidth that the thread is taking up...
 2010-01-31 18:27:02 -05:00
Korey Sewell
4ea296e296 inorder: fetch thread bug 
dont check total # of threads but instead all
active threads
 2010-01-31 18:26:54 -05:00
Korey Sewell
96b493d315 inorder: ready/suspend status fns 
update/add in the use of isThreadReady & isThreadSuspended
functions.Check in activateThread what list a thread is
on so it can be managed accordingly.
 2010-01-31 18:26:47 -05:00
Korey Sewell
d9eaa2fe21 inorder-cleanup: remove unused thread functions 2010-01-31 18:26:40 -05:00
Korey Sewell
e1fcc64980 inorder: activate thread on cache miss 
-Support ability to activate next ready thread after a cache miss
through the activateNextReadyContext/Thread() functions
-To support this a "readyList" of thread ids is added
-After a cache miss, thread will suspend and then call
activitynextreadythread
 2010-01-31 18:26:32 -05:00
Korey Sewell
4a945aab19 inorder: add event priority offset 
allow for events to schedule themselves later if desired. this is important
because of cases like where you need to activate a thread only after the previous
thread has been deactivated. The ordering there has to be enforced
 2010-01-31 18:26:26 -05:00
Korey Sewell
eac5eac67a inorder: squash on memory stall 
add code to recognize memory stalls in resources and the pipeline as well
as squash a thread if there is a stall and we are in the switch on cache miss
model
 2010-01-31 18:26:13 -05:00
Korey Sewell
d8e0935af2 inorder: add insts to cpu event 
some events are going to need instruction data when they process, so just
include the instruction in the event construction
 2010-01-31 18:26:03 -05:00
Korey Sewell
e8312ab6f7 inorder: switch out buffer 
add buffer for instructions to switch out to in a pipeline stage
can't squash the instruction and remove the pipeline so we kind of need
to 'suspend' an instruction at the stage while the memory stall resolves
for the switch on cache miss model
 2010-01-31 18:25:48 -05:00
Korey Sewell
a892af7b26 inorder: dont allow early loads 
- loads were happening on same cycle as the address was generated which is slightly
unrealistic. Instead, force address generation to be on separate cycle from load
initiation
- also, mark the stages in a more traditional way (F-D-X-M-W)
 2010-01-31 18:25:27 -05:00
Korey Sewell
0e96798fe0 configs/inorder: add options for switch-on-miss to inorder cpu 2010-01-31 18:25:13 -05:00
Korey Sewell
7b3b362ba5 inorder: init internal debug cpu counters 
- cpuEventNum
- resReqCount
 2010-01-31 17:18:15 -05:00
Brad Beckmann
ab2f864af2 m5: Regression Tester Update 
This patch includes the necessary regression updates to test the new ruby
configuration system.  The patch includes support for multiple ruby protocols
and adds the ruby random tester.  The patch removes atomic mode test for
ruby since ruby does not support atomic mode acceses.  These tests can be
added back in when ruby supports atomic mode for real.

--HG--
rename : tests/quick/50.memtest/test.py => tests/quick/60.rubytest/test.py
 2010-01-29 20:29:40 -08:00
Brad Beckmann
ceae8383ff ruby: Replaced gems_common debug statements 
Replaced Ruby debug statements with M5 statements.
 2010-01-29 20:29:34 -08:00
Brad Beckmann
143d8ea698 ruby: removed last level cache support 
Removed the last level cache support and MOESI_hammer's dependency on it.
Replaces the LLC support with the more generic MachineType count.
 2010-01-29 20:29:34 -08:00
Brad Beckmann
90aab239a1 ruby: Added a Scons option to prevent HTML file creation 2010-01-29 20:29:33 -08:00
Brad Beckmann
1feae85017 ruby: Removed static members in RubyPort including hitcallback 
Removed static members in RubyPort and removed the ruby request unique id.
 2010-01-29 20:29:33 -08:00
Brad Beckmann
a579d3e43c ruby: Removed the old config interface 
Removed the old config interface from RubySystem and libruby.
 2010-01-29 20:29:33 -08:00
Brad Beckmann
e4218dd08f ruby: Re-enabled orion power models 
Removed the dummy power function implementations so that Orion can implement
them correctly.  Since Orion lacks modular design, this patch simply enables
scons to compile it.  There are no python configuration changes in this patch.
 2010-01-29 20:29:33 -08:00
Brad Beckmann
8dd45674ae ruby: Converted Garnet to M5 configuration 2010-01-29 20:29:32 -08:00
Steve Reinhardt
b544462505 Garnet: reorganize directory tree. 
Rename the ruby/network/garnet-foo directories to garnet/foo.
Move the common NetworkHeader.hh file from garnet-fixed-pipeline
up to the common garnet directory.
Fix up include paths.

--HG--
rename : src/mem/ruby/network/garnet-fixed-pipeline/NetworkHeader.hh => src/mem/ruby/network/garnet/NetworkHeader.hh
rename : src/mem/ruby/network/garnet-fixed-pipeline/CreditLink_d.hh => src/mem/ruby/network/garnet/fixed-pipeline/CreditLink_d.hh
rename : src/mem/ruby/network/garnet-fixed-pipeline/GarnetNetwork_d.cc => src/mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.cc
rename : src/mem/ruby/network/garnet-fixed-pipeline/GarnetNetwork_d.hh => src/mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.hh
rename : src/mem/ruby/network/garnet-fixed-pipeline/InputUnit_d.cc => src/mem/ruby/network/garnet/fixed-pipeline/InputUnit_d.cc
rename : src/mem/ruby/network/garnet-fixed-pipeline/InputUnit_d.hh => src/mem/ruby/network/garnet/fixed-pipeline/InputUnit_d.hh
rename : src/mem/ruby/network/garnet-fixed-pipeline/NetworkInterface_d.cc => src/mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.cc
rename : src/mem/ruby/network/garnet-fixed-pipeline/NetworkInterface_d.hh => src/mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.hh
rename : src/mem/ruby/network/garnet-fixed-pipeline/NetworkLink_d.cc => src/mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.cc
rename : src/mem/ruby/network/garnet-fixed-pipeline/NetworkLink_d.hh => src/mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.hh
rename : src/mem/ruby/network/garnet-fixed-pipeline/OutVcState_d.cc => src/mem/ruby/network/garnet/fixed-pipeline/OutVcState_d.cc
rename : src/mem/ruby/network/garnet-fixed-pipeline/OutVcState_d.hh => src/mem/ruby/network/garnet/fixed-pipeline/OutVcState_d.hh
rename : src/mem/ruby/network/garnet-fixed-pipeline/OutputUnit_d.cc => src/mem/ruby/network/garnet/fixed-pipeline/OutputUnit_d.cc
rename : src/mem/ruby/network/garnet-fixed-pipeline/OutputUnit_d.hh => src/mem/ruby/network/garnet/fixed-pipeline/OutputUnit_d.hh
rename : src/mem/ruby/network/garnet-fixed-pipeline/Router_d.cc => src/mem/ruby/network/garnet/fixed-pipeline/Router_d.cc
rename : src/mem/ruby/network/garnet-fixed-pipeline/Router_d.hh => src/mem/ruby/network/garnet/fixed-pipeline/Router_d.hh
rename : src/mem/ruby/network/garnet-fixed-pipeline/RoutingUnit_d.cc => src/mem/ruby/network/garnet/fixed-pipeline/RoutingUnit_d.cc
rename : src/mem/ruby/network/garnet-fixed-pipeline/RoutingUnit_d.hh => src/mem/ruby/network/garnet/fixed-pipeline/RoutingUnit_d.hh
rename : src/mem/ruby/network/garnet-fixed-pipeline/SConscript => src/mem/ruby/network/garnet/fixed-pipeline/SConscript
rename : src/mem/ruby/network/garnet-fixed-pipeline/SWallocator_d.cc => src/mem/ruby/network/garnet/fixed-pipeline/SWallocator_d.cc
rename : src/mem/ruby/network/garnet-fixed-pipeline/SWallocator_d.hh => src/mem/ruby/network/garnet/fixed-pipeline/SWallocator_d.hh
rename : src/mem/ruby/network/garnet-fixed-pipeline/Switch_d.cc => src/mem/ruby/network/garnet/fixed-pipeline/Switch_d.cc
rename : src/mem/ruby/network/garnet-fixed-pipeline/Switch_d.hh => src/mem/ruby/network/garnet/fixed-pipeline/Switch_d.hh
rename : src/mem/ruby/network/garnet-fixed-pipeline/VCallocator_d.cc => src/mem/ruby/network/garnet/fixed-pipeline/VCallocator_d.cc
rename : src/mem/ruby/network/garnet-fixed-pipeline/VCallocator_d.hh => src/mem/ruby/network/garnet/fixed-pipeline/VCallocator_d.hh
rename : src/mem/ruby/network/garnet-fixed-pipeline/VirtualChannel_d.cc => src/mem/ruby/network/garnet/fixed-pipeline/VirtualChannel_d.cc
rename : src/mem/ruby/network/garnet-fixed-pipeline/VirtualChannel_d.hh => src/mem/ruby/network/garnet/fixed-pipeline/VirtualChannel_d.hh
rename : src/mem/ruby/network/garnet-fixed-pipeline/flitBuffer_d.cc => src/mem/ruby/network/garnet/fixed-pipeline/flitBuffer_d.cc
rename : src/mem/ruby/network/garnet-fixed-pipeline/flitBuffer_d.hh => src/mem/ruby/network/garnet/fixed-pipeline/flitBuffer_d.hh
rename : src/mem/ruby/network/garnet-fixed-pipeline/flit_d.cc => src/mem/ruby/network/garnet/fixed-pipeline/flit_d.cc
rename : src/mem/ruby/network/garnet-fixed-pipeline/flit_d.hh => src/mem/ruby/network/garnet/fixed-pipeline/flit_d.hh
rename : src/mem/ruby/network/garnet-flexible-pipeline/FlexibleConsumer.hh => src/mem/ruby/network/garnet/flexible-pipeline/FlexibleConsumer.hh
rename : src/mem/ruby/network/garnet-flexible-pipeline/GarnetNetwork.cc => src/mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.cc
rename : src/mem/ruby/network/garnet-flexible-pipeline/GarnetNetwork.hh => src/mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.hh
rename : src/mem/ruby/network/garnet-flexible-pipeline/InVcState.cc => src/mem/ruby/network/garnet/flexible-pipeline/InVcState.cc
rename : src/mem/ruby/network/garnet-flexible-pipeline/InVcState.hh => src/mem/ruby/network/garnet/flexible-pipeline/InVcState.hh
rename : src/mem/ruby/network/garnet-flexible-pipeline/NetworkConfig.hh => src/mem/ruby/network/garnet/flexible-pipeline/NetworkConfig.hh
rename : src/mem/ruby/network/garnet-flexible-pipeline/NetworkInterface.cc => src/mem/ruby/network/garnet/flexible-pipeline/NetworkInterface.cc
rename : src/mem/ruby/network/garnet-flexible-pipeline/NetworkInterface.hh => src/mem/ruby/network/garnet/flexible-pipeline/NetworkInterface.hh
rename : src/mem/ruby/network/garnet-flexible-pipeline/NetworkLink.cc => src/mem/ruby/network/garnet/flexible-pipeline/NetworkLink.cc
rename : src/mem/ruby/network/garnet-flexible-pipeline/NetworkLink.hh => src/mem/ruby/network/garnet/flexible-pipeline/NetworkLink.hh
rename : src/mem/ruby/network/garnet-flexible-pipeline/OutVcState.cc => src/mem/ruby/network/garnet/flexible-pipeline/OutVcState.cc
rename : src/mem/ruby/network/garnet-flexible-pipeline/OutVcState.hh => src/mem/ruby/network/garnet/flexible-pipeline/OutVcState.hh
rename : src/mem/ruby/network/garnet-flexible-pipeline/Router.cc => src/mem/ruby/network/garnet/flexible-pipeline/Router.cc
rename : src/mem/ruby/network/garnet-flexible-pipeline/Router.hh => src/mem/ruby/network/garnet/flexible-pipeline/Router.hh
rename : src/mem/ruby/network/garnet-flexible-pipeline/SConscript => src/mem/ruby/network/garnet/flexible-pipeline/SConscript
rename : src/mem/ruby/network/garnet-flexible-pipeline/VCarbiter.cc => src/mem/ruby/network/garnet/flexible-pipeline/VCarbiter.cc
rename : src/mem/ruby/network/garnet-flexible-pipeline/VCarbiter.hh => src/mem/ruby/network/garnet/flexible-pipeline/VCarbiter.hh
rename : src/mem/ruby/network/garnet-flexible-pipeline/flit.cc => src/mem/ruby/network/garnet/flexible-pipeline/flit.cc
rename : src/mem/ruby/network/garnet-flexible-pipeline/flit.hh => src/mem/ruby/network/garnet/flexible-pipeline/flit.hh
rename : src/mem/ruby/network/garnet-flexible-pipeline/flitBuffer.cc => src/mem/ruby/network/garnet/flexible-pipeline/flitBuffer.cc
rename : src/mem/ruby/network/garnet-flexible-pipeline/flitBuffer.hh => src/mem/ruby/network/garnet/flexible-pipeline/flitBuffer.hh
rename : src/mem/ruby/network/garnet-flexible-pipeline/netconfig.defaults => src/mem/ruby/network/garnet/flexible-pipeline/netconfig.defaults
 2010-01-29 20:29:30 -08:00
Brad Beckmann
6c867f8263 ruby: Added a mesh topology 2010-01-29 20:29:27 -08:00
Brad Beckmann
faa76fc248 ruby: MESI_CMP_directory updated to the new config system 2010-01-29 20:29:27 -08:00
Brad Beckmann
3e286d825d ruby: Sorted the file includes to maintain consistency 2010-01-29 20:29:26 -08:00
Brad Beckmann
5fb1f5c72b ruby: Renamed the MESI directory sm file 
Renamed the MESI directory file to be consistent with all other protocols.

--HG--
rename : src/mem/protocol/MESI_CMP_directory-mem.sm => src/mem/protocol/MESI_CMP_directory-dir.sm
 2010-01-29 20:29:26 -08:00
Brad Beckmann
79f354466e ruby: Removed the GPL header in MESI_CMP_directory-msg 
I'm not sure how this got past our initial ruby code import, but this obviously
needed to be removed.
 2010-01-29 20:29:26 -08:00