Power ISA: Add an alignment fault to Power ISA and check alignment in TLB.
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64999b4343
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3 changed files with 48 additions and 2 deletions
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@ -76,6 +76,22 @@ class MachineCheckFault : public PowerFault
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};
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class AlignmentFault : public PowerFault
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{
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public:
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AlignmentFault()
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: PowerFault("Alignment")
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{
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}
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bool
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isAlignmentFault() const
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{
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return true;
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}
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};
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static inline Fault
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genMachineCheckFault()
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{
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@ -281,9 +281,27 @@ TLB::regStats()
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}
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Fault
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TLB::translateAtomic(RequestPtr req, ThreadContext *tc, Mode mode)
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TLB::translateInst(RequestPtr req, ThreadContext *tc)
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{
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// Instruction accesses must be word-aligned
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if (req->getVaddr() & 0x3) {
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DPRINTF(TLB, "Alignment Fault on %#x, size = %d\n", req->getVaddr(),
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req->getSize());
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return new AlignmentFault();
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}
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Process * p = tc->getProcessPtr();
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Fault fault = p->pTable->translate(req);
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if (fault != NoFault)
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return fault;
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return NoFault;
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}
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Fault
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TLB::translateData(RequestPtr req, ThreadContext *tc, bool write)
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{
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#if !FULL_SYSTEM
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Process * p = tc->getProcessPtr();
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Fault fault = p->pTable->translate(req);
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@ -291,6 +309,16 @@ TLB::translateAtomic(RequestPtr req, ThreadContext *tc, Mode mode)
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return fault;
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return NoFault;
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}
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Fault
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TLB::translateAtomic(RequestPtr req, ThreadContext *tc, Mode mode)
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{
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#if !FULL_SYSTEM
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if (mode == Execute)
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return translateInst(req, tc);
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else
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return translateData(req, tc, mode == Write);
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#else
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fatal("translate atomic not yet implemented\n");
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#endif
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@ -156,6 +156,8 @@ class TLB : public BaseTLB
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// static helper functions... really
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static bool validVirtualAddress(Addr vaddr);
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static Fault checkCacheability(RequestPtr &req);
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Fault translateInst(RequestPtr req, ThreadContext *tc);
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Fault translateData(RequestPtr req, ThreadContext *tc, bool write);
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Fault translateAtomic(RequestPtr req, ThreadContext *tc, Mode mode);
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void translateTiming(RequestPtr req, ThreadContext *tc,
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Translation *translation, Mode mode);
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