gem5/arch/alpha
Gabe Black 8e4ec55703 Changed the floating point register file into a class with appropriate accessor functions. The width of the floating point register to access can be specified, and if not, it will be accessed at its "natural" width. That is, the width of each individual register. Also, the functions which access the bit representation of floating point registers can use the blahblahBits functions now instead of blahblahInt.
arch/alpha/arguments.cc:
    Renamed readFloatRegInt to readFloatRegBits
arch/alpha/ev5.cc:
    Removed the Double from setFloatRegDouble
arch/alpha/registerfile.hh:
    Changed the floating point register file from a union of arrays to a class with appropriate accessor functions. The interface is necessary for SPARC.
arch/alpha/types.hh:
    Changed the FloatReg type from a union of uint64_t and double to a double, and defined a new type FloatRegBits which is a uint64_t and is used to return the bits which compose a floating point register rather than the value of the register.
arch/isa_parser.py:
    Adjusted the makeRead and makeWrite functions to generate the new versions of readFloatReg and setFloatReg.
base/remote_gdb.cc:
kern/tru64/tru64.hh:
    Replaced setFloatRegInt with setFloatRegBits
cpu/cpu_exec_context.cc:
    Removed the duplicated code for setting the floating point registers, and renamed the function to setFloatRegBits and readFloatRegBits.
cpu/cpu_exec_context.hh:
cpu/exec_context.hh:
cpu/o3/alpha_cpu_impl.hh:
cpu/o3/alpha_dyn_inst.hh:
cpu/o3/cpu.cc:
cpu/o3/cpu.hh:
cpu/o3/regfile.hh:
cpu/ozone/cpu.hh:
cpu/simple/cpu.hh:
    Implemented the new versions of the floating point read and set functions.
cpu/simple/cpu.cc:
    Replaced setFloatRegDouble with setFloatReg

--HG--
extra : convert_revision : 3dad06224723137f6033c335fb8f6395636767f2
2006-03-14 15:55:00 -05:00
..
freebsd Merge ktlim@zizzer:/bk/m5 2006-03-05 00:34:54 -05:00
isa Hand merge. Stuff probably doesn't compile. 2006-03-09 18:35:28 -05:00
linux It now runs hello world binary. 2006-03-10 16:59:02 -05:00
tru64 Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5 2006-03-12 01:07:58 -05:00
aout_machdep.h Many files: 2005-06-05 05:16:00 -04:00
arguments.cc Changed the floating point register file into a class with appropriate accessor functions. The width of the floating point register to access can be specified, and if not, it will be accessed at its "natural" width. That is, the width of each individual register. Also, the functions which access the bit representation of floating point registers can use the blahblahBits functions now instead of blahblahInt. 2006-03-14 15:55:00 -05:00
arguments.hh Many files: 2005-06-05 05:16:00 -04:00
ecoff_machdep.h Many files: 2005-06-05 04:21:22 -04:00
ev5.cc Changed the floating point register file into a class with appropriate accessor functions. The width of the floating point register to access can be specified, and if not, it will be accessed at its "natural" width. That is, the width of each individual register. Also, the functions which access the bit representation of floating point registers can use the blahblahBits functions now instead of blahblahInt. 2006-03-14 15:55:00 -05:00
ev5.hh Changes to untemplate StaticInst and StaticInstPtr, change the isa to a namespace instead of a class, an improvement to the architecture specific header file selection system, and fixed up a few include paths. 2006-02-19 02:34:37 -05:00
faults.cc Merge ktlim@zizzer:/bk/m5 2006-03-07 20:01:34 -05:00
faults.hh Some clean up work with faults. 2006-03-07 04:31:38 -05:00
isa_traits.hh Clean up "using" declarations. 2006-03-12 15:14:07 -05:00
osfpal.cc Many files: 2005-06-05 05:16:00 -04:00
osfpal.hh Many files: 2005-06-05 05:16:00 -04:00
process.cc Clean up arch/*/process.hh includes and std namespace issues. 2006-03-12 16:27:52 -05:00
process.hh Clean up arch/*/process.hh includes and std namespace issues. 2006-03-12 16:27:52 -05:00
registerfile.hh Changed the floating point register file into a class with appropriate accessor functions. The width of the floating point register to access can be specified, and if not, it will be accessed at its "natural" width. That is, the width of each individual register. Also, the functions which access the bit representation of floating point registers can use the blahblahBits functions now instead of blahblahInt. 2006-03-14 15:55:00 -05:00
SConscript no more common syscall emulation, now common for everyone 2006-03-09 15:42:09 -05:00
stacktrace.cc Updates for the quiesceEvent that was added to the XC. 2006-03-07 19:59:12 -05:00
stacktrace.hh Made Addr a global type 2006-02-21 03:38:21 -05:00
system.cc Added ev5.hh to files which should include it directly, now that it isn't included within isa_traits.hh 2006-03-10 17:56:41 -05:00
system.hh First cut at moving alpha specefic stuff out of /sim/system* into 2006-03-03 14:24:15 -05:00
tlb.cc Merge ktlim@zizzer:/bk/m5 2006-03-05 00:34:54 -05:00
tlb.hh Added ev5.hh to files which should include it directly, now that it isn't included within isa_traits.hh 2006-03-10 17:56:41 -05:00
types.hh Changed the floating point register file into a class with appropriate accessor functions. The width of the floating point register to access can be specified, and if not, it will be accessed at its "natural" width. That is, the width of each individual register. Also, the functions which access the bit representation of floating point registers can use the blahblahBits functions now instead of blahblahInt. 2006-03-14 15:55:00 -05:00
utility.hh Added registerfile.hh and utility.hh 2006-03-11 14:26:34 -05:00
vtophys.cc Steps towards setting up the infrastructure to allow the new CPU model to work in full system mode. 2006-03-04 15:18:40 -05:00
vtophys.hh Made Addr a global type 2006-02-21 03:38:21 -05:00