First cut at moving alpha specefic stuff out of /sim/system* into

arch/alpha/system*.

SConscript:
dev/alpha_console.cc:
dev/alpha_console.hh:
kern/freebsd/freebsd_system.cc:
kern/freebsd/freebsd_system.hh:
kern/kernel_stats.cc:
kern/linux/linux_system.cc:
kern/linux/linux_system.hh:
kern/tru64/tru64_system.cc:
kern/tru64/tru64_system.hh:
sim/pseudo_inst.cc:
sim/system.cc:
sim/system.hh:
    First cut at moving alpha specefic stuff out of /sim/system*

--HG--
extra : convert_revision : eba58f537fc04e605af4fc216e184b074a44c8a0
This commit is contained in:
Ali Saidi 2006-03-03 14:24:15 -05:00
parent 51647e7bec
commit 0bf25c5953
15 changed files with 447 additions and 322 deletions

View file

@ -212,6 +212,8 @@ mysql_sources = Split('''
# Full-system sources
full_system_sources = Split('''
arch/alpha/system.cc
base/crc.cc
base/inet.cc
base/remote_gdb.cc

298
arch/alpha/system.cc Normal file
View file

@ -0,0 +1,298 @@
/*
* Copyright (c) 2002-2005 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "arch/alpha/system.hh"
#include "base/remote_gdb.hh"
#include "base/loader/object_file.hh"
#include "base/loader/symtab.hh"
#include "base/trace.hh"
#include "mem/functional/memory_control.hh"
#include "mem/functional/physical.hh"
#include "sim/byteswap.hh"
#include "sim/builder.hh"
#include "targetarch/vtophys.hh"
using namespace LittleEndianGuest;
AlphaSystem::AlphaSystem(Params *p)
: System(p)
{
consoleSymtab = new SymbolTable;
palSymtab = new SymbolTable;
/**
* Load the pal, and console code into memory
*/
// Load Console Code
console = createObjectFile(params()->console_path);
if (console == NULL)
fatal("Could not load console file %s", params()->console_path);
// Load pal file
pal = createObjectFile(params()->palcode);
if (pal == NULL)
fatal("Could not load PALcode file %s", params()->palcode);
// Load program sections into memory
pal->loadSections(physmem, true);
console->loadSections(physmem, true);
// load symbols
if (!console->loadGlobalSymbols(consoleSymtab))
panic("could not load console symbols\n");
if (!pal->loadGlobalSymbols(palSymtab))
panic("could not load pal symbols\n");
if (!pal->loadLocalSymbols(palSymtab))
panic("could not load pal symbols\n");
if (!console->loadGlobalSymbols(debugSymbolTable))
panic("could not load console symbols\n");
if (!pal->loadGlobalSymbols(debugSymbolTable))
panic("could not load pal symbols\n");
if (!pal->loadLocalSymbols(debugSymbolTable))
panic("could not load pal symbols\n");
Addr addr = 0;
#ifndef NDEBUG
consolePanicEvent = addConsoleFuncEvent<BreakPCEvent>("panic");
#endif
/**
* Copy the osflags (kernel arguments) into the consoles
* memory. (Presently Linux does not use the console service
* routine to get these command line arguments, but Tru64 and
* others do.)
*/
if (consoleSymtab->findAddress("env_booted_osflags", addr)) {
Addr paddr = vtophys(physmem, addr);
char *osflags = (char *)physmem->dma_addr(paddr, sizeof(uint32_t));
if (osflags)
strcpy(osflags, params()->boot_osflags.c_str());
}
/**
* Set the hardware reset parameter block system type and revision
* information to Tsunami.
*/
if (consoleSymtab->findAddress("m5_rpb", addr)) {
Addr paddr = vtophys(physmem, addr);
char *hwrpb = (char *)physmem->dma_addr(paddr, sizeof(uint64_t));
if (!hwrpb)
panic("could not translate hwrpb addr\n");
*(uint64_t*)(hwrpb+0x50) = htog(params()->system_type);
*(uint64_t*)(hwrpb+0x58) = htog(params()->system_rev);
} else
panic("could not find hwrpb\n");
}
AlphaSystem::~AlphaSystem()
{
delete consoleSymtab;
delete console;
delete pal;
#ifdef DEBUG
delete consolePanicEvent;
#endif
}
/**
* This function fixes up addresses that are used to match PCs for
* hooking simulator events on to target function executions.
*
* Alpha binaries may have multiple global offset table (GOT)
* sections. A function that uses the GOT starts with a
* two-instruction prolog which sets the global pointer (gp == r29) to
* the appropriate GOT section. The proper gp value is calculated
* based on the function address, which must be passed by the caller
* in the procedure value register (pv aka t12 == r27). This sequence
* looks like the following:
*
* opcode Ra Rb offset
* ldah gp,X(pv) 09 29 27 X
* lda gp,Y(gp) 08 29 29 Y
*
* for some constant offsets X and Y. The catch is that the linker
* (or maybe even the compiler, I'm not sure) may recognize that the
* caller and callee are using the same GOT section, making this
* prolog redundant, and modify the call target to skip these
* instructions. If we check for execution of the first instruction
* of a function (the one the symbol points to) to detect when to skip
* it, we'll miss all these modified calls. It might work to
* unconditionally check for the third instruction, but not all
* functions have this prolog, and there's some chance that those
* first two instructions could have undesired consequences. So we do
* the Right Thing and pattern-match the first two instructions of the
* function to decide where to patch.
*
* Eventually this code should be moved into an ISA-specific file.
*/
Addr
AlphaSystem::fixFuncEventAddr(Addr addr)
{
// mask for just the opcode, Ra, and Rb fields (not the offset)
const uint32_t inst_mask = 0xffff0000;
// ldah gp,X(pv): opcode 9, Ra = 29, Rb = 27
const uint32_t gp_ldah_pattern = (9 << 26) | (29 << 21) | (27 << 16);
// lda gp,Y(gp): opcode 8, Ra = 29, rb = 29
const uint32_t gp_lda_pattern = (8 << 26) | (29 << 21) | (29 << 16);
// instruction size
const int sz = sizeof(uint32_t);
Addr paddr = vtophys(physmem, addr);
uint32_t i1 = *(uint32_t *)physmem->dma_addr(paddr, sz);
uint32_t i2 = *(uint32_t *)physmem->dma_addr(paddr+sz, sz);
if ((i1 & inst_mask) == gp_ldah_pattern &&
(i2 & inst_mask) == gp_lda_pattern) {
Addr new_addr = addr + 2*sz;
DPRINTF(Loader, "fixFuncEventAddr: %p -> %p", addr, new_addr);
return new_addr;
} else {
return addr;
}
}
void
AlphaSystem::setAlphaAccess(Addr access)
{
Addr addr = 0;
if (consoleSymtab->findAddress("m5AlphaAccess", addr)) {
Addr paddr = vtophys(physmem, addr);
uint64_t *m5AlphaAccess =
(uint64_t *)physmem->dma_addr(paddr, sizeof(uint64_t));
if (!m5AlphaAccess)
panic("could not translate m5AlphaAccess addr\n");
*m5AlphaAccess = htog(EV5::Phys2K0Seg(access));
} else
panic("could not find m5AlphaAccess\n");
}
bool
AlphaSystem::breakpoint()
{
return remoteGDB[0]->trap(ALPHA_KENTRY_INT);
}
void
AlphaSystem::serialize(std::ostream &os)
{
System::serialize(os);
consoleSymtab->serialize("console_symtab", os);
palSymtab->serialize("pal_symtab", os);
}
void
AlphaSystem::unserialize(Checkpoint *cp, const std::string &section)
{
System::unserialize(cp,section);
consoleSymtab->unserialize("console_symtab", cp, section);
palSymtab->unserialize("pal_symtab", cp, section);
}
BEGIN_DECLARE_SIM_OBJECT_PARAMS(AlphaSystem)
Param<Tick> boot_cpu_frequency;
SimObjectParam<MemoryController *> memctrl;
SimObjectParam<PhysicalMemory *> physmem;
Param<std::string> kernel;
Param<std::string> console;
Param<std::string> pal;
Param<std::string> boot_osflags;
Param<std::string> readfile;
Param<unsigned int> init_param;
Param<uint64_t> system_type;
Param<uint64_t> system_rev;
Param<bool> bin;
VectorParam<std::string> binned_fns;
Param<bool> bin_int;
END_DECLARE_SIM_OBJECT_PARAMS(AlphaSystem)
BEGIN_INIT_SIM_OBJECT_PARAMS(AlphaSystem)
INIT_PARAM(boot_cpu_frequency, "Frequency of the boot CPU"),
INIT_PARAM(memctrl, "memory controller"),
INIT_PARAM(physmem, "phsyical memory"),
INIT_PARAM(kernel, "file that contains the kernel code"),
INIT_PARAM(console, "file that contains the console code"),
INIT_PARAM(pal, "file that contains palcode"),
INIT_PARAM_DFLT(boot_osflags, "flags to pass to the kernel during boot",
"a"),
INIT_PARAM_DFLT(readfile, "file to read startup script from", ""),
INIT_PARAM_DFLT(init_param, "numerical value to pass into simulator", 0),
INIT_PARAM_DFLT(system_type, "Type of system we are emulating", 34),
INIT_PARAM_DFLT(system_rev, "Revision of system we are emulating", 1<<10),
INIT_PARAM_DFLT(bin, "is this system to be binned", false),
INIT_PARAM(binned_fns, "functions to be broken down and binned"),
INIT_PARAM_DFLT(bin_int, "is interrupt code binned seperately?", true)
END_INIT_SIM_OBJECT_PARAMS(AlphaSystem)
CREATE_SIM_OBJECT(AlphaSystem)
{
AlphaSystem::Params *p = new AlphaSystem::Params;
p->name = getInstanceName();
p->boot_cpu_frequency = boot_cpu_frequency;
p->memctrl = memctrl;
p->physmem = physmem;
p->kernel_path = kernel;
p->console_path = console;
p->palcode = pal;
p->boot_osflags = boot_osflags;
p->init_param = init_param;
p->readfile = readfile;
p->system_type = system_type;
p->system_rev = system_rev;
p->bin = bin;
p->binned_fns = binned_fns;
p->bin_int = bin_int;
return new AlphaSystem(p);
}
REGISTER_SIM_OBJECT("AlphaSystem", AlphaSystem)

109
arch/alpha/system.hh Normal file
View file

@ -0,0 +1,109 @@
/*
* Copyright (c) 2002-2005 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __ARCH_ALPHA_SYSTEM_HH__
#define __ARCH_ALPHA_SYSTEM_HH__
#include <string>
#include <vector>
#include "sim/system.hh"
#include "base/loader/symtab.hh"
#include "cpu/pc_event.hh"
#include "kern/system_events.hh"
#include "sim/sim_object.hh"
class AlphaSystem : public System
{
public:
struct Params : public System::Params
{
std::string console_path;
std::string palcode;
std::string boot_osflags;
uint64_t system_type;
uint64_t system_rev;
};
AlphaSystem(Params *p);
~AlphaSystem();
virtual bool breakpoint();
/**
* Serialization stuff
*/
public:
virtual void serialize(std::ostream &os);
virtual void unserialize(Checkpoint *cp, const std::string &section);
/**
* Set the m5AlphaAccess pointer in the console
*/
void setAlphaAccess(Addr access);
/** console symbol table */
SymbolTable *consoleSymtab;
/** pal symbol table */
SymbolTable *palSymtab;
/** Object pointer for the console code */
ObjectFile *console;
/** Object pointer for the PAL code */
ObjectFile *pal;
#ifndef NDEBUG
/** Event to halt the simulator if the console calls panic() */
BreakPCEvent *consolePanicEvent;
#endif
protected:
const Params *params() const { return (const Params *)_params; }
/** Add a function-based event to PALcode. */
template <class T>
T *AlphaSystem::addPalFuncEvent(const char *lbl)
{
return addFuncEvent<T>(palSymtab, lbl);
}
/** Add a function-based event to the console code. */
template <class T>
T *AlphaSystem::addConsoleFuncEvent(const char *lbl)
{
return addFuncEvent<T>(consoleSymtab, lbl);
}
virtual Addr fixFuncEventAddr(Addr addr);
};
#endif

View file

@ -34,6 +34,7 @@
#include <cstdio>
#include <string>
#include "arch/alpha/system.hh"
#include "base/inifile.hh"
#include "base/str.hh"
#include "base/trace.hh"
@ -50,13 +51,12 @@
#include "mem/functional/physical.hh"
#include "sim/builder.hh"
#include "sim/sim_object.hh"
#include "sim/system.hh"
using namespace std;
using namespace AlphaISA;
AlphaConsole::AlphaConsole(const string &name, SimConsole *cons, SimpleDisk *d,
System *s, BaseCPU *c, Platform *p,
AlphaSystem *s, BaseCPU *c, Platform *p,
MemoryController *mmu, Addr a,
HierParams *hier, Bus *pio_bus)
: PioDevice(name, p), disk(d), console(cons), system(s), cpu(c), addr(a)
@ -323,7 +323,7 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(AlphaConsole)
SimObjectParam<SimpleDisk *> disk;
SimObjectParam<MemoryController *> mmu;
Param<Addr> addr;
SimObjectParam<System *> system;
SimObjectParam<AlphaSystem *> system;
SimObjectParam<BaseCPU *> cpu;
SimObjectParam<Platform *> platform;
SimObjectParam<Bus*> pio_bus;

View file

@ -41,7 +41,7 @@
class BaseCPU;
class SimConsole;
class System;
class AlphaSystem;
class SimpleDisk;
/**
@ -90,7 +90,7 @@ class AlphaConsole : public PioDevice
SimConsole *console;
/** a pointer to the system we are running in */
System *system;
AlphaSystem *system;
/** a pointer to the CPU boot cpu */
BaseCPU *cpu;
@ -101,7 +101,7 @@ class AlphaConsole : public PioDevice
public:
/** Standard Constructor */
AlphaConsole(const std::string &name, SimConsole *cons, SimpleDisk *d,
System *s, BaseCPU *c, Platform *platform,
AlphaSystem *s, BaseCPU *c, Platform *platform,
MemoryController *mmu, Addr addr,
HierParams *hier, Bus *pio_bus);

View file

@ -33,6 +33,7 @@
*
*/
#include "arch/alpha/system.hh"
#include "base/loader/symtab.hh"
#include "cpu/exec_context.hh"
#include "kern/freebsd/freebsd_system.hh"
@ -49,7 +50,7 @@ using namespace std;
using namespace TheISA;
FreebsdSystem::FreebsdSystem(Params *p)
: System(p)
: AlphaSystem(p)
{
/**
* Any time DELAY is called just skip the function.
@ -143,7 +144,7 @@ END_INIT_SIM_OBJECT_PARAMS(FreebsdSystem)
CREATE_SIM_OBJECT(FreebsdSystem)
{
System::Params *p = new System::Params;
AlphaSystem::Params *p = new AlphaSystem::Params;
p->name = getInstanceName();
p->boot_cpu_frequency = boot_cpu_frequency;
p->memctrl = memctrl;

View file

@ -31,7 +31,7 @@
#include "kern/system_events.hh"
class FreebsdSystem : public System
class FreebsdSystem : public AlphaSystem
{
private:
class SkipCalibrateClocksEvent : public SkipFuncEvent

View file

@ -47,7 +47,7 @@ Statistics::Statistics(ExecContext *context)
: xc(context), idleProcess((Addr)-1), themode(kernel), lastModeTick(0),
iplLast(0), iplLastTick(0)
{
bin_int = xc->system->params->bin_int;
bin_int = xc->system->params()->bin_int;
}
void

View file

@ -35,6 +35,7 @@
* up boot time.
*/
#include "arch/alpha/system.hh"
#include "base/loader/symtab.hh"
#include "cpu/exec_context.hh"
#include "cpu/base.hh"
@ -53,7 +54,7 @@ using namespace std;
using namespace TheISA;
LinuxSystem::LinuxSystem(Params *p)
: System(p)
: AlphaSystem(p)
{
Addr addr = 0;
Addr paddr = 0;
@ -73,7 +74,7 @@ LinuxSystem::LinuxSystem(Params *p)
paddr = vtophys(physmem, CommandLine());
char *commandline = (char *)physmem->dma_addr(paddr, sizeof(uint64_t));
if (commandline)
strncpy(commandline, params->boot_osflags.c_str(), CommandLineSize);
strncpy(commandline, params()->boot_osflags.c_str(), CommandLineSize);
/**
* find the address of the est_cycle_freq variable and insert it
@ -146,7 +147,7 @@ LinuxSystem::LinuxSystem(Params *p)
printThreadEvent = NULL;
}
if (params->bin_int) {
if (params()->bin_int) {
intStartEvent = addPalFuncEvent<InterruptStartEvent>("sys_int_21");
if (!intStartEvent)
panic("could not find symbol: sys_int_21\n");
@ -277,7 +278,7 @@ END_INIT_SIM_OBJECT_PARAMS(LinuxSystem)
CREATE_SIM_OBJECT(LinuxSystem)
{
System::Params *p = new System::Params;
AlphaSystem::Params *p = new AlphaSystem::Params;
p->name = getInstanceName();
p->boot_cpu_frequency = boot_cpu_frequency;
p->memctrl = memctrl;

View file

@ -40,7 +40,7 @@ class PrintThreadInfo;
* It points to objects that are the system binaries to load and patches them
* appropriately to work in simulator.
*/
class LinuxSystem : public System
class LinuxSystem : public AlphaSystem
{
private:
class SkipDelayLoopEvent : public SkipFuncEvent

View file

@ -42,7 +42,7 @@
using namespace std;
Tru64System::Tru64System(Tru64System::Params *p)
: System(p)
: AlphaSystem(p)
{
Addr addr = 0;
if (kernelSymtab->findAddress("enable_async_printf", addr)) {
@ -136,7 +136,7 @@ END_INIT_SIM_OBJECT_PARAMS(Tru64System)
CREATE_SIM_OBJECT(Tru64System)
{
System::Params *p = new System::Params;
AlphaSystem::Params *p = new AlphaSystem::Params;
p->name = getInstanceName();
p->boot_cpu_frequency = boot_cpu_frequency;
p->memctrl = memctrl;

View file

@ -29,8 +29,9 @@
#ifndef __KERN_TRU64_TRU64_SYSTEM_HH__
#define __KERN_TRU64_TRU64_SYSTEM_HH__
#include "sim/system.hh"
#include "arch/alpha/system.hh"
#include "arch/isa_traits.hh"
#include "sim/system.hh"
class ExecContext;
@ -42,7 +43,7 @@ class DebugPrintfEvent;
class DumpMbufEvent;
class AlphaArguments;
class Tru64System : public System
class Tru64System : public AlphaSystem
{
private:
#ifdef DEBUG

View file

@ -171,7 +171,7 @@ namespace AlphaPseudo
uint64_t
readfile(ExecContext *xc, Addr vaddr, uint64_t len, uint64_t offset)
{
const string &file = xc->cpu->system->params->readfile;
const string &file = xc->cpu->system->params()->readfile;
if (file.empty()) {
return ULL(0);
}

View file

@ -1,31 +1,3 @@
/*
* Copyright (c) 2002-2005 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "base/loader/object_file.hh"
#include "base/loader/symtab.hh"
#include "base/remote_gdb.hh"
@ -49,38 +21,23 @@ int System::numSystemsRunning = 0;
System::System(Params *p)
: SimObject(p->name), memctrl(p->memctrl), physmem(p->physmem),
init_param(p->init_param), numcpus(0), params(p)
init_param(p->init_param), numcpus(0), _params(p)
{
// add self to global system list
systemList.push_back(this);
kernelSymtab = new SymbolTable;
consoleSymtab = new SymbolTable;
palSymtab = new SymbolTable;
debugSymbolTable = new SymbolTable;
/**
* Load the kernel, pal, and console code into memory
* Load the kernel code into memory
*/
// Load kernel code
kernel = createObjectFile(params->kernel_path);
kernel = createObjectFile(params()->kernel_path);
if (kernel == NULL)
fatal("Could not load kernel file %s", params->kernel_path);
// Load Console Code
console = createObjectFile(params->console_path);
if (console == NULL)
fatal("Could not load console file %s", params->console_path);
// Load pal file
pal = createObjectFile(params->palcode);
if (pal == NULL)
fatal("Could not load PALcode file %s", params->palcode);
fatal("Could not load kernel file %s", params()->kernel_path);
// Load program sections into memory
pal->loadSections(physmem, true);
console->loadSections(physmem, true);
kernel->loadSections(physmem, true);
// setup entry points
@ -95,71 +52,17 @@ System::System(Params *p)
if (!kernel->loadLocalSymbols(kernelSymtab))
panic("could not load kernel local symbols\n");
if (!console->loadGlobalSymbols(consoleSymtab))
panic("could not load console symbols\n");
if (!pal->loadGlobalSymbols(palSymtab))
panic("could not load pal symbols\n");
if (!pal->loadLocalSymbols(palSymtab))
panic("could not load pal symbols\n");
if (!kernel->loadGlobalSymbols(debugSymbolTable))
panic("could not load kernel symbols\n");
if (!kernel->loadLocalSymbols(debugSymbolTable))
panic("could not load kernel local symbols\n");
if (!console->loadGlobalSymbols(debugSymbolTable))
panic("could not load console symbols\n");
if (!pal->loadGlobalSymbols(debugSymbolTable))
panic("could not load pal symbols\n");
if (!pal->loadLocalSymbols(debugSymbolTable))
panic("could not load pal symbols\n");
DPRINTF(Loader, "Kernel start = %#x\n", kernelStart);
DPRINTF(Loader, "Kernel end = %#x\n", kernelEnd);
DPRINTF(Loader, "Kernel entry = %#x\n", kernelEntry);
DPRINTF(Loader, "Kernel loaded...\n");
Addr addr = 0;
#ifndef NDEBUG
consolePanicEvent = addConsoleFuncEvent<BreakPCEvent>("panic");
#endif
/**
* Copy the osflags (kernel arguments) into the consoles
* memory. (Presently Linux does not use the console service
* routine to get these command line arguments, but Tru64 and
* others do.)
*/
if (consoleSymtab->findAddress("env_booted_osflags", addr)) {
Addr paddr = vtophys(physmem, addr);
char *osflags = (char *)physmem->dma_addr(paddr, sizeof(uint32_t));
if (osflags)
strcpy(osflags, params->boot_osflags.c_str());
}
/**
* Set the hardware reset parameter block system type and revision
* information to Tsunami.
*/
if (consoleSymtab->findAddress("m5_rpb", addr)) {
Addr paddr = vtophys(physmem, addr);
char *hwrpb = (char *)physmem->dma_addr(paddr, sizeof(uint64_t));
if (!hwrpb)
panic("could not translate hwrpb addr\n");
*(uint64_t*)(hwrpb+0x50) = htog(params->system_type);
*(uint64_t*)(hwrpb+0x58) = htog(params->system_rev);
} else
panic("could not find hwrpb\n");
// increment the number of running systms
numSystemsRunning++;
@ -169,100 +72,13 @@ System::System(Params *p)
System::~System()
{
delete kernelSymtab;
delete consoleSymtab;
delete kernel;
delete console;
delete pal;
delete kernelBinning;
#ifdef DEBUG
delete consolePanicEvent;
#endif
}
/**
* This function fixes up addresses that are used to match PCs for
* hooking simulator events on to target function executions.
*
* Alpha binaries may have multiple global offset table (GOT)
* sections. A function that uses the GOT starts with a
* two-instruction prolog which sets the global pointer (gp == r29) to
* the appropriate GOT section. The proper gp value is calculated
* based on the function address, which must be passed by the caller
* in the procedure value register (pv aka t12 == r27). This sequence
* looks like the following:
*
* opcode Ra Rb offset
* ldah gp,X(pv) 09 29 27 X
* lda gp,Y(gp) 08 29 29 Y
*
* for some constant offsets X and Y. The catch is that the linker
* (or maybe even the compiler, I'm not sure) may recognize that the
* caller and callee are using the same GOT section, making this
* prolog redundant, and modify the call target to skip these
* instructions. If we check for execution of the first instruction
* of a function (the one the symbol points to) to detect when to skip
* it, we'll miss all these modified calls. It might work to
* unconditionally check for the third instruction, but not all
* functions have this prolog, and there's some chance that those
* first two instructions could have undesired consequences. So we do
* the Right Thing and pattern-match the first two instructions of the
* function to decide where to patch.
*
* Eventually this code should be moved into an ISA-specific file.
*/
Addr
System::fixFuncEventAddr(Addr addr)
{
// mask for just the opcode, Ra, and Rb fields (not the offset)
const uint32_t inst_mask = 0xffff0000;
// ldah gp,X(pv): opcode 9, Ra = 29, Rb = 27
const uint32_t gp_ldah_pattern = (9 << 26) | (29 << 21) | (27 << 16);
// lda gp,Y(gp): opcode 8, Ra = 29, rb = 29
const uint32_t gp_lda_pattern = (8 << 26) | (29 << 21) | (29 << 16);
// instruction size
const int sz = sizeof(uint32_t);
Addr paddr = vtophys(physmem, addr);
uint32_t i1 = *(uint32_t *)physmem->dma_addr(paddr, sz);
uint32_t i2 = *(uint32_t *)physmem->dma_addr(paddr+sz, sz);
if ((i1 & inst_mask) == gp_ldah_pattern &&
(i2 & inst_mask) == gp_lda_pattern) {
Addr new_addr = addr + 2*sz;
DPRINTF(Loader, "fixFuncEventAddr: %p -> %p", addr, new_addr);
return new_addr;
} else {
return addr;
}
}
void
System::setAlphaAccess(Addr access)
{
Addr addr = 0;
if (consoleSymtab->findAddress("m5AlphaAccess", addr)) {
Addr paddr = vtophys(physmem, addr);
uint64_t *m5AlphaAccess =
(uint64_t *)physmem->dma_addr(paddr, sizeof(uint64_t));
if (!m5AlphaAccess)
panic("could not translate m5AlphaAccess addr\n");
*m5AlphaAccess = htog(EV5::Phys2K0Seg(access));
} else
panic("could not find m5AlphaAccess\n");
}
bool
System::breakpoint()
{
return remoteGDB[0]->trap(ALPHA_KENTRY_INT);
}
int rgdb_wait = -1;
@ -336,8 +152,6 @@ System::serialize(ostream &os)
kernelBinning->serialize(os);
kernelSymtab->serialize("kernel_symtab", os);
consoleSymtab->serialize("console_symtab", os);
palSymtab->serialize("pal_symtab", os);
}
@ -347,8 +161,6 @@ System::unserialize(Checkpoint *cp, const string &section)
kernelBinning->unserialize(cp, section);
kernelSymtab->unserialize("kernel_symtab", cp, section);
consoleSymtab->unserialize("console_symtab", cp, section);
palSymtab->unserialize("pal_symtab", cp, section);
}
void
@ -369,69 +181,5 @@ printSystems()
System::printSystems();
}
BEGIN_DECLARE_SIM_OBJECT_PARAMS(System)
Param<Tick> boot_cpu_frequency;
SimObjectParam<MemoryController *> memctrl;
SimObjectParam<PhysicalMemory *> physmem;
Param<string> kernel;
Param<string> console;
Param<string> pal;
Param<string> boot_osflags;
Param<string> readfile;
Param<unsigned int> init_param;
Param<uint64_t> system_type;
Param<uint64_t> system_rev;
Param<bool> bin;
VectorParam<string> binned_fns;
Param<bool> bin_int;
END_DECLARE_SIM_OBJECT_PARAMS(System)
BEGIN_INIT_SIM_OBJECT_PARAMS(System)
INIT_PARAM(boot_cpu_frequency, "Frequency of the boot CPU"),
INIT_PARAM(memctrl, "memory controller"),
INIT_PARAM(physmem, "phsyical memory"),
INIT_PARAM(kernel, "file that contains the kernel code"),
INIT_PARAM(console, "file that contains the console code"),
INIT_PARAM(pal, "file that contains palcode"),
INIT_PARAM_DFLT(boot_osflags, "flags to pass to the kernel during boot",
"a"),
INIT_PARAM_DFLT(readfile, "file to read startup script from", ""),
INIT_PARAM_DFLT(init_param, "numerical value to pass into simulator", 0),
INIT_PARAM_DFLT(system_type, "Type of system we are emulating", 34),
INIT_PARAM_DFLT(system_rev, "Revision of system we are emulating", 1<<10),
INIT_PARAM_DFLT(bin, "is this system to be binned", false),
INIT_PARAM(binned_fns, "functions to be broken down and binned"),
INIT_PARAM_DFLT(bin_int, "is interrupt code binned seperately?", true)
END_INIT_SIM_OBJECT_PARAMS(System)
CREATE_SIM_OBJECT(System)
{
System::Params *p = new System::Params;
p->name = getInstanceName();
p->boot_cpu_frequency = boot_cpu_frequency;
p->memctrl = memctrl;
p->physmem = physmem;
p->kernel_path = kernel;
p->console_path = console;
p->palcode = pal;
p->boot_osflags = boot_osflags;
p->init_param = init_param;
p->readfile = readfile;
p->system_type = system_type;
p->system_rev = system_rev;
p->bin = bin;
p->binned_fns = binned_fns;
p->bin_int = bin_int;
return new System(p);
}
REGISTER_SIM_OBJECT("System", System)
DEFINE_SIM_OBJECT_CLASS_NAME("System", System)

View file

@ -71,21 +71,9 @@ class System : public SimObject
/** kernel symbol table */
SymbolTable *kernelSymtab;
/** console symbol table */
SymbolTable *consoleSymtab;
/** pal symbol table */
SymbolTable *palSymtab;
/** Object pointer for the kernel code */
ObjectFile *kernel;
/** Object pointer for the console code */
ObjectFile *console;
/** Object pointer for the PAL code */
ObjectFile *pal;
/** Begining of kernel code */
Addr kernelStart;
@ -97,11 +85,6 @@ class System : public SimObject
Kernel::Binning *kernelBinning;
#ifndef NDEBUG
/** Event to halt the simulator if the console calls panic() */
BreakPCEvent *consolePanicEvent;
#endif
protected:
/**
@ -109,7 +92,7 @@ class System : public SimObject
* events on to target function executions. See comment in
* system.cc for details.
*/
Addr fixFuncEventAddr(Addr addr);
virtual Addr fixFuncEventAddr(Addr addr) = 0;
/**
* Add a function-based event to the given function, to be looked
@ -135,24 +118,10 @@ class System : public SimObject
return addFuncEvent<T>(kernelSymtab, lbl);
}
/** Add a function-based event to PALcode. */
template <class T>
T *System::addPalFuncEvent(const char *lbl)
{
return addFuncEvent<T>(palSymtab, lbl);
}
/** Add a function-based event to the console code. */
template <class T>
T *System::addConsoleFuncEvent(const char *lbl)
{
return addFuncEvent<T>(consoleSymtab, lbl);
}
public:
std::vector<RemoteGDB *> remoteGDB;
std::vector<GDBListener *> gdbListen;
bool breakpoint();
virtual bool breakpoint() = 0;
public:
struct Params
@ -167,27 +136,21 @@ class System : public SimObject
bool bin_int;
std::string kernel_path;
std::string console_path;
std::string palcode;
std::string boot_osflags;
std::string readfile;
uint64_t system_type;
uint64_t system_rev;
};
Params *params;
protected:
Params *_params;
public:
System(Params *p);
~System();
void startup();
public:
/**
* Set the m5AlphaAccess pointer in the console
*/
void setAlphaAccess(Addr access);
const Params *params() const { return (const Params *)_params; }
public:
/**
* Returns the addess the kernel starts at.
* @return address the kernel starts at
@ -224,6 +187,8 @@ class System : public SimObject
static int numSystemsRunning;
static void printSystems();
};
#endif // __SYSTEM_HH__