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Author SHA1 Message Date
Gabe Black 54ab07e636 ARM: Implement the strex instructions. 2010-06-02 12:58:10 -05:00
Gabe Black 524a8195e1 ARM: Set CPSR.E to SCTLR.EE on faults. 2010-06-02 12:58:10 -05:00
Gabe Black 683421e0c6 ARM: Warn about not implementing MPU translation, not panic about MMU. 
We'll start out with a stbu version of PMSA and switch over to VMSA for the
full implementation.
 2010-06-02 12:58:10 -05:00
Gabe Black 6fb5189c47 ARM: Ignore/warn on accesses to the DRBAR, DRACR, and DRSR registers. 2010-06-02 12:58:10 -05:00
Gabe Black 89b1dd5582 ARM: Allow access to the RGNR register. 2010-06-02 12:58:10 -05:00
Gabe Black c3381167c9 ARM: Make the MPUIR register report that 1 unified data region is supported. 2010-06-02 12:58:10 -05:00
Gabe Black 3aa8faf177 ARM: Ignore/warn on accesses to the BPIALLIS and BPIALL registers. 2010-06-02 12:58:10 -05:00
Gabe Black faf6c727f6 ARM: Respect the E bit of the CPSR when doing loads and stores. 2010-06-02 12:58:10 -05:00
Gabe Black b6cb6f1874 ARM: Zero the micropc when vectoring to a fault. 2010-06-02 12:58:10 -05:00
Gabe Black 1d5233958a ARM: Implement the V7 version of alignment checking. 2010-06-02 12:58:10 -05:00
Gabe Black 7b397925af ARM: Decode the RFE instruction. 2010-06-02 12:58:10 -05:00
Gabe Black a2cb503ba6 ARM: Implement the RFE instruction. 2010-06-02 12:58:10 -05:00
Gabe Black ec4cd00b11 ARM: Add a base class for the RFE instruction. 2010-06-02 12:58:10 -05:00
Gabe Black 1ada9d4880 ARM: Make sure some undefined thumb32 instructions fault. 2010-06-02 12:58:10 -05:00
Gabe Black 3caa75d53a ARM: Squash the low order bits of the PC when performing a regular branch. 2010-06-02 12:58:10 -05:00
Gabe Black 36eeee0133 ARM: When changing the CPSR and branching, make sure the branch is second. 2010-06-02 12:58:09 -05:00
Gabe Black 68f2908a70 ARM: Ignore/warn when CSSELR or CCSIDR are accessed. 
These registers provide information about the caches. Since we can't provide
that information, these will be harmlessly inert.
 2010-06-02 12:58:09 -05:00
Gabe Black 741b243260 ARM: Ignore/warn access to the bpimva registers. 2010-06-02 12:58:09 -05:00
Gabe Black 8a7f60194e ARM: Ignore/warn on accesses to the dccmvac register. 2010-06-02 12:58:09 -05:00
Gabe Black 89133b15da ARM: Decode the enterx and leavex instructions. 2010-06-02 12:58:09 -05:00
Gabe Black 6a4ea7cca9 ARM: Implement the enterx and leavex instructions. 
These enter and leave thumbEE mode. Currently thumbEE mode behaves exactly the
same as Thumb mode, but at least this will make it -look- like we're enter and
leaving it. The actual behavioral changes will be implemented in future
changes.
 2010-06-02 12:58:09 -05:00
Gabe Black eb0823c4f2 ARM: Fix the implementation of BX to work in thumbEE mode. 2010-06-02 12:58:09 -05:00
Gabe Black bb0d390105 ARM: When an instruction is intentionally undefined, fault on it. 2010-06-02 12:58:09 -05:00
Gabe Black 61a5e71be7 ARM: Decode the thumb version of the ldrd and strd instructions. 2010-06-02 12:58:09 -05:00
Gabe Black 9d4a1bf2ba ARM: Explicitly keep track of the second destination for double loads/stores. 2010-06-02 12:58:09 -05:00
Gabe Black 28023f6f3d ARM: Decode the thumb32 load byte/memory hint instructions. 2010-06-02 12:58:09 -05:00
Gabe Black 7a9dcdf99f ARM: Decode the load halfword, memory hints instructions for 32 bit Thumb. 2010-06-02 12:58:09 -05:00
Gabe Black a483d44d9f ARM: Ignore/warn on accesses to icimvau. 2010-06-02 12:58:09 -05:00
Gabe Black 630f309a77 ARM: Ignore/warn on iciallu. 2010-06-02 12:58:09 -05:00
Gabe Black d618121670 ARM: Ignore/warn on ICIALLUIS. 2010-06-02 12:58:09 -05:00
Gabe Black e658b6fed4 ARM: Add support for the clidr register. 
This register will always report 0 caches as implemented. It's not clear how
to find out how many there really are when dealing with an arbitrary
hierarchy.
 2010-06-02 12:58:09 -05:00
Gabe Black 896c7617c4 ARM: Decode the unimplemented data barrier CP15 accesses. 
These are CP15DSB (Data Synchronization Barrier), and CP15DMB (Data Memory
Barrier).
 2010-06-02 12:58:09 -05:00
Gabe Black af6b1667e9 ARM: Implement a stub of CPACR. 
This register controls access to the coprocessors. This doesn't actually
implement it, it allows writes which don't turn anything off. In other words,
it allows the simulated program to ask for what it already has.
 2010-06-02 12:58:09 -05:00
Gabe Black 660270746b ARM: Actually write the value of sctlr in ISA.clear(). 2010-06-02 12:58:08 -05:00
Gabe Black 6c9ab5d898 ARM: Replace the ARM decode of CP15 MCR and MRC instructions. 2010-06-02 12:58:08 -05:00
Gabe Black 35f0c01fea ARM: Decode the unimplemented cp15 instruction barrier. 2010-06-02 12:58:08 -05:00
Gabe Black 7932b86298 ARM: Ignore accesses to DCCIMVAC. 2010-06-02 12:58:08 -05:00
Gabe Black 6ae4d34a12 ARM: Allow accesses to the software thread id registers. 2010-06-02 12:58:08 -05:00
Gabe Black 54850e4d23 ARM: Allow accesses to the contextidr register. 2010-06-02 12:58:08 -05:00
Gabe Black 221e0ac523 ARM: Warn about and ignore accesses to DCCISW. 
This register is supposed to "Clean and invalidate data or unified cache line
by set/way." Since there isn't a good way to do that, we'll just ignore these
and warn about it.
 2010-06-02 12:58:08 -05:00
Gabe Black 8c1be04af6 ARM: Decode the thumb versions of the mcr and mrc instructions. 2010-06-02 12:58:08 -05:00
Gabe Black 625a43e7c7 ARM: Implement the mrc and mcr instructions. 2010-06-02 12:58:08 -05:00
Gabe Black 6c1b10043f ARM: Rename the RevOp base class to something more generic. 2010-06-02 12:58:08 -05:00
Gabe Black f9d1bba22a ARM: Add a version of the Dest and Op1 operands for accessing the MiscRegs. 2010-06-02 12:58:08 -05:00
Gabe Black 6aa229386d ARM: Implement a function to decode CP15 registers to MiscReg indices. 2010-06-02 12:58:08 -05:00
Gabe Black 7ff24c8777 ARM: Decode the bfi and bfc instructions. 2010-06-02 12:58:08 -05:00
Gabe Black a37b6b6bce ARM: Implement the bfc and bfi instructions. 2010-06-02 12:58:08 -05:00
Gabe Black 5a63887617 ARM: Decode the ubfx and sbfx instructions. 2010-06-02 12:58:08 -05:00
Gabe Black 2e717558e2 ARM: Decode miscellaneous arm mode media instructions. 2010-06-02 12:58:08 -05:00
Gabe Black 09cc401848 ARM: Implement the ubfx and sbfx instructions. 2010-06-02 12:58:08 -05:00