sanchayanmaity/gem5
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602 commits

Author SHA1 Message Date
Ali Saidi
e41197a3f8 CPU: Add function to explictly compare thread contexts after copying. 
--HG--
extra : convert_revision : 9b7af59a11202a91409aad7c427b7749cd1d2f12
 2007-11-08 10:46:41 -05:00
Gabe Black
19292d3f06 O3: Remove unneeded variable. 
--HG--
extra : convert_revision : 4624ccd3f08818f4632881d6aca6d1cc343bbdcf
 2007-11-06 12:51:08 -08:00
Steve Reinhardt
4b49bd47f4 String constant const-ness changes to placate g++ 4.2. 
Also some bug fixes in MIPS ISA uncovered by g++ warnings
(Python string compares don't work in C++!).

--HG--
extra : convert_revision : b347cc0108f23890e9b73b3ee96059f0cea96cf6
 2007-10-31 18:04:22 -07:00
Ali Saidi
538fae951b Traceflags: Add SCons function to created a traceflag instead of having one file with them all. 
--HG--
extra : convert_revision : 427f6bd8f050861ace3bc0d354a1afa5fc8319e6
 2007-10-31 01:21:54 -04:00
Gabe Black
93da9eb7f6 CPU: Add functions to the "ExecContext"s that translate a given address. 
--HG--
extra : convert_revision : 7d898c6b6b13094fd05326eaa0b095a3ab132397
 2007-10-22 14:30:45 -07:00
Ali Saidi
8351660273 CPU: Use the ThreadContext cpu id instead of the params cpu id in all cases. 
--HG--
extra : convert_revision : 6d025764682181b1f67df3b1d8d1d59099136df7
 2007-10-18 13:15:08 -04:00
Gabe Black
50e2d20cb8 Merge with head. 
--HG--
extra : convert_revision : 1aa0e4569a7c10e6a395c2c951ac29275b5bcf59
 2007-10-02 23:03:38 -07:00
Gabe Black
a56c651980 Predecoder: Clear out predecoder state on an ITLB fault. 
--HG--
extra : convert_revision : 68f8ff778dbd28ade5070edf5a7d662e7bf0045a
 2007-10-02 22:21:38 -07:00
Gabe Black
7571e8346d CPU: Make the cpuid parameter get set in SE mode as well. 
--HG--
extra : convert_revision : bc47206acb683ebaaa31f57af79b4b8db64e4d31
 2007-10-02 18:33:57 -07:00
Gabe Black
988cdb49f2 CPU: Make the cpus check the pc event queues in SE mode. 
--HG--
extra : convert_revision : 9dc4ea136c3c3f87a73d55e91bc4aae4eba70464
 2007-10-02 18:25:37 -07:00
Gabe Black
3eeda8008d CPU: Make sure the system parameter gets set in the cpu builders. Other parameters need to be fixed as well. 
--HG--
extra : convert_revision : 0401970a79855ee0a96eb29305346ce07b5c98ea
 2007-10-02 18:22:36 -07:00
Ali Saidi
0acf891c32 CPU: fix sparc_fs booting with SimpleTimingCPU. 
--HG--
extra : convert_revision : 3d95f6daa7f0e8e376d1a880f64c056619263885
 2007-10-01 02:55:27 -04:00
Ali Saidi
d2a4f595d6 Update stats for quiesced cycles 
--HG--
extra : convert_revision : 703ba58f156c9f2677b020f05d36bc1e3ae0b9e5
 2007-09-28 13:22:14 -04:00
Ali Saidi
d325f49b70 Rename cycles() function to ticks() 
--HG--
extra : convert_revision : 790eddb793d4f5ba35813d001037bd8601bd76a5
 2007-09-28 13:21:52 -04:00
Ali Saidi
887cd6a273 Update statistics to use cycles properly instead of ticks 
--HG--
extra : convert_revision : 62911280b631ef24720f9ce701d1c19a9b8a9784
 2007-09-28 13:21:30 -04:00
Gabe Black
2dd65dc254 Merge with head. 
--HG--
extra : convert_revision : f331b9cbd82086d63d4f35e18f9e08466c016225
 2007-09-25 20:11:41 -07:00
Gabe Black
032a30f345 SPARC: Fix a stupid mistake which was breaking the SPARC regressions. 
--HG--
extra : convert_revision : 34a11df0d467ea249211dd3aba86bc8d2aea45de
 2007-09-25 20:00:46 -07:00
Gabe Black
418ddf43e6 X86: Get X86_FS to compile. 
--HG--
extra : convert_revision : fb973bcf13648876d5691231845dd47a2be50f01
 2007-09-24 17:39:56 -07:00
Gabe Black
f3f3747431 X86: Put in the foundation for x87 stack based fp registers. 
--HG--
extra : convert_revision : 940f92efd4a9dc59106e991cc6d9836861ab69de
 2007-09-19 18:26:42 -07:00
Gabe Black
26044dca33 X86/StateTrace: Make m5 and statetrace track mmx and xmm registers, and actually compare xmm. 
--HG--
extra : convert_revision : 02c6641200edb133c9bc11f1fdf3c1a0b1c87e77
 2007-09-04 23:39:57 -07:00
Gabe Black
941675690c X86: Get x86 to compile again after the simobject constructor change. 
--HG--
extra : convert_revision : 17a3e16e849bee88892223f0c993b19c15daa554
 2007-08-31 13:02:58 -07:00
Miles Kaufmann
e4eea9ee04 Fix miscellaneous small typos. 
--HG--
extra : convert_revision : bfc0ac8e1c8a5d01d9fa5203184bbf99c8361da3
 2007-08-30 15:16:59 -04:00
Miles Kaufmann
54cc0053f0 params: Deprecate old-style constructors; update most SimObject constructors. 
SimObjects not yet updated:
- Process and subclasses
- BaseCPU and subclasses

The SimObject(const std::string &name) constructor was removed.  Subclasses
that still rely on that behavior must call the parent initializer as
  : SimObject(makeParams(name))

--HG--
extra : convert_revision : d6faddde76e7c3361ebdbd0a7b372a40941c12ed
 2007-08-30 15:16:59 -04:00
Gabe Black
7227ab5f22 Merge with head 
--HG--
extra : convert_revision : cc73b9aaf73e9dacf52f3350fa591e67ca4ccee6
 2007-08-26 21:45:40 -07:00
Gabe Black
80d51650c8 O3 CPU: Remove alignment check from dynamic instruction read/write functions. 
--HG--
extra : convert_revision : e5d415b4bf79353ef3c9f4dc5af09ab4102c55fb
 2007-08-26 20:31:30 -07:00
Gabe Black
24bfda0fdf Simple CPU: Don't trace instructions that fault. Otherwise they show up twice. 
--HG--
extra : convert_revision : 4446d9544d58bdadbd24d8322bb63016a32aa2b8
 2007-08-26 20:29:09 -07:00
Gabe Black
e7e2d5ce90 Simple CPU: Added code that will split requests that cross block boundaries into multiple memory access. 
--HG--
extra : convert_revision : 600f79f32ef30a6e1db951503bcfe8cd332858d1
 2007-08-26 20:27:11 -07:00
Gabe Black
e056e49c45 Simple CPU: Make sure only instructions which complete without faulting are counted. 
--HG--
extra : convert_revision : 01019c7129ed762d8826c3e6519989aa3fc3b5fd
 2007-08-26 20:25:42 -07:00
Gabe Black
537239b278 Address Translation: Make SE mode use an actual TLB/MMU for translation like FS. 
--HG--
extra : convert_revision : a04a30df0b6246e877a1cea35420dbac94b506b1
 2007-08-26 20:24:18 -07:00
Gabe Black
20e0a3792a Merge with head. 
--HG--
extra : convert_revision : 9ef81afcfabd86c9c069204998c987344f03f33e
 2007-08-21 16:19:46 -07:00
Kevin Lim
e1054170b5 o3: Fix for retry ID bug. 
It should be cleared prior to the call to recvRetry.
Add extra DPRINTF statement for clearer debugging output.

--HG--
extra : convert_revision : e2332754743f42d60e159ac89f6fb0fd8b7f57f8
 2007-08-21 16:16:56 -07:00
Gabe Black
92a57edff1 O3: Set up the predicted npc and nnpc for a fault carrying noop so that it doesn't cause a false branch mispredict. 
--HG--
extra : convert_revision : 2820597cc966cd7b128cef0dab48fe05089533d7
 2007-08-13 16:08:58 -07:00
Gabe Black
82f78ebd39 Move the "translate" member functions back into the base o3 class. 
--HG--
extra : convert_revision : 3c480537bf38f74f0f1d72e75c70aa46ba91b759
 2007-08-13 16:01:09 -07:00
Vincentius Robby
ec4000e0e2 Added fastmem option. 
Lets CPU accesses to physical memory bypass Bus.

--HG--
extra : convert_revision : e56e3879de47ee10951a19bfcd8b62b6acdfb30c
 2007-08-08 18:43:12 -04:00
Vincentius Robby
3d40cba8d4 Port, StaticInst: Revert unnecessary changes. 
--HG--
extra : convert_revision : e6ef262bbbc5ad53498e55caac1897e6cc2a61e6
 2007-08-08 14:54:02 -04:00
Vincentius Robby
13d10e844c alpha: Make the TLB cache to actually work. 
Improve MRU checking for StaticInst, Bus, TLB

--HG--
extra : convert_revision : 9116b5655cd2986aeb4205438aad4a0f5a440006
 2007-08-08 14:18:09 -04:00
Gabe Black
0fd999ca40 Merge with head. 
--HG--
extra : convert_revision : ae7b3df573368c29a66d5b027ecad9ffb3a99104
 2007-08-07 15:31:36 -07:00
Gabe Black
fb6cdf09cb X86: Make a microcode branch microop. 
Also some touch up for ruflag.

--HG--
extra : convert_revision : 829947169af25ca6573f53b9430707101c75cc23
 2007-08-07 15:19:26 -07:00
Nathan Binkert
df015f17a4 switching: turn on profiling after a switch if there's an event 
--HG--
extra : convert_revision : 689e5b85c47bb2aaceb7eb38c2a24a2e5b69376c
 2007-08-04 16:11:11 -07:00
Nathan Binkert
e8e1ddd530 SimpleCPU: Add some DPRINTFs 
--HG--
extra : convert_revision : 5fdd5a9595c3e5d6ce5f9e8c9af0a8e6c857551c
 2007-08-04 15:56:48 -07:00
Vincentius Robby
acac5580f2 StaticInst: Fix decode cache initialization. Cache functionality was negated. 
--HG--
extra : convert_revision : fe313718dba8236f3e9bceb49f8c5efccfc06a06
 2007-08-04 14:25:17 -04:00
Gabe Black
8da3e0548e Merge with head. 
--HG--
extra : convert_revision : 444901221e9a0b991213fbcd555f2f5cca67e91b
 2007-08-01 15:12:07 -07:00
Gabe Black
e42524af02 X86: Reorganize the native tracing code. 
Ignore different values or rcx and r11 after a syscall until either the local or remote value changes. Also change the codes organization somewhat.

--HG--
extra : convert_revision : 2c1f69d4e55b443e68bfc7b43e8387b02cf0b6b5
 2007-08-01 12:01:51 -07:00
Gabe Black
4bdabe1254 Add a flag to indicate an instruction triggers a syscall in SE mode. 
--HG--
extra : convert_revision : 1d0b3afdd8254f5b2fb4bbff1fa4a0536f78bb06
 2007-07-31 17:34:08 -07:00
Steve Reinhardt
c4c8a12186 Merge from head. 
--HG--
extra : convert_revision : af16bc685ea28e44b8120f16b72f60a21d68c1e2
 2007-07-31 00:37:07 -04:00
Gabe Black
24ac08daa4 Fix problem with tracer not being initialized. 
--HG--
extra : convert_revision : 09610ad84afa605db2d0eab9945eb9809f297182
 2007-07-30 13:13:11 -07:00
Steve Reinhardt
08474ccf68 Merge Gabe's changes from head. 
--HG--
extra : convert_revision : d00b7b09c7f19bc0e37b385ef7c124f69c0e917f
 2007-07-29 13:25:14 -07:00
Steve Reinhardt
362ff1bceb BsaeCPU: Get rid of some bad DPRINTFs. 
People should never put pointers in DPRINTFs; it messes up
tracediffs.  Plus these used the FullCPU trace flag, which
is not right.

--HG--
extra : convert_revision : 82ed56757da0ad947c165ba205b5f752c85c6667
 2007-07-29 13:22:44 -07:00
Gabe Black
b6395da4ce X86: Fix register ordering. 
The correct order is unintuitively rax, rcx, rdx, rbx, etc, not rax, rbx, rcx, rdx.

--HG--
extra : convert_revision : 3abe6a723a6e30becfe34f8da707ea2ff5d4df77
 2007-07-29 01:28:36 -07:00
Gabe Black
8dd7700482 Turn the instruction tracing code into pluggable sim objects. 
These need to be refined a little still and given parameters.

--HG--
extra : convert_revision : 9a8f5a7bd9dacbebbbd2c235cd890c49a81040d7
 2007-07-28 20:30:43 -07:00