Gabe Black
bd6f2bb538
Mem: Change isLlsc to isLLSC.
2009-04-19 21:44:15 -07:00
Gabe Black
1a8a765a5c
CPUs: Make the atomic CPU support locked memory accesses.
2009-04-19 04:50:07 -07:00
Gabe Black
3e5f487663
Memory: Rename LOCKED for load locked store conditional to LLSC.
2009-04-19 04:25:01 -07:00
Gabe Black
d10195b1a4
CPU: If the simple CPU is already idle, just return from suspendContext, don't assert.
2009-04-19 02:23:29 -07:00
Nathan Binkert
e0de2c3443
tlb: More fixing of unified TLB
2009-04-08 22:21:27 -07:00
Gabe Black
7b5a96f06b
tlb: Don't separate the TLB classes into an instruction TLB and a data TLB
2009-04-08 22:21:27 -07:00
Steve Reinhardt
61ff48a1f8
cpu: fix minor endian issue with trace output
...
(no functional change)
2009-03-11 23:05:24 -07:00
Gabe Black
da61c4b3ee
CPU: Don't fetch when executing a macroop.
...
If the CPL changes mid macroop, the end of the instruction might not be
priveleged enough to execute the beginning.
2009-02-25 10:18:36 -08:00
Gabe Black
6ed47e9464
CPU: Implement translateTiming which defers to translateAtomic, and convert the timing simple CPU to use it.
2009-02-25 10:16:15 -08:00
Gabe Black
5605079b1f
ISA: Replace the translate functions in the TLBs with translateAtomic.
2009-02-25 10:15:44 -08:00
Gabe Black
a1aba01a02
CPU: Get rid of translate... functions from various interface classes.
2009-02-25 10:15:34 -08:00
Lisa Hsu
d857faf073
Add in Context IDs to the simulator. From now on, cpuId is almost never used,
...
the primary identifier for a hardware context should be contextId(). The
concept of threads within a CPU remains, in the form of threadId() because
sometimes you need to know which context within a cpu to manipulate.
2008-11-02 21:57:07 -05:00
Lisa Hsu
c55a467a06
make BaseCPU the provider of _cpuId, and cpuId() instead of being scattered
...
across the subclasses. generally make it so that member data is _cpuId and
accessor functions are cpuId(). The ID val comes from the python (default -1 if
none provided), and if it is -1, the index of cpuList will be given. this has
passed util/regress quick and se.py -n4 and fs.py -n4 as well as standard
switch.
2008-11-02 21:56:57 -05:00
Gabe Black
809f6cb6d1
CPU: Explain why some code is commented out.
2008-10-12 23:52:02 -07:00
Gabe Black
0756dbb37a
X86: Don't fetch in the simple CPU if you're in the ROM.
2008-10-12 19:32:06 -07:00
Nathan Binkert
e06321091d
eventq: convert all usage of events to use the new API.
...
For now, there is still a single global event queue, but this is
necessary for making the steps towards a parallelized m5.
2008-10-09 04:58:24 -07:00
Nathan Binkert
ee62a0fec8
params: Convert the CPU objects to use the auto generated param structs.
...
A whole bunch of stuff has been converted to use the new params stuff, but
the CPU wasn't one of them. While we're at it, make some things a bit
more stylish. Most of the work was done by Gabe, I just cleaned stuff up
a bit more at the end.
2008-08-11 12:22:16 -07:00
Ali Saidi
50e3e50e1a
Make the cached virtPort have a thread context so it can do everything that a newly created one can.
2008-07-01 10:24:16 -04:00
Ali Saidi
9bd0bfe559
After a checkpoint (and thus a stats reset), the not_idle_fraction/notIdleFraction statistic is really wrong.
...
The notIdleFraction statistic isn't updated when the statistics reset, probably because the cpu Status information
was pulled into the atomic and timing cpus. This changeset pulls Status back into the BaseSimpleCPU object. Anyone
care to comment on the odd naming of the Status instance? It shouldn't just be status because that is confusing
with Port::Status, but _status seems a bit strage too.
2008-07-01 10:24:09 -04:00
Nathan Binkert
67a33eed40
AtomicSimpleCPU: Separate data stalls from instruction stalls.
...
Separate simulation of icache stalls and dat stalls.
2008-06-18 10:15:21 -07:00
Gabe Black
d093fcb079
CPU: Make the simple cpu trace data for loads/stores.
2008-06-12 00:35:50 -04:00
Ali Saidi
9faec83ac5
CPU: move the PC Events code to a place where the code won't be executed multiple times if an instruction faults.
...
--HG--
extra : convert_revision : 19c8e46a4eea206517be7ed4131ab9df0fe00e68
2008-02-14 16:14:35 -05:00
Stephen Hines
6cc1573923
Make the Event::description() a const function
...
--HG--
extra : convert_revision : c7768d54d3f78685e93920069f5485083ca989c0
2008-02-06 16:32:40 -05:00
Steve Reinhardt
cde5a79eab
Additional comments and helper functions for PrintReq.
...
--HG--
extra : convert_revision : 7eadf9b7db8c0289480f771271b6efe2400006d4
2008-01-02 13:46:22 -08:00
Ali Saidi
71909a50de
CPU: Update where the simple cpus read their cpu id from the thread context to init() to make sure they read the right value. This fixes a bug with multi-processor full-system configurations.
...
--HG--
extra : convert_revision : 4f2801967a271b43817d88e147c2f80c4480b2c3
2007-12-16 03:48:13 -05:00
Gabe Black
a12d5975cc
Simple CPU fix simple mistake in translateDataWriteAddr.
...
--HG--
extra : convert_revision : 6a6a7d05f62d9d9868be0707e4dc186a5f7ecf7d
2007-11-20 15:37:56 -08:00
Ali Saidi
cf1c25dbcc
AtomicSimpleCPU: Refactor resume() code to have a cleaner control path.
...
--HG--
extra : convert_revision : f27bb96850e7fb0252fb1f47c3d0860705c32884
2007-11-08 10:46:41 -05:00
Gabe Black
93da9eb7f6
CPU: Add functions to the "ExecContext"s that translate a given address.
...
--HG--
extra : convert_revision : 7d898c6b6b13094fd05326eaa0b095a3ab132397
2007-10-22 14:30:45 -07:00
Ali Saidi
8351660273
CPU: Use the ThreadContext cpu id instead of the params cpu id in all cases.
...
--HG--
extra : convert_revision : 6d025764682181b1f67df3b1d8d1d59099136df7
2007-10-18 13:15:08 -04:00
Ali Saidi
d2a4f595d6
Update stats for quiesced cycles
...
--HG--
extra : convert_revision : 703ba58f156c9f2677b020f05d36bc1e3ae0b9e5
2007-09-28 13:22:14 -04:00
Ali Saidi
d325f49b70
Rename cycles() function to ticks()
...
--HG--
extra : convert_revision : 790eddb793d4f5ba35813d001037bd8601bd76a5
2007-09-28 13:21:52 -04:00
Gabe Black
7227ab5f22
Merge with head
...
--HG--
extra : convert_revision : cc73b9aaf73e9dacf52f3350fa591e67ca4ccee6
2007-08-26 21:45:40 -07:00
Gabe Black
24bfda0fdf
Simple CPU: Don't trace instructions that fault. Otherwise they show up twice.
...
--HG--
extra : convert_revision : 4446d9544d58bdadbd24d8322bb63016a32aa2b8
2007-08-26 20:29:09 -07:00
Gabe Black
e7e2d5ce90
Simple CPU: Added code that will split requests that cross block boundaries into multiple memory access.
...
--HG--
extra : convert_revision : 600f79f32ef30a6e1db951503bcfe8cd332858d1
2007-08-26 20:27:11 -07:00
Gabe Black
e056e49c45
Simple CPU: Make sure only instructions which complete without faulting are counted.
...
--HG--
extra : convert_revision : 01019c7129ed762d8826c3e6519989aa3fc3b5fd
2007-08-26 20:25:42 -07:00
Gabe Black
537239b278
Address Translation: Make SE mode use an actual TLB/MMU for translation like FS.
...
--HG--
extra : convert_revision : a04a30df0b6246e877a1cea35420dbac94b506b1
2007-08-26 20:24:18 -07:00
Vincentius Robby
ec4000e0e2
Added fastmem option.
...
Lets CPU accesses to physical memory bypass Bus.
--HG--
extra : convert_revision : e56e3879de47ee10951a19bfcd8b62b6acdfb30c
2007-08-08 18:43:12 -04:00
Nathan Binkert
e8e1ddd530
SimpleCPU: Add some DPRINTFs
...
--HG--
extra : convert_revision : 5fdd5a9595c3e5d6ce5f9e8c9af0a8e6c857551c
2007-08-04 15:56:48 -07:00
Steve Reinhardt
08474ccf68
Merge Gabe's changes from head.
...
--HG--
extra : convert_revision : d00b7b09c7f19bc0e37b385ef7c124f69c0e917f
2007-07-29 13:25:14 -07:00
Gabe Black
8dd7700482
Turn the instruction tracing code into pluggable sim objects.
...
These need to be refined a little still and given parameters.
--HG--
extra : convert_revision : 9a8f5a7bd9dacbebbbd2c235cd890c49a81040d7
2007-07-28 20:30:43 -07:00
Steve Reinhardt
aaf59949e5
AtomicSimpleCPU: fix inadvertent loss of endian conversion on read.
...
--HG--
extra : convert_revision : 367bf2431bf4f4eb7c4d5723816e5db6f7233aed
2007-07-28 18:00:05 -07:00
Nathan Binkert
f0fef8f850
Merge python and x86 changes with cache branch
...
--HG--
extra : convert_revision : e06a950964286604274fba81dcca362d75847233
2007-07-26 23:15:49 -07:00
Nathan Binkert
abc76f20cb
Major changes to how SimObjects are created and initialized. Almost all
...
creation and initialization now happens in python. Parameter objects
are generated and initialized by python. The .ini file is now solely for
debugging purposes and is not used in construction of the objects in any
way.
--HG--
extra : convert_revision : 7e722873e417cb3d696f2e34c35ff488b7bff4ed
2007-07-23 21:51:38 -07:00
Steve Reinhardt
3ad761bc8e
Make CPU models use new LoadLockedReq/StoreCondReq commands.
...
--HG--
extra : convert_revision : ab78d9d1d88c3698edfd653d71c8882e1272b781
2007-06-30 20:35:42 -07:00
Steve Reinhardt
ee54ad318a
Event descriptions should not end in "event"
...
(they function as adjectives not nouns)
--HG--
extra : convert_revision : 6506474ff3356ae8c80ed276c3608d8a4680bfdb
2007-06-30 17:45:58 -07:00
Steve Reinhardt
6ab53415ef
Get rid of Packet result field. Error responses are
...
now encoded in cmd field.
--HG--
extra : convert_revision : d67819b7e3ee4b9a5bf08541104de0a89485e90b
2007-06-30 10:16:18 -07:00
Gabe Black
ea70e6d6da
Make branches work by repopulating the predecoder every time through. This is probably fine as far as the predecoder goes, but the simple cpu might want to not refetch something it already has. That reintroduces the self modifying code problem though.
...
--HG--
extra : convert_revision : 802197e65f8dc1ad657c6b346091e03cb563b0c0
2007-06-19 18:17:34 +00:00
Gabe Black
a7f3bbcfab
Make microOp vs microop and macroOp vs macroop capitilization consistent.
...
src/arch/x86/isa/macroop.isa:
Make microOp vs microop and macroOp vs macroop capitilization consistent. Also fill out the emulation environment handling a little more, and use an object to pass around output code.
src/arch/x86/isa/microops/base.isa:
Make microOp vs microop and macroOp vs macroop capitilization consistent. Also adjust python to C++ bool translation.
--HG--
extra : convert_revision : 6f4bacfa334c42732c845f9a7f211cbefc73f96f
2007-06-12 16:21:47 +00:00
Gabe Black
6a6e62014e
Changes to make simple cpu handle pcs appropriately for x86
...
--HG--
extra : convert_revision : cf68886d53301e0a63705247bd7d66b2ff08ea84
2007-05-18 10:42:50 -07:00
Gabe Black
74122c04cf
Even if you don't want to fetch more bytes, make sure you handle a fault.
...
--HG--
extra : convert_revision : cfebc877b9b2ebc8927ce8267867eb40ad6d59c6
2007-04-10 17:27:12 +00:00