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Author SHA1 Message Date
Nathan Binkert d3d8a5a83b copyright: I missed some copyrights during ruby integration 2009-06-10 00:41:56 -07:00
Gabe Black 85ca502611 ARM: Add a hello world regression. 2009-06-09 23:55:53 -07:00
Gabe Black d91a3cf53d ARM: Add a hello world binary. 2009-06-09 23:42:43 -07:00
Gabe Black b394242240 ARM: Hook in the mmap2 system call. Make ArmLinuxProcess handle 5,6 syscall params. 2009-06-09 23:41:45 -07:00
Gabe Black c913c64be2 ARM: Add a memory_barrier function to the "comm page". 
This function doesn't actually provide a memory barrier (I don't think they're
implemented) and instead just returns.
 2009-06-09 23:41:35 -07:00
Gabe Black 3ff1e922c2 ARM: Add a cmpxchg implementation to the "comm page". 
This implementation does what it's supposed to (I think), but it's not atomic
and doesn't have memory barriers like the kernel's version.
 2009-06-09 23:41:03 -07:00
Gabe Black 37ac2871d5 ARM: Implement TLS. This is not tested. 2009-06-09 23:39:07 -07:00
Gabe Black 5daeefc505 ARM: Make ArmLinuxProcess understand "ARM private" system calls. 2009-06-09 23:38:50 -07:00
Gabe Black fbf4dc9da2 ARM: Update the kernel version M5 reports to 2.6.16.19 2009-06-09 23:37:41 -07:00
Nathan Binkert baa0d695b2 cleanup: Make use of types properly and make the loop a little more clear. 2009-06-05 17:01:19 -07:00
Nathan Binkert c76a8b1c15 scons: Make it so that the processing of trace flags does not depend on order 2009-06-05 15:20:09 -07:00
Nathan Binkert a01437ab03 types: need typename keyword to get the type. 2009-06-05 11:40:02 -07:00
Nathan Binkert 6faf377b53 types: clean up types, especially signed vs unsigned 2009-06-04 23:21:12 -07:00
Nathan Binkert 4e34266245 move: put predictor includes and cc files into the same place 
--HG--
rename : src/cpu/2bit_local_pred.cc => src/cpu/pred/2bit_local.cc
rename : src/cpu/o3/2bit_local_pred.hh => src/cpu/pred/2bit_local.hh
rename : src/cpu/btb.cc => src/cpu/pred/btb.cc
rename : src/cpu/o3/btb.hh => src/cpu/pred/btb.hh
rename : src/cpu/ras.cc => src/cpu/pred/ras.cc
rename : src/cpu/o3/ras.hh => src/cpu/pred/ras.hh
rename : src/cpu/tournament_pred.cc => src/cpu/pred/tournament.cc
rename : src/cpu/o3/tournament_pred.hh => src/cpu/pred/tournament.hh
 2009-06-04 21:50:20 -07:00
Nathan Binkert e30c62ad99 style: cleanup style 2009-06-04 21:41:46 -07:00
Nathan Binkert b08c361911 swig: %include Event before PythonEvent so python gets the subclass correct. 
Before this change, some versions of swig would cause PythonEvent to be
derived from object instead of Event
 2009-06-01 16:38:57 -07:00
Nathan Binkert a0104b6ff6 request: add accessor and constructor for setting time other than curTick 2009-05-29 15:30:16 -07:00
Gabe Black 7f50ea05ac X86: Keep track of more descriptor state to accomodate KVM. 2009-05-28 23:27:56 -07:00
Nathan Binkert 47877cf2db types: add a type for thread IDs and try to use it everywhere 2009-05-26 09:23:13 -07:00
Gabe Black d93392df28 X86: Really set up the GDT and various hidden/visible segment registers. 2009-05-26 02:23:08 -07:00
Steve Reinhardt 6566028801 util: mkblankimage.sh should be executable 2009-05-22 21:24:09 -07:00
Korey Sewell 107cf2ed52 build_opts: update ALPHA_FS cpu models 2009-05-21 11:04:24 -04:00
Steve Reinhardt b3d0a01eb3 igbe: Fix descriptor cache bug. 2009-05-20 21:52:32 -07:00
Nathan Binkert 8d2e51c7f5 includes: sort includes again 2009-05-17 14:34:52 -07:00
Nathan Binkert 709d859530 includes: use base/types.hh not inttypes.h or stdint.h 2009-05-17 14:34:51 -07:00
Nathan Binkert eef3a2e142 types: Move stuff for global types into src/base/types.hh 
--HG--
rename : src/sim/host.hh => src/base/types.hh
 2009-05-17 14:34:50 -07:00
Nathan Binkert cbf237897f stats: tidy up the Distribution type a little bit 2009-05-13 07:18:03 -07:00
Nathan Binkert cfa9c78100 stats: fancy is a bad name 2009-05-13 07:18:02 -07:00
Nathan Binkert 74c595d739 stats: clean up the code for printing stats 2009-05-13 07:18:01 -07:00
Korey Sewell 97a04b16eb mips-merge: merge hello world regress for inorder cpu 
w/latest changes
 2009-05-13 02:02:05 -04:00
Korey Sewell c94944e257 inorder-regress: add hello MIPS_SE 2009-05-13 01:55:04 -04:00
Nathan Binkert 5207586b26 ruby: deal with printf warnings and convert some to cprintf 2009-05-12 22:33:05 -07:00
Nathan Binkert 016d472c46 ruby: remove random uint typedef and use unsigned 2009-05-12 22:33:05 -07:00
Nathan Binkert 7389dc63b2 ruby: Make ruby's Map use hashmap.hh to simplify things. 2009-05-12 22:33:05 -07:00
Nathan Binkert 82c9e6a5fc gcc: work around a bogus gcc error 2009-05-12 22:33:05 -07:00
Nathan Binkert 0c2b9cf90d slicc: work around improper initialization of a global in slicc. 2009-05-12 22:33:05 -07:00
Nathan Binkert d923ce0f8c slicc: clean up the slicc environment so things build properly on mac. 2009-05-12 22:33:04 -07:00
Korey Sewell 2452d6b6a3 mips_se: add cpu_models to build options 2009-05-13 01:26:47 -04:00
Korey Sewell 1f4c954590 inorder-mips: Remove eaComp & memAcc; use 'visible' eaComp 
Inorder expects eaComp to be visible through StaticInst object. This mirrors a similar change
to ALPHA... Needs to be done for SPARC and whatever other ISAs want to use InOrderCPU
 2009-05-13 01:26:46 -04:00
Korey Sewell bc69e7947c arch-mips: add regWidth constant to float regfile 2009-05-13 01:26:38 -04:00
Korey Sewell a032d91016 cpus: add InOrderCPU to default build 
regressions need this so they build the model
 2009-05-12 20:55:21 -04:00
Korey Sewell 373e55c7b9 inorder-regress: missing regress config file 
regressions need to access this file to setup the InOrderCPU object
 2009-05-12 20:30:40 -04:00
Korey Sewell 5d810c30e6 alpha-isa: add mt.hh so it can compile with inorder 2009-05-12 20:18:34 -04:00
Korey Sewell b5959124e1 inorder-regress: add vortex ALPHA_SE 2009-05-12 15:01:17 -04:00
Korey Sewell 39010b990d inorder-regress: add twolf ALPHA-SE 2009-05-12 15:01:16 -04:00
Korey Sewell ca20d1dd23 inorder-regress: add hello world 2009-05-12 15:01:16 -04:00
Korey Sewell 6c88730540 inorder-resources: delete events 
make sure unrecognized events in the resource pool are deleted and also delete resource events in destructor
 2009-05-12 15:01:16 -04:00
Korey Sewell db2b721380 inorder-tlb-cunit: merge the TLB as implicit to any memory access 
TLBUnit no longer used and we also get rid of memAccSize and memAccFlags functions added to ISA and StaticInst
since TLB is not a separate resource to acquire. Instead, TLB access is done before any read/write to memory
and the result is checked before it's sent out to memory.
* * *
 2009-05-12 15:01:16 -04:00
Korey Sewell 3a057bdbb1 inorder-tlb: squash insts in TLB correctly 
TLB had a bug where if it was stalled and waiting , it would not squash all instructions older than squashed instruction correctly
* * *
 2009-05-12 15:01:16 -04:00
Korey Sewell f1c97e830b inorder-faults: ignore unalign translation faults for prefetches 2009-05-12 15:01:16 -04:00