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Author SHA1 Message Date
Brad Beckmann
d77a9df3c1 ruby: MOESI_CMP_token updates to use the new config system 2010-01-29 20:29:25 -08:00
Brad Beckmann
b3d195153e ruby: MI_example updates to use the new config system 2010-01-29 20:29:24 -08:00
Brad Beckmann
502b8bd8a4 ruby: Memory size consistency check 
Ruby's memory is now sized according to the size of M5 physical memory.
 2010-01-29 20:29:24 -08:00
Brad Beckmann
134cc3d48d ruby: convert to M5 MemorySize 
Converted both ruby caches and directory memory to use the M5 MemorySize python
type.
 2010-01-29 20:29:23 -08:00
Brad Beckmann
45230a4f6b ruby: added the GEMS ruby tester 2010-01-29 20:29:23 -08:00
Brad Beckmann
f88faa6c11 ruby: cleaned up ruby profilers 
Cleaned up the ruby profilers by moving the memory controller profiling code
out of the main profiler object and into a separate object similar to the
current CacheProfiler.  Both the CacheProfiler and MemCntrlProfiler are
specific to a particular Ruby object, CacheMemory and MemoryControl
respectively.  Therefore, these profilers should not be SimObjects and
created by the python configuration system, but instead private objects.  This
simplifies the creation of these profilers.
 2010-01-29 20:29:22 -08:00
Brad Beckmann
cfe41d0a1b ruby: Removed RubySystem::getNumberOfSequencers 
removed the static function RubySystem::getNumberOfSequencers and replaced
it with a python config variable
 2010-01-29 20:29:21 -08:00
Brad Beckmann
ce2d13195b ruby: FS support using the new configuration system 2010-01-29 20:29:21 -08:00
Brad Beckmann
dc758641c9 ruby: reorganized ruby python configuration 
Reorganized ruby python configuration so that protocol and ruby memory system
configuration code can be shared by multiple front-end configuration files
(i.e. memory tester, full system, and hopefully the regression tester).  This
code works for memory tester, but have not tested fs mode.
 2010-01-29 20:29:20 -08:00
Brad Beckmann
2c9ca672df ruby: Memory Controller Profiler with new config system 
This patch includes a rather substantial change to the memory controller
profiler in order to work with the new configuration system.  Most
noteably, the mem_cntrl_profiler no longer uses a string map, but instead
a vector.  Eventually this support should be removed from the main
profiler and go into a separate object.  Each memory controller should have
a pointer to that new mem_cntrl profile object.
 2010-01-29 20:29:20 -08:00
Brad Beckmann
2a0555470c ruby: Converted MOESI_hammer dma cntrl to new config system 2010-01-29 20:29:19 -08:00
Brad Beckmann
3b290a35ac ruby: Added the cache profiler to the new config system 2010-01-29 20:29:19 -08:00
Brad Beckmann
12daaed84a ruby: Added clock to ruby system 
As a first step to migrate ruby to the M5 eventqueue, added a clock
variable to the ruby system.
 2010-01-29 20:29:19 -08:00
Brad Beckmann
ed81489954 ruby: Ruby changes required to use the python config system 
This patch includes the necessary changes to connect ruby objects using
the python configuration system.  Mainly it consists of removing
unnecessary ruby object pointers and connecting the necessary object
pointers using the generated param objects.  This patch includes the
slicc changes necessary to connect generated ruby objects together using
the python configuraiton system.
 2010-01-29 20:29:19 -08:00
Brad Beckmann
42bebab779 ruby: connects sm queues to the network 2010-01-29 20:29:18 -08:00
Steve Reinhardt
a8ea70dac6 ruby: Calculate system total memory capacity in Python 
rather than in RubySystem object.
 2010-01-29 20:29:18 -08:00
Steve Reinhardt
0b54f1db8e ruby: Add support for generating topologies in Python. 2010-01-29 20:29:17 -08:00
Steve Reinhardt
98c94cfe3c ruby: Convert most Ruby objects to M5 SimObjects. 
The necessary companion conversion of Ruby objects generated by SLICC
are converted to M5 SimObjects in the following patch, so this patch
alone does not compile.
Conversion of Garnet network models is also handled in a separate
patch; that code is temporarily disabled from compiling to allow
testing of interim code.
 2010-01-29 20:29:17 -08:00
Gabe Black
93d89b288f X86: Record the memory mode when building an X86 system. 2009-12-19 01:49:34 -08:00
Brad Beckmann
c6182199c5 m5: improvements to the ruby_fs.py file 2009-11-18 16:34:32 -08:00
Brad Beckmann
70a261c0ae m5: Added option to take a checkpoint at the end of simulation 2009-11-18 13:55:58 -08:00
Brad Beckmann
b8c413e993 m5: Moved profile option since Simulation depends on it. 2009-11-18 13:55:58 -08:00
Brad Beckmann
90d6e2652f ruby: included ruby config parameter ports per core 
Slightly improved the major hack need to correctly assign the number of ports
per core.  CPUs have two ports: icache + dcache.  MemTester has one port.
 2009-11-18 13:55:58 -08:00
Brad Beckmann
3cf24f9716 ruby: Support for merging ALPHA_FS and ruby 
Connects M5 cpu and dma ports directly to ruby sequencers and dma
sequencers.  Rubymem also includes a pio port so that pio requests
and be forwarded to a special pio bus connecting to device pio
ports.
 2009-11-18 13:55:58 -08:00
Brad Beckmann
c3204421d8 ruby: Ruby memtest python script. 2009-11-18 13:55:57 -08:00
Brad Beckmann
912f3d7074 removed libruby file reference from ruby_se.py 2009-10-16 08:15:53 -07:00
Nathan Binkert
9a8cb7db7e python: Move more code into m5.util allow SCons to use that code. 
Get rid of misc.py and just stick misc things in __init__.py
Move utility functions out of SCons files and into m5.util
Move utility type stuff from m5/__init__.py to m5/util/__init__.py
Remove buildEnv from m5 and allow access only from m5.defines
Rename AddToPath to addToPath while we're moving it to m5.util
Rename read_command to readCommand while we're moving it
Rename compare_versions to compareVersions while we're moving it.

--HG--
rename : src/python/m5/convert.py => src/python/m5/util/convert.py
rename : src/python/m5/smartdict.py => src/python/m5/util/smartdict.py
 2009-09-22 15:24:16 -07:00
Korey Sewell
6499174115 inorder-configs: update se.py 
fix bug with  'numThreads=len(workloads)' which was counting characters of command-line not counting threads as intended.
Update numThreads for inorder/o3 cases and default to 1 for all other cases.
 2009-09-16 09:46:26 -04:00
Korey Sewell
7858a8e68f configs: add maxinsts option on command line 
-option to allow threads to run to a max_inst_any_thread which is more useful/quicker in a lot of
cases then always having to figure out what tick to run your simulation to.
 2009-09-16 09:45:30 -04:00
Steve Reinhardt
15bb248013 Add an I/O cache to FS config even if there's just an "L2" cache. 2009-09-14 21:19:40 -07:00
Korey Sewell
6c46313556 se-configs: edit se.py to account for non-O3CPU workloads 2009-07-26 00:13:35 -04:00
Korey Sewell
44f80e7ca5 o3-smt: enforce numThreads parameter for SMT SE mode 2009-07-25 00:50:27 -04:00
Daniel Sanchez
93f2f69657 ruby: Working M5 interface and updated Ruby interface. 
This changeset also includes a lot of work from Derek Hower <drh5@cs.wisc.edu>

RubyMemory is now both a driver for Ruby and a port for M5.  Changed
makeRequest/hitCallback interface. Brought packets (superficially)
into the sequencer. Modified tester infrastructure to be packet based.
and Ruby can be used together through the example ruby_se.py
script. SPARC parallel applications work, and the timing *seems* right
from combined M5/Ruby debug traces. To run,
% build/ALPHA_SE/m5.debug configs/example/ruby_se.py -c
  tests/test-progs/hello/bin/alpha/linux/hello -n 4 -t
 2009-05-11 10:38:46 -07:00
Korey Sewell
c70241810d cpus: fix cpu progress event 
this was double scheduling itself (once in constructor and once in cpu code). also add support for stopping / starting
progress events through repeatEvent flag and also changing the interval of the progress event as well
 2009-05-05 02:51:31 -04:00
Gabe Black
8d84f81e70 X86, Config: Make makeX86System consider the number of CPUs, and clean up interrupt assignment. 2009-04-26 02:04:32 -07:00
Steve Reinhardt
6629d9b2bc mem: use single BadAddr responder per system. 
Previously there was one per bus, which caused some coherence problems
when more than one decided to respond.  Now there is just one on
the main memory bus.  The default bus responder on all other buses
is now the downstream cache's cpu_side port.  Caches no longer need
to do address range filtering; instead, we just have a simple flag
to prevent snoops from propagating to the I/O bus.
 2008-07-16 11:10:33 -07:00
Steve Reinhardt
97b6947eb7 Minor tweaks for future Ruby compatibility. 2009-04-21 08:17:36 -07:00
Gabe Black
b8333a5155 X86: Actually put the PCI INTA entry into the MP tables. 2009-04-19 04:15:18 -07:00
Gabe Black
25e223c30f X86: Make E820 report nice, round (and correct) numbers. 2009-04-19 04:14:48 -07:00
Gabe Black
06d25dcd26 X86: Automatically make the IO APIC in an N CPU system have id N+1. 2009-04-19 02:39:19 -07:00
Steve Reinhardt
9b66e82897 configs: Allow M5_CPU2000 env var to set CPU2K binary path. 
It would be nice to have a more comprehensive mechanism
but this is a big improvement over manually editing the script.
 2009-04-15 12:52:31 -07:00
Gabe Black
eafdf00eb3 X86: Add IRQ4 to the Intel MP tables. 2009-02-25 10:19:06 -08:00
Korey Sewell
cf4a00ca41 Configs: Add support for the InOrder CPU model 2009-02-10 15:49:29 -08:00
Gabe Black
1c5b9773bd X86: Find the natural lpj for this configuration. 2009-02-01 00:29:07 -08:00
Gabe Black
a5ed1590bd X86: Add a root device to the kernel command line. 2009-02-01 00:27:49 -08:00
Gabe Black
70cd5bfce5 X86: Configure the first PCI interrupt. 2009-02-01 00:26:10 -08:00
Gabe Black
18f6c18323 X86: Hook in a hard drive image. 2009-02-01 00:24:26 -08:00
Gabe Black
01679bb416 X86: Take out the IDE noprobe kernel arguments. 2009-02-01 00:20:44 -08:00
Gabe Black
bb7ad80bbe X86: Plug in an IDE controller. 2009-02-01 00:00:03 -08:00
Gabe Black
d08b8e2b82 X86: Add some interrupt info to the intel MP tables. 2009-01-31 23:43:09 -08:00
Ali Saidi
f4291aac25 Errors: Print a URL with a hash of the format string to find more information about an error. 2009-01-30 20:04:15 -05:00
Gabe Black
7b7a92d3f4 X86: Prevent Linux for probing for non-existant IDE controllers. 2009-01-25 20:36:24 -08:00
Gabe Black
ff29e00112 X86: Add entries for the IO APIC to the MP table. 2008-10-11 16:12:34 -07:00
Gabe Black
526933e5d0 X86: Add an Intel MP table to the simulation. 2008-10-11 15:14:37 -07:00
Gabe Black
3af428606a X86: Rename the PC device to Pc. 
--HG--
rename : src/dev/x86/PC.py => src/dev/x86/Pc.py
 2008-10-11 02:23:40 -07:00
Gabe Black
ec0fb05d64 X86: Turn SMBios structures into simobjects. 2008-10-10 03:50:51 -07:00
Gabe Black
b4dab225fd X86: Split makeLinuxX86System into makeLinuxX86System and makeX86System. 2008-10-10 03:50:30 -07:00
Ali Saidi
3a3e356f4e style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs 2008-09-10 14:26:15 -04:00
Michael Adler
5f42bfcd56 process: separate stderr from stdout 
- Add the option of redirecting stderr to a file. With the old
behaviour, stderr would follow stdout if stdout was to a file, but
stderr went to the host stderr if stdout went to the host stdout.  The
new default maintains stdout and stderr going to the host.  Now the
two can specify different files, but they will share a file descriptor
if the name of the files is the same.
- Add --output and --errout options to se.py to go with --input.
 2008-07-23 14:41:34 -07:00
Nathan Binkert
00df9016fe Rename SimConsole to Terminal since it makes more sense 
--HG--
rename : src/dev/SimConsole.py => src/dev/Terminal.py
rename : src/dev/simconsole.cc => src/dev/terminal.cc
rename : src/dev/simconsole.hh => src/dev/terminal.hh
 2008-06-17 20:29:06 -07:00
Ali Saidi
7e6728450f Scripts: Check for the appropriate build type as soon as possible. 2008-06-13 01:09:06 -04:00
Gabe Black
bceaa257a3 X86: Make the e820 table manually or automatically configurable from python. 2008-06-12 00:58:36 -04:00
Gabe Black
561a541797 X86: Force the kernel to use a certain loops per jiffy instead of calculating it. 2008-06-12 00:46:16 -04:00
Gabe Black
f6a97752b0 X86: Make the amount of system memory match the hardcoded e820 info. 2008-06-12 00:45:11 -04:00
Gabe Black
633c585bfa X86: Make the regular console use the serial port as well. 2008-06-12 00:45:01 -04:00
Gabe Black
b0c52885ce X86: Change the Opteron platform to be the PC platform. 
--HG--
extra : convert_revision : 2c6ffebbad04a21cef6ba3fbc1803218908a6c37
 2008-03-25 02:06:53 -04:00
Ali Saidi
969688154d Simpoints: Fix regression bug/Don't set process.simpoint, if simpoint doesn't exist 
--HG--
extra : convert_revision : c156c49668815755c4c788f807e8eba32151aa24
 2008-03-15 22:20:09 -04:00
Lisa Hsu
02a56d8d01 Error out if -s is used without --caches (instead of saying you must specify a 
CPU).

--HG--
extra : convert_revision : a3b2bfbe7e037146ac08dd08834bf255da692506
 2008-02-29 01:49:36 -05:00
Ali Saidi
0273533adb Configs: Make sure options don't conflict 
--HG--
extra : convert_revision : dc9b91cf1d8e33c5e68d7faeb45dbe3e7038d14c
 2008-02-29 01:23:18 -05:00
Ali Saidi
3cb7df428c Configs: Fix some bugs we introduced in the simpoints code 
--HG--
extra : convert_revision : ef22c11cb3242903a484fc05dc0f96d3e5f9af72
 2008-02-28 20:39:01 -05:00
Rick Strong
fcfc8b8c4f Configs: Make using Simpoints easier with some config files that support them easily 
--HG--
extra : convert_revision : 0f21829306eb68b332f03da410e6c341c8595bdd
 2008-02-27 00:35:09 -05:00
Gabe Black
7bde0285e5 X86: Get PCI config space to work, and adjust address space prefix numbering scheme. 
--HG--
extra : convert_revision : 2b382f478ee8cde3a35aa4c105196f200bc7afa6
 2008-02-26 23:38:01 -05:00
Vilas Sridharan
2e079ce038 add instruction count fast forwaing and max instruction options 
--HG--
extra : convert_revision : 8fe45e512229cdc3e0dcd23e3e5c54516c445d0f
 2008-02-22 17:48:10 -05:00
Ali Saidi
fc38e9c630 Configs: Change Simulation.py to return a subclass of the CPU models rather than the original class. Without this changes elsewhere in the config script (e.g. the DriveSys frequency can change the TestSys frequency. 
--HG--
extra : convert_revision : f972207c616590a60a6e103daa5de469cf124b44
 2008-02-14 16:13:50 -05:00
Gabe Black
657b52fea1 X86: Use the existing boot_osflags instead of duplicating it. 
--HG--
extra : convert_revision : e04e438d7d261a61c52b946c23cd126ed648814a
 2008-01-21 04:32:34 -05:00
Gabe Black
223e48e6ae X86: Make the IO ports work using extra physical address lines. Add a serial port. 
--HG--
extra : convert_revision : a14cb4fc9afedfc0ff58b11a7f8fb5516d462cc6
 2008-01-12 06:39:15 -05:00
Ali Saidi
45ea1549c9 Checkpointing: Fix a bug in the simulation script when restoring without standard switch and change some ifs to work with the default port since every port is now connected to something. 
--HG--
extra : convert_revision : 72507cf13e58465291b0dce6322e853bee5a2b89
 2007-12-18 01:52:57 -05:00
Gabe Black
42ae409746 X86: Move startup code to the system object to initialize a Linux system. 
--HG--
extra : convert_revision : a4796c79f41aa8b8f38bf2f628bee8f1b3af64be
 2007-12-01 23:09:56 -08:00
Korey Sewell
10e0ae5407 Accidently kept hardcoded memory value in merge. Remove that and now ALPHA_FS quick regressions pass 
--HG--
extra : convert_revision : 12582bef9317cd102cafdea9001f45651d34851f
 2007-11-16 19:37:21 -05:00
Korey Sewell
3ee0433f7c compile-time fix for setMipsOptions function 
--HG--
extra : convert_revision : e008f6d314d4891cb6ddc9cbf96fbcc6eee53b35
 2007-11-16 19:15:20 -05:00
Korey Sewell
3fd291bc4e merge Ali's config change... 
--HG--
extra : convert_revision : ada34ebc392d84f1225b4ff3e25f353396aa102f
 2007-11-15 14:21:42 -05:00
Korey Sewell
3110b157e6 fix MIPS headers 
--HG--
extra : convert_revision : 2870a146a1be0e8c80878090f39c0eaa15d2eb13
 2007-11-15 14:21:01 -05:00
Korey Sewell
9cff176bbc add setMipsOptions function for MIPS usage 
--HG--
extra : convert_revision : 42909d66a46201757cbdb14f75cccbd6b27d1f18
 2007-11-15 14:20:41 -05:00
Ali Saidi
0896b5b897 Configs: Fix for benchmarks that don't use getopt. 
--HG--
extra : convert_revision : 6cbc7bb360c282821dd9da7814e0ac8b689f5d01
 2007-11-15 12:58:06 -05:00
Ali Saidi
185f0eb134 Config: Fix some errors in the splash2 config file. 
--HG--
extra : convert_revision : 7bcb0f039e0609f95a081ef3aba2edb1ffa742f2
 2007-11-15 03:51:28 -05:00
Korey Sewell
2692590049 Add in files from merge-bare-iron, get them compiling in FS and SE mode 
--HG--
extra : convert_revision : d4e19afda897bc3797868b40469ce2ec7ec7d251
 2007-11-13 16:58:16 -05:00
Ali Saidi
5a4fc93fca Checkpoint: Use checkpoint_dir, if that is not set use outdir (-d), and if that isn't set use cwd. 
--HG--
extra : convert_revision : 6548dd6de376dd59285a37a03bcf2525f8fc3845
 2007-11-03 14:41:00 -04:00
Ali Saidi
51345d7324 Checkpoints: Change Simulation.py to not go crazy if the simulation ends before the number of checkpoints requested are created. 
--HG--
extra : convert_revision : 865179134a219b34dbbba698e1fa0da7c452e074
 2007-10-25 22:20:00 -04:00
Ali Saidi
a630d77ec5 Configuration: Move iocache outside of processors loop so it works for MP systems 
--HG--
extra : convert_revision : 0ba563555a94eb22a6d4e402388e75e70d3556c2
 2007-10-08 15:19:58 -04:00
Gabe Black
847a18ad48 X86: Adjust the config scripts for x86 fs. 
--HG--
extra : convert_revision : 36ed22b50066f54be0e51c3419babc07dd218e10
 2007-10-07 17:52:36 -07:00
Ali Saidi
136cb057d4 Checkpointing: Fix directory regex 
--HG--
extra : convert_revision : 4d3958eda66209373249e54e7deadd1a7442e828
 2007-09-12 15:27:15 -04:00
Ali Saidi
6f9ad931cc Checkpointing: Force drain/resume when switching a CPU 
--HG--
extra : convert_revision : 7d9c3f4c8c357e3a9214deba5df3581beeaf7cb6
 2007-09-12 15:24:24 -04:00
Ali Saidi
dd6a21190e Configuration: Fix example script to only create one L2 if --l2cache and -nX are given as parameters. 
Patch submitted by: Jonas Diemer [diemer (a) ida.ing.tu-bs.de]

--HG--
extra : convert_revision : 1dfc548d2bc33d622d829bbf385f4bf9700711cd
 2007-09-05 14:57:50 -04:00
Ali Saidi
bba265ccd8 PCI: Move PCI Configuration data into devices now that we can inherit parameters. 
--HG--
extra : convert_revision : bd2214b28fb46a9a9e9e204e0539be33acb548ad
 2007-08-16 16:49:05 -04:00
Ali Saidi
773cb77656 Devices: Make EtherInts connect in the same way memory ports currently do. 
--HG--
extra : convert_revision : 765b096785a77df9adc4791c9101b90696bd7be2
 2007-08-16 16:49:02 -04:00
Ali Saidi
e9ddc7fbca Regression: fix configuration for SPARC_FS 
--HG--
extra : convert_revision : 88aa9649cc1b4d8165616e98880d3d6cd2a75762
 2007-08-12 19:44:04 -04:00
Vincentius Robby
ec4000e0e2 Added fastmem option. 
Lets CPU accesses to physical memory bypass Bus.

--HG--
extra : convert_revision : e56e3879de47ee10951a19bfcd8b62b6acdfb30c
 2007-08-08 18:43:12 -04:00
Ali Saidi
06a9f58c68 DMA: Add IOCache and fix bus bridge to optionally only send requests one 
way so a cache can handle partial block requests for i/o devices.

--HG--
extra : convert_revision : a68b5ae826731bc87ed93eb7ef326a2393053964
 2007-08-10 16:14:01 -04:00
Steve Reinhardt
3afc625975 merge from head 
--HG--
extra : convert_revision : 21f7afe2719c00744c0981212c1ee6e442238e01
 2007-08-03 03:51:30 -04:00
Ali Saidi
31a9114a3d merge, no manual changes 
--HG--
extra : convert_revision : 8504bddf1f73a4186cebc03c3e52e42ea38361fc
 2007-08-02 15:38:06 -04:00