X86: Rename the PC device to Pc.
--HG-- rename : src/dev/x86/PC.py => src/dev/x86/Pc.py
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826621eb17
commit
3af428606a
6 changed files with 21 additions and 21 deletions
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@ -180,7 +180,7 @@ def makeX86System(mem_mode, mdesc = None, self = None):
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self.bridge.side_b = self.membus.port
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# Platform
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self.pc = PC()
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self.pc = Pc()
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self.pc.attachIO(self.iobus)
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self.intrctrl = IntrControl()
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@ -40,8 +40,8 @@ def x86IOAddress(port):
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IO_address_space_base = 0x8000000000000000
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return IO_address_space_base + port;
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class PC(Platform):
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type = 'PC'
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class Pc(Platform):
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type = 'Pc'
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system = Param.System(Parent.any, "system")
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pciconfig = PciConfigAll()
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@ -31,7 +31,7 @@
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Import('*')
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if env['FULL_SYSTEM'] and env['TARGET_ISA'] == 'x86':
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SimObject('PC.py')
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SimObject('Pc.py')
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Source('pc.cc')
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SimObject('SouthBridge.py')
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@ -47,7 +47,7 @@
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using namespace std;
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using namespace TheISA;
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PC::PC(const Params *p)
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Pc::Pc(const Params *p)
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: Platform(p), system(p->system)
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{
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southBridge = NULL;
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@ -56,7 +56,7 @@ PC::PC(const Params *p)
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}
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void
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PC::init()
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Pc::init()
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{
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assert(southBridge);
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I8254 & timer = *southBridge->pit;
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@ -70,40 +70,40 @@ PC::init()
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}
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Tick
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PC::intrFrequency()
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Pc::intrFrequency()
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{
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panic("Need implementation\n");
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M5_DUMMY_RETURN
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}
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void
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PC::postConsoleInt()
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Pc::postConsoleInt()
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{
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warn_once("Don't know what interrupt to post for console.\n");
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//panic("Need implementation\n");
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}
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void
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PC::clearConsoleInt()
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Pc::clearConsoleInt()
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{
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warn_once("Don't know what interrupt to clear for console.\n");
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//panic("Need implementation\n");
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}
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void
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PC::postPciInt(int line)
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Pc::postPciInt(int line)
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{
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panic("Need implementation\n");
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}
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void
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PC::clearPciInt(int line)
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Pc::clearPciInt(int line)
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{
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panic("Need implementation\n");
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}
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Addr
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PC::pciToDma(Addr pciAddr) const
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Pc::pciToDma(Addr pciAddr) const
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{
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panic("Need implementation\n");
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M5_DUMMY_RETURN
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@ -111,7 +111,7 @@ PC::pciToDma(Addr pciAddr) const
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Addr
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PC::calcConfigAddr(int bus, int dev, int func)
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Pc::calcConfigAddr(int bus, int dev, int func)
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{
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assert(func < 8);
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assert(dev < 32);
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@ -119,8 +119,8 @@ PC::calcConfigAddr(int bus, int dev, int func)
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return (PhysAddrPrefixPciConfig | (func << 8) | (dev << 11));
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}
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PC *
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PCParams::create()
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Pc *
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PcParams::create()
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{
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return new PC(this);
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return new Pc(this);
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}
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@ -38,13 +38,13 @@
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#define __DEV_PC_HH__
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#include "dev/platform.hh"
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#include "params/PC.hh"
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#include "params/Pc.hh"
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class IdeController;
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class System;
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class SouthBridge;
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class PC : public Platform
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class Pc : public Platform
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{
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public:
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/** Pointer to the system */
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@ -52,14 +52,14 @@ class PC : public Platform
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SouthBridge *southBridge;
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public:
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typedef PCParams Params;
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typedef PcParams Params;
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/**
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* Do platform initialization stuff
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*/
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void init();
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PC(const Params *p);
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Pc(const Params *p);
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/**
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* Return the interrupting frequency to AlphaAccess
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@ -40,7 +40,7 @@ SouthBridge::SouthBridge(const Params *p) : SimObject(p),
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cmos(p->cmos), speaker(p->speaker)
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{
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// Let the platform know where we are
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PC * pc = dynamic_cast<PC *>(platform);
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Pc * pc = dynamic_cast<Pc *>(platform);
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assert(pc);
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pc->southBridge = this;
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}
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