Lisa Hsu
4a3ce94386
Stats: fix dist stat and enable VectorDistStat
2010-06-03 11:06:12 -07:00
Lisa Hsu
aeb6e2e3ec
utils: checkpoint aggregator: some physmem files are too big to read at once,
...
break it up into reading one page at a time. Also, avoid redoing a aggregating a checkpoint that's
already done.
--HG--
rename : util/checkpoint-aggregator.py => util/checkpoint_aggregator.py
2010-06-03 10:34:40 -07:00
Ali Saidi
d2186857b1
ARM: Fix issue with m5.fast and ARM
2010-06-03 12:20:49 -04:00
Ali Saidi
5268067f14
ARM: Fix SPEC2000 benchmarks in SE mode. With this patch all
...
Spec2k benchmarks seem to run with atomic or timing mode simple
CPUs. Fixed up some constants, handling of 64 bit arguments,
and marked a few more syscalls ignoreFunc.
2010-06-02 12:58:18 -05:00
Min Kyu Jeong
5d5bf8cbc7
ARM: Fix IT state not updating when an instruction memory instruction faults.
2010-06-02 12:58:18 -05:00
Dam Sunwoo
4325519fc5
ARM: Allow multiple outstanding TLB walks to queue.
2010-06-02 12:58:18 -05:00
Ali Saidi
2bad5138e4
ARM TLB: Fix bug in memAttrs getting a bogus thread context
2010-06-02 12:58:18 -05:00
Dam Sunwoo
6b00c7fa22
ARM: Support table walks in timing mode.
2010-06-02 12:58:18 -05:00
Dam Sunwoo
6c8dd32fa4
ARM: Added support for Access Flag and some CP15 regs (V2PCWPR, V2PCWPW, V2PCWUR, V2PCWUW,...)
2010-06-02 12:58:18 -05:00
Gabe Black
85ba2a3243
ARM: Decode the neon instruction space.
2010-06-02 12:58:18 -05:00
Gabe Black
e50e6a260f
ARM: Add a comment to vfp.cc that explains the asm statements.
2010-06-02 12:58:18 -05:00
Gabe Black
10031a0327
ARM: Move some case values out of ##included files.
...
This will help keep the high level decode together and not have it spread into
the subordinate decode stuff. The ##include lines still need to be on a line
by themselves, though.
2010-06-02 12:58:18 -05:00
Gabe Black
22f15ab94e
ARM: Combine some redundant cases in one of the data decode functions.
2010-06-02 12:58:18 -05:00
Gabe Black
fcee2b3f31
ARM: Add comments to the classes in macromem.hh.
2010-06-02 12:58:18 -05:00
Gabe Black
362b747fdc
ARM: Move code from vfp.hh to vfp.cc.
2010-06-02 12:58:18 -05:00
Ali Saidi
35e35fc825
ARM: Make some of the trace code more compact
2010-06-02 12:58:18 -05:00
Gabe Black
0abec53564
ARM: Move the longer MemoryReg::printoffset function in mem.hh into the cc file.
2010-06-02 12:58:18 -05:00
Gabe Black
9223725973
ARM: Move the ISA "clear" function into isa.cc.
2010-06-02 12:58:17 -05:00
Gabe Black
b6c2548a27
ARM: Get rid of the binary dumping function in utility.hh.
2010-06-02 12:58:17 -05:00
Gabe Black
f8d2ed708b
ARM: Get rid of the empty branch.cc.
2010-06-02 12:58:17 -05:00
Gabe Black
0c574987c8
ARM: Mark some ARM static inst functions as inline.
2010-06-02 12:58:17 -05:00
Gabe Black
ba7a7b0394
ARM: Move some predecoder stuff into a .cc file.
...
--HG--
rename : src/arch/arm/predecoder.hh => src/arch/arm/predecoder.cc
2010-06-02 12:58:17 -05:00
Gabe Black
358fdc2a40
ARM: Decode to specialized conditional/unconditional versions of instructions.
...
This is to avoid condition code based dependences from effectively serializing
instructions when the instruction doesn't actually use them.
2010-06-02 12:58:17 -05:00
Gabe Black
596cbe19d4
ARM: Make sure undefined unconditional ARM instructions decode as such.
2010-06-02 12:58:17 -05:00
Gabe Black
6101e1b062
ARM: Implement a version of mcr and mrc that works in user mode.
2010-06-02 12:58:17 -05:00
Gabe Black
e91e6ff9a4
ARM: Hook the misc instructions into the thumb decoder.
2010-06-02 12:58:17 -05:00
Gabe Black
22d1a84509
ARM: Move some miscellaneous instructions out of the decoder to share with thumb.
2010-06-02 12:58:17 -05:00
Gabe Black
0e556e9dfb
ARM: Treat LDRD in ARM with an odd index as an undefined instruction.
2010-06-02 12:58:17 -05:00
Ali Saidi
3dc6a8070e
ARM: fix sizes of structs for ARM Linux
2010-06-02 12:58:17 -05:00
Ali Saidi
f703e9c975
ARM: Updated regressions for changes in SE mode stack
2010-06-02 12:58:17 -05:00
Ali Saidi
d3a519ef0c
ARM: Fixup native trace support and add some v7/recent stack code
2010-06-02 12:58:17 -05:00
Gabe Black
5a6bf8301a
ARM: Detect a bad offset field for the VFP Ldm/Stm instructions in the decoder.
2010-06-02 12:58:17 -05:00
Gabe Black
563db6cb99
ARM: Make sure the upc is zeroed when vectoring to a fault.
2010-06-02 12:58:17 -05:00
Ali Saidi
5d67be7b1e
ARM: Implement the getrusage syscall.
2010-06-02 12:58:17 -05:00
Gabe Black
6e39288be0
ARM: Implement the bkpt instruction.
2010-06-02 12:58:16 -05:00
Gabe Black
e9c8f68c0f
ARM: Make undefined instructions obey predication.
2010-06-02 12:58:16 -05:00
Gabe Black
05bd3eb4ec
ARM: Implement support for the IT instruction and the ITSTATE bits of CPSR.
2010-06-02 12:58:16 -05:00
Gabe Black
b93ceef538
ARM: Get rid of some of the old FP implementation.
2010-06-02 12:58:16 -05:00
Ali Saidi
c1e1de8d69
ARM: Some TLB bug fixes.
2010-06-02 12:58:16 -05:00
Ali Saidi
7de7ea3b22
ARM: Move Miscreg functions out of isa.hh
2010-06-02 12:58:16 -05:00
Ali Saidi
cb9936cfde
ARM: Implement the ARM TLB/Tablewalker. Needs performance improvements.
2010-06-02 12:58:16 -05:00
Ali Saidi
f246be4cbc
DMA: Make DmaPort generic enough to be used other places
2010-06-02 12:58:16 -05:00
Ali Saidi
1546d8208b
ARM: SE needs a definition for PageTable::serialize/unserialize
2010-06-02 12:58:16 -05:00
Ali Saidi
d2ba9243f5
ARM: Add BKPT instruction
...
--HG--
rename : src/arch/arm/isa/formats/unknown.isa => src/arch/arm/isa/formats/breakpoint.isa
2010-06-02 12:58:16 -05:00
Ali Saidi
b8ec214553
ARM: Implement ARM CPU interrupts
2010-06-02 12:58:16 -05:00
Ali Saidi
3aea20d143
ARM: Start over with translation from Alpha code as opposed to something that has cruft from 4 different ISAs.
2010-06-02 12:58:16 -05:00
Gabe Black
237c0617a0
ARM: Implement conversion to/from half precision.
2010-06-02 12:58:16 -05:00
Gabe Black
04e196f422
ARM: Clean up VFP
2010-06-02 12:58:16 -05:00
Gabe Black
0fe0390f73
ARM: Clean up the implementation of the VFP instructions.
2010-06-02 12:58:16 -05:00
Gabe Black
c919ab5b4f
ARM: Fix double precision load/store multiple decrement.
...
When decrementing, the higher addressed half of a double word is at a 4 byte
smaller displacement.
2010-06-02 12:58:15 -05:00
