Gabe Black
6a923c1c79
X86: Implement a media square root microop.
2009-08-17 18:34:16 -07:00
Gabe Black
09eed9ff62
X86: Implement the media floating point max instructions.
2009-08-17 18:33:28 -07:00
Gabe Black
8d37ce8652
X86: Implement the floating point media max microop.
2009-08-17 18:33:25 -07:00
Gabe Black
34f528bd95
X86: Implement the media floating point min instructions.
2009-08-17 18:32:12 -07:00
Gabe Black
1d706c0434
X86: Implement a floating point media min microop.
2009-08-17 18:32:09 -07:00
Gabe Black
e20c8a4b05
X86: Implement the pack instructions.
2009-08-17 18:32:08 -07:00
Gabe Black
1273277d3b
X86: Create a pack media microop.
2009-08-17 18:27:54 -07:00
Gabe Black
e6b5192c26
X86: Rename sel to ext for media microops.
2009-08-17 18:27:44 -07:00
Gabe Black
80b4456fec
X86: Move the MMX version of MOVD into the simd64 directory.
2009-08-17 18:27:30 -07:00
Gabe Black
63403bd562
X86: Implement the remaining unpack instructions.
2009-08-17 18:27:19 -07:00
Gabe Black
7b18f8a062
X86: Implement PANDN, ANDNPS, and ANDNPD.
2009-08-17 18:25:00 -07:00
Gabe Black
458521f055
X86: Implement a multimedia andn microop.
2009-08-17 18:24:58 -07:00
Gabe Black
3633392ec4
X86: Implement PAND, ANDPS, and ANDPD.
2009-08-17 18:24:18 -07:00
Gabe Black
ab49a34a4e
X86: Implement a multimedia and microop.
2009-08-17 18:24:16 -07:00
Gabe Black
83a78072df
X86: Implement POR, ORPD and ORPS.
2009-08-17 18:23:33 -07:00
Gabe Black
25c6b016a6
X86: Implement a media or microop.
2009-08-17 18:23:30 -07:00
Gabe Black
f9346d25c8
X86: Implement PXOR.
2009-08-17 18:23:04 -07:00
Gabe Black
69f0bf743c
X86: (Re)implement XORPS and XORPD.
2009-08-17 18:22:37 -07:00
Gabe Black
982b3ad1f0
X86: Implement a media xor microop.
2009-08-17 18:22:33 -07:00
Gabe Black
f3fb444af4
X86: Implement PUNPCKLQDQ.
2009-08-17 18:21:46 -07:00
Gabe Black
cfaeb5eaf7
X86: Implement PUNPCKHQDQ.
2009-08-17 18:21:09 -07:00
Gabe Black
aabbb22cca
X86: Implement PUNPCKHDQ.
2009-08-17 18:20:50 -07:00
Gabe Black
535ba241f8
X86: Implement PUNPCKHWD.
2009-08-17 18:19:43 -07:00
Gabe Black
093b5b3274
X86: Implement PUNPCKHBW.
2009-08-17 18:19:19 -07:00
Gabe Black
3ae2f03927
X86: Implement PUNPCKLDQ.
2009-08-17 18:19:01 -07:00
Gabe Black
673b19f5d4
X86: Implement PUNPCKLWD.
2009-08-17 18:18:40 -07:00
Gabe Black
ae4ee21ecd
X86: Implement the versions of PUNPCKLBW that use XMM registers.
2009-08-17 18:18:19 -07:00
Gabe Black
24496060e5
X86: Implement the MOVQ instruction.
2009-08-17 18:17:29 -07:00
Gabe Black
f1bfa9d6e4
X86: Implement the lfpimm microop.
2009-08-17 18:17:26 -07:00
Gabe Black
fca7cb83f0
X86: Implement the versions of MOVD that have an MMX source.
2009-08-17 18:16:07 -07:00
Gabe Black
247ed2379d
X86: Implement the versions of PUNPCKLBW that use MMX registers.
2009-08-17 18:15:42 -07:00
Gabe Black
ecc62e750e
X86: Implement an unpack microop.
2009-08-17 18:15:39 -07:00
Gabe Black
6457fb7003
X86: Implement the versions of MOVD that have an MMX destination.
2009-08-17 18:15:24 -07:00
Gabe Black
191590bcc4
X86: Ignore the size part of XMM/MMX operands. The instructions know what they want.
2009-08-17 18:15:23 -07:00
Gabe Black
33cb4c2f09
X86: Use suffixes to differentiate XMM/MMX/GPR operands.
2009-08-17 18:15:21 -07:00
Gabe Black
3a4438a868
X86: Add microcode assembler symbols for mmx registers.
2009-08-17 18:15:19 -07:00
Gabe Black
2f1001e95c
X86: Set up a media microop framework and create mov2int and mov2fp microops.
2009-08-17 18:15:18 -07:00
Gabe Black
cec4e3b39e
X86: Create base classes for use with media/SIMD microops.
2009-08-17 18:15:16 -07:00
Gabe Black
0b68fbdbe1
X86: Turn the DIV and IDIV microcode into templates and generate all the variants.
2009-08-17 18:15:14 -07:00
Gabe Black
a9b2bf5119
X86: Remove some FIXMEs from IDIV that have been fixed.
2009-08-17 18:15:13 -07:00
Gabe Black
3f2f3bede8
X86: Turn the CMPXCHG8B microcode into a template and generate each variant.
2009-08-17 18:15:00 -07:00
Polina Dudnik
c438b2e431
Branch Merge
2009-08-17 11:33:32 -05:00
Gabe Black
a43ae579dd
Merge with head.
2009-08-17 00:21:57 -07:00
Gabe Black
32c8514b45
X86: Fix a bug introduced to IDIV in a recent attempt to fix another bug.
2009-08-17 00:20:03 -07:00
Nathan Binkert
a6b39c07d9
code_formatter: Add a python class for writing code generator templates
2009-08-16 13:40:03 -07:00
Nathan Binkert
2ecaa99025
ply: add a base class called Grammar that encapsulates a ply grammar
2009-08-16 13:40:01 -07:00
Nathan Binkert
2334e6fdd5
orderdict: Use DictMixin and add orderdict to m5.util
2009-08-16 13:40:00 -07:00
Nathan Binkert
06c7ecb207
python: Make it possible to import the parts of m5 that are pure python
2009-08-16 13:39:59 -07:00
Polina Dudnik
6654fe02da
Made servicing_atomic a counter and added started writes:
...
a function for setting the flag to indicate that
the rmw_writes started issuing
2009-08-15 12:45:11 -05:00
Polina Dudnik
a8e11cf3bb
Bug fix: indicate when writes started coming in
2009-08-14 17:57:54 -05:00
Polina Dudnik
ee3226d973
Merge with current branch
2009-08-14 15:30:25 -05:00
Polina Dudnik
0b0f47ec16
Added proc_id to CacheMsg for SMT.
...
Not yet necessary, but in case each of the threads
is allowed to initiate an atomic, will come in handy
2009-08-14 15:30:07 -05:00
Polina Dudnik
de25decf37
Multi-line RMW handling
2009-08-14 14:24:15 -05:00
Polina Dudnik
4b924fd16c
SMT atomics modifications:
...
don't allow enquing from other threads if servicing and atomic for a thread
2009-08-14 14:06:14 -05:00
Derek Hower
bcaf93d182
Automated merge with ssh://hg@m5sim.org/m5
2009-08-13 10:37:37 -05:00
Derek Hower
db40cb8f51
ruby: config bugfix
2009-08-13 10:37:09 -05:00
Tushar Krishna
35082a67b6
ruby/network data_msg_size bug fix with updated stats
2009-08-11 15:19:04 -07:00
Brad Beckmann
b89add1e3f
merged Tushar's bug fix with public repository changes
2009-08-11 12:22:41 -07:00
Derek Hower
1c3efb48ad
Automated merge with ssh://hg@m5sim.org/m5
2009-08-09 13:59:14 -05:00
Derek Hower
1a452d228b
protocol: added recycle actions to MOESI DMA events
2009-08-09 13:58:40 -05:00
Gabe Black
c5fae51774
X86: Implement the CMPXCHG8B/CMPXCHG16B instruction.
2009-08-09 01:01:41 -07:00
Gabe Black
bbf117b20e
X86: Don't clobber the original dividend when doing signed divide.
2009-08-09 01:01:18 -07:00
Gabe Black
3b07a5829d
X86: Decode byte sized singed divide as byte sized.
2009-08-09 01:00:47 -07:00
Gabe Black
6e97feb8a5
X86: Make not taken conditional moves leave the destination alone. Adjust CMOVcc.
...
The manuals from both AMD and Intel say that when writing to a 32 bit
destination in 64 bit mode, the upper 32 bits of the register are filled with
zeros. They also both say that the CMOV instructions leave their destination
alone when their condition fails. Unfortunately, it seems that CMOV will zero
extend its destination register whether or not it was supposed to actually do
a move on both platforms. This seems to be the only case where this happens,
but it would be hard to say for sure.
2009-08-08 17:23:19 -07:00
Tushar Krishna
b952eb19c1
bug fix for data_msg_size in network/Network.cc
2009-08-07 13:59:40 -07:00
Gabe Black
7c606e3835
X86: (Re)Implemented SHRD.
2009-08-07 10:13:33 -07:00
Gabe Black
4f5270f946
X86: Implement SHLD.
2009-08-07 10:13:24 -07:00
Gabe Black
3a55fc5cac
X86: Implement shift right/left double microops.
...
This is my best guess as far as what these should do. Other existing microops
use implicit registers, mul1s and mul1u for instance, so this should be ok.
The microop that loads the implicit DoubleBits register would fall into one
of the microop slots for moving to/from special registers.
2009-08-07 10:13:20 -07:00
Gabe Black
62a2e85c9a
X86: Make the qaud width bswap instruction handle the fact that 32 bit operations zero extend.
2009-08-07 10:12:58 -07:00
Gabe Black
0526f453aa
X86: Use the right field when using legacy prefixes to distinguish instructions.
2009-08-07 10:12:52 -07:00
Gabe Black
2daba26359
X86: Don't truncate the immediate parameter for the ENTER instruction.
2009-08-07 10:12:29 -07:00
Gabe Black
2e3446a410
X86: Adjust the various sizes used for the enter and leave instructions.
2009-08-06 21:44:42 -07:00
Gabe Black
c7b894a06f
X86: Make scas compare its operands in the right order.
2009-08-06 21:44:41 -07:00
Gabe Black
011c1865ad
X86: Fix a copy/paste error for cmovnp.
2009-08-06 21:44:40 -07:00
Derek Hower
cbc52ef6c5
fixed MOESI_CMP_directory bug
2009-08-06 03:41:28 -05:00
Derek Hower
f5e0c56da2
protocol: fixed MOESI_CMP_directory bug
2009-08-06 01:15:55 -05:00
Derek Hower
a1b5a6320f
ruby: better configuration assert message
2009-08-06 01:15:23 -05:00
Derek Hower
dff7c9eaa0
merge
2009-08-05 14:23:32 -05:00
Derek Hower
fbf7391bb0
ruby: configuration supports multiple runs in same session
...
These changes allow to run Ruby-gems multiple times from the same
ruby-lang script with different configurations
2009-08-05 14:20:32 -05:00
Derek Hower
1276df51e2
protocol: made MI_example dma mapping generic
2009-08-05 14:17:23 -05:00
Gabe Black
60d4a0f6d7
Merge with head.
2009-08-05 03:12:39 -07:00
Gabe Black
da2df2fc25
X86: Make conditional moves zero extend their 32 bit destinations always.
2009-08-05 03:07:55 -07:00
Gabe Black
b64d0bdeda
X86: Fix condition code setting for signed multiplies with negative results.
2009-08-05 03:07:01 -07:00
Gabe Black
2914a8eb16
X86: Make the check for negative operands for sign multiply more direct.
2009-08-05 03:06:37 -07:00
Gabe Black
e2e0ae576a
X86: Make sure immediate values are truncated properly.
...
Register values will be "picked" which will assure they don't have junk beyond
the part we're using. Immediate values don't go through a similar process, so
we should truncate them explicitly.
2009-08-05 03:06:01 -07:00
Gabe Black
ef3896d851
X86: Use the new forced folding mechanism for the SAHF and LAHF instructions.
2009-08-05 03:04:17 -07:00
Gabe Black
664d50b439
X86: Fix the indexing for ah in byte division instructions.
2009-08-05 03:03:41 -07:00
Gabe Black
abe8fb3844
X86: Fix the indexing for ah in byte multiply instructions.
2009-08-05 03:03:28 -07:00
Gabe Black
df1abc4412
X86: Let microops force folding an index into the high byte of a register.
2009-08-05 03:03:07 -07:00
Gabe Black
c4140d7d60
X86: Handle rotate left with carry instructions that go all the way around or more.
2009-08-05 03:02:28 -07:00
Gabe Black
3990445354
X86: Set the flags on rotate left with carry instructions.
2009-08-05 03:02:05 -07:00
Gabe Black
d265f7683e
X86: Handle rotate right with carry instructions that go all the way around or more.
2009-08-05 03:01:49 -07:00
Gabe Black
77dc6b33ee
X86: Fix the overflow bit for rotate right with carry.
2009-08-05 03:01:23 -07:00
Gabe Black
c8b1a4583e
X86: Fix the computation of the bottom part of rotate right with carry.
2009-08-05 03:01:07 -07:00
Gabe Black
bab4597fc5
X86: Fix the computation of the upper part of rotate right with carry.
2009-08-05 03:00:43 -07:00
Gabe Black
4e4adcaaa8
X86: Set the flags for rotate right with carry instructions.
2009-08-05 03:00:23 -07:00
Gabe Black
64d7948692
X86: Handle rotating right all the way around or more.
2009-08-05 03:00:03 -07:00
Gabe Black
88041f75c4
X86: Set the flags on a rotate right instruction.
2009-08-05 02:59:39 -07:00
Gabe Black
029d360db2
X86: Make shifts/rotations that write to 32 bits of a register zero extend.
2009-08-05 02:59:25 -07:00
Gabe Black
7f9a3af250
X86: Handle left rotations that go all the way around or more.
2009-08-05 02:58:54 -07:00
Gabe Black
99adfd9dae
X86: Actually set the flags on a rotate left instruction.
2009-08-05 02:58:20 -07:00
Gabe Black
c087b60af3
X86: Fix the sar carry flag.
2009-08-05 02:58:03 -07:00
Gabe Black
860f0f8350
X86: Fix sign extension when doing an arithmetic shift right by 0.
2009-08-05 02:57:47 -07:00
Gabe Black
a238959c34
X86: Fix the carry flag for shr.
2009-08-05 02:56:49 -07:00
Gabe Black
22a5f66820
X86: Fix the carry flag for shl.
2009-08-05 02:56:38 -07:00
Gabe Black
df2c862a07
X86: Fix how the parity flag is computed.
...
It's only for the lowest order byte, and I had the polarity wrong.
2009-08-05 02:56:12 -07:00
Derek Hower
7f012ef8da
ruby: made mapAddressToRange based off a bit count
2009-08-04 23:05:37 -05:00
Derek Hower
33b28fde7a
slicc: added MOESI_CMP_directory, DMA SequencerMsg, parameterized controllers
...
This changeset contains a lot of different changes that are too
mingled to separate. They are:
1. Added MOESI_CMP_directory
I made the changes necessary to bring back MOESI_CMP_directory,
including adding a DMA controller. I got rid of MOESI_CMP_directory_m
and made MOESI_CMP_directory use a memory controller. Added a new
configuration for two level protocols in general, and
MOESI_CMP_directory in particular.
2. DMA Sequencer uses a generic SequencerMsg
I will eventually make the cache Sequencer use this type as well. It
doesn't contain an offset field, just a physical address and a length.
MI_example has been updated to deal with this.
3. Parameterized Controllers
SLICC controllers can now take custom parameters to use for mapping,
latencies, etc. Currently, only int parameters are supported.
2009-08-04 12:52:52 -05:00
Derek Hower
c1e0bd1df4
slicc: generate html by default
2009-08-04 12:42:45 -05:00
Nathan Binkert
bd7af84d5e
slicc: better error messages when the python parser fails
2009-08-04 09:37:27 -07:00
Gabe Black
f5c21eaa1a
Merged with head.
2009-08-03 11:06:19 -07:00
Gabe Black
676dc6d292
X86: Fix segment override prefixes on instructions that use rbp/rsp and a displacement.
2009-08-03 11:01:40 -07:00
Derek Hower
ac15e42c17
Automated merge with ssh://hg@m5sim.org/m5
2009-08-03 11:39:08 -05:00
Gabe Black
38c2af17a5
X86: Set up the IDE device correctly, ie. with and using legacy ports.
2009-08-02 18:01:13 -07:00
Gabe Black
80aa771dbc
IDE: Configure the IDE control to reflect the initial value of the command register.
2009-08-02 18:01:09 -07:00
Gabe Black
aff57202b4
X86: Fix the high result of mul1s, and removed undefined shifts from the mult microops.
2009-08-02 08:39:29 -07:00
Steve Reinhardt
a13a706a20
Fix setting of INST_FETCH flag for O3 CPU.
...
It's still broken in inorder.
Also enhance DPRINTFs in cache and physical memory so we
can see more easily whether it's getting set or not.
2009-08-01 22:50:14 -07:00
Steve Reinhardt
1c28004654
Clean up some inconsistencies with Request flags.
2009-08-01 22:50:13 -07:00
Steve Reinhardt
c0755e6085
Rename internal Request fields to start with '_'.
...
The inconsistency was causing a subtle bug with some of the
constructors where the params had the same name as the fields.
This is also a first step to switching the accessors over to
our new "standard", e.g., getVaddr() -> vaddr().
2009-08-01 22:50:10 -07:00
Korey Sewell
aa75b9a7a7
merge mips fix and statetrace changes
2009-07-31 10:40:42 -04:00
Korey Sewell
60063cc700
mips: fix ll/sc pairs working incorrectly because of accidental clobber of LLFLAG
2009-07-31 09:34:29 -04:00
Nathan Binkert
3dd3de5feb
compile: fix accidental conversion of == into =
2009-07-30 17:42:57 -07:00
Gabe Black
4971331b4f
ARM: Mul and mla ignore the c and v flags, but we were setting them to 1.
2009-07-29 22:24:00 -07:00
Derek Hower
d9ff3021ba
ruby: fixed clearStats
2009-07-29 13:46:58 -05:00
Gabe Black
b066e717f4
ARM: Fix an instruction in the cmpxchg kernel provided routine.
...
The instruction was encoded as a load instead of the intended store.
2009-07-29 00:18:26 -07:00
Gabe Black
c2da5bae17
ARM: Get rid of a stray line in the set_tls handler.
2009-07-29 00:17:20 -07:00
Gabe Black
1e04b6281d
ARM: Make the ARM native tracer stop M5 if control diverges.
...
If the control flow of M5's executable and statetrace's target process get out
of sync even a little, there will be a LOT of output, very little of which
will be useful. There's also almost no hope for recovery. In those cases, we
might as well give up and not generate a huge, mostly worthless trace file.
2009-07-29 00:17:11 -07:00
Gabe Black
2871a13ab3
Simple CPU: Make the simple CPU handle the IntRegs trace flag.
2009-07-29 00:15:26 -07:00
Gabe Black
873112ea99
ARM: Make sure the target process doesn't run away from statetrace.
2009-07-29 00:14:43 -07:00
Ali Saidi
0a9eb59e6f
ARM: Ignore the "times" system call.
2009-07-29 00:09:46 -07:00
Ali Saidi
19a4fb0ff3
ARM: Fix an ioctl constant.
2009-07-29 00:09:44 -07:00
Derek Hower
469256d823
ruby: removed unused/incorrect profiler state
2009-07-27 21:43:43 -05:00
Ali Saidi
daf8718da9
ARM: Update some syscall constants and delete others that are Alpha only.
2009-07-27 00:54:55 -07:00
Gabe Black
d3f2992e39
ARM: Decode fstmx and fldmx instructions. We can ignore them for now.
2009-07-27 00:54:50 -07:00
Gabe Black
52b4a7c36f
ARM: Only send information that changed between statetrace and M5.
2009-07-27 00:54:30 -07:00
Gabe Black
90d3d3535b
imported patch nativetracestreamline.patch
2009-07-27 00:54:24 -07:00
Gabe Black
8ec235c7b1
ARM: Make native trace print out what instruction caused an error.
2009-07-27 00:54:09 -07:00
Gabe Black
c18d6cb1a7
ARM: Implement a basic version of the fmxr instruction.
2009-07-27 00:53:29 -07:00
Gabe Black
2828fa459d
ARM: Implement a basic version of the fmrx instruction.
2009-07-27 00:53:24 -07:00
Gabe Black
4079792f2b
ARM: Add in spots for the VFP control registers.
2009-07-27 00:53:10 -07:00
Gabe Black
b560acfe17
ARM: Fix the CLZ instruction.
2009-07-27 00:52:59 -07:00
Gabe Black
dc0df3f396
ARM: Initialize the CPSR so that we're in user mode.
2009-07-27 00:52:48 -07:00
Gabe Black
b8bf34be05
ARM: Set up the initial stack frame to match a recent Linux.
2009-07-27 00:52:31 -07:00
Gabe Black
ebc2897673
Elf: Add in some new aux vector type constants.
2009-07-27 00:52:19 -07:00
Gabe Black
a41e132007
ARM: Make native trace only print when registers are changing value.
...
When registers have incorrect values but aren't actively changing, it's likely
they're not being modified at all. The fact that they're still wrong isn't
very important.
2009-07-27 00:52:01 -07:00
Gabe Black
519ace4dfd
ARM: Add a native tracer.
...
--HG--
rename : src/arch/sparc/SparcNativeTrace.py => src/arch/arm/ArmNativeTrace.py
rename : src/arch/sparc/nativetrace.cc => src/arch/arm/nativetrace.cc
rename : src/arch/sparc/nativetrace.hh => src/arch/arm/nativetrace.hh
2009-07-27 00:51:35 -07:00
Ali Saidi
e7640227ca
ARM: Fix fstat/fstat64 structs to match EABI definitions.
2009-07-27 00:51:20 -07:00
Ali Saidi
99831ed938
ARM: Handle register indexed system calls.
2009-07-27 00:51:01 -07:00
Ali Saidi
0a18bc0d6c
ARM: Detect OABI binaries and complain that they're no-longer supported.
2009-07-27 00:50:55 -07:00
Gabe Black
ef4e8b04a6
SPARC: Fix a minor compile bug in native trace on gcc > 4.1.
2009-07-25 15:14:00 -07:00
Korey Sewell
44f80e7ca5
o3-smt: enforce numThreads parameter for SMT SE mode
2009-07-25 00:50:27 -04:00
Polina Dudnik
e7a3bda497
Fixed the licences plus minor fixes for compilation
2009-07-22 20:28:32 -05:00
Gabe Black
9ba2ed8532
MIPS: Small fix I forgot to qrefresh into my last change.
2009-07-22 01:57:55 -07:00
Gabe Black
7f0c07bf03
MIPS: Style/formatting sweep of the decoder itself.
2009-07-22 01:51:10 -07:00
Gabe Black
c874bfae3f
MIPS: Format the register index constants like the other ISAs.
...
Also a few more style fixes.
2009-07-21 23:38:26 -07:00
Derek Hower
c635d04642
Automated merge with ssh://m5sim.org//repo/m5
2009-07-21 21:27:54 -05:00
Derek Hower
7f34ee36ec
ruby: fixed sequencer RMW data bug
2009-07-21 19:42:09 -05:00
Derek Hower
80544cda8a
ruby: libruby_init now takes parsed Ruby-lang config text
...
libruby_init now expects to get a file that contains the output of
running a ruby-lang configuration, opposed to the ruby-lang
configuration itself.
2009-07-21 18:33:05 -05:00
Gabe Black
74584d79b6
MIPS: Get MIPS_FS to compile, more style fixes.
...
Some breakage was from my BitUnion change, some was much older.
2009-07-21 01:09:05 -07:00
Gabe Black
7548082d3b
MIPS: Many style fixes.
...
White space, commented out code, some other minor fixes.
2009-07-21 01:08:53 -07:00
Gabe Black
dc0a017ed0
isa_parser: Get rid of the now unused ControlBitfieldOperand.
2009-07-20 20:20:17 -07:00
Gabe Black
5161bc19d9
MIPS: Use BitUnions instead of bits() functions and constants.
...
Also fix style issues in regions around these changes.
2009-07-20 20:14:15 -07:00
Derek Hower
225de2eaff
merge
2009-07-20 09:41:28 -05:00
Derek Hower
e59d0e3e89
ruby: moved cache stats from Profiler to CacheMemory
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Caches are now responsible for their own statistic gathering. This
requires a direct callback from the protocol on misses, and so all
future protocols need to take this into account.
2009-07-20 09:40:43 -05:00
Gabe Black
3e8e813218
CPU: Separate out native trace into ISA (in)dependent code and SimObjects.
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--HG--
rename : src/cpu/nativetrace.cc => src/arch/sparc/nativetrace.cc
rename : src/cpu/nativetrace.hh => src/arch/sparc/nativetrace.hh
rename : src/cpu/NativeTrace.py => src/arch/x86/X86NativeTrace.py
2009-07-19 23:54:56 -07:00
Gabe Black
a3a795769a
Tracing: Add accessors so tracers can get at data in trace records.
2009-07-19 23:54:31 -07:00
Gabe Black
f0cb698a87
X86: Move a displaced comment back to where it goes.
2009-07-19 23:51:47 -07:00
Gabe Black
563654275f
X86: Add some misc registers for FP control state.
2009-07-19 23:51:41 -07:00
Derek Hower
308419b947
scons: removed RubyConfig from scons
2009-07-19 12:34:11 -05:00
Derek Hower
7cd2d8f687
ruby: removed all refs to old RubyConfig
2009-07-18 18:20:03 -05:00
Derek Hower
4bd7fe4c53
ruby: removed dead files
2009-07-18 18:18:37 -05:00
Derek Hower
f3d8d29342
ruby: removed dead files
2009-07-18 18:17:48 -05:00
Derek Hower
926ab6e6db
merge
2009-07-18 17:40:20 -05:00
Derek Hower
4b7ea4cb51
ruby: fixed dma sequencer bug
...
The DMASequencer was still using a parameter from the old RubyConfig,
causing an offset error when the requested data wasn't block aligned.
This changeset also includes a fix to MI_example for a similar bug.
2009-07-18 17:03:51 -05:00
Derek Hower
340845b139
ruby: better debug print for DataBlock
2009-07-18 16:58:33 -05:00
Derek Hower
7433029cd5
slicc: made coherence profilers per-controller
2009-07-18 16:54:45 -05:00
Gabe Black
d85cd08113
X86: Set up a named constant for the "fold bit" for int register indices.
2009-07-17 18:49:22 -07:00
Gabe Black
7b6587fc9c
X86: Tame the wilds of def operands.
2009-07-17 00:29:56 -07:00
Gabe Black
df378285f8
X86: Shift some register flattening work into the decoder.
2009-07-17 00:29:42 -07:00
Polina Dudnik
e557b4beb5
merge
2009-07-16 15:40:48 -05:00
Gabe Black
e9eccf7225
X86: Add range checks for miscreg indexing utility functions.
2009-07-16 09:30:14 -07:00
Gabe Black
ba6b8389ee
X86: Take limitted advantage of the compilers type checking for microop operands.
2009-07-16 09:29:29 -07:00
Gabe Black
80c834ccac
X86: Fix a number of places where the wrong form of a microop was used.
2009-07-16 09:27:56 -07:00
Gabe Black
3f9b0cc5ca
X86: Fix x87 stack register indexing.
2009-07-16 09:26:38 -07:00
Polina Dudnik
23a405f5d8
Tester update
2009-07-15 10:46:22 -05:00
Gabe Black
6262b31515
Merge with head.
2009-07-14 18:06:30 -07:00
Jack Whitham
fce4412d76
ARM: Fix the "open" flag constants.
2009-07-14 21:03:33 -07:00
Polina Dudnik
289cd00326
Changed the state machine to generate code such that multiple processors can make atomic requests at once
2009-07-13 18:39:32 -05:00
Polina Dudnik
5f551d9ca2
1. Got rid of unused functions in DirectoryMemory
...
2. Reintroduced RMW_Read and RMW_Write
3. Defined -2 in the Sequencer as well as made a note about mandatory queue
Did not address the issues in the slicc because remaking the atomics altogether to allow
multiple processors to issue atomic requests at once
2009-07-13 17:22:29 -05:00
Derek Hower
100da6b326
merge
2009-07-13 14:49:51 -05:00
Derek Hower
d51445490d
regression: updated memtest-ruby stats
...
This also includes a change to the default Ruby random seed, which was
previously set using the wall clock. It is now set to 1234 so that
the stat files don't change for the regression tester.
2009-07-13 14:45:15 -05:00
Polina Dudnik
9a675a0391
Changes to add tracing and replaying command-line options
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Trace is automatically ended upon a manual checkpoint
2009-07-13 12:50:10 -05:00
Polina Dudnik
b28058917c
Locked requests should actually be converted to ST rather than ATOMIC, because ATOMIC is for RMW.
2009-07-13 12:11:17 -05:00
Polina Dudnik
7a6bf67e47
Added atomics implementation which would work for MI_example
2009-07-13 12:06:23 -05:00
Polina Dudnik
c66af9f474
Minor fixes for compiling
2009-07-13 11:59:13 -05:00
Polina Dudnik
7606c71ea5
Replaced RMW with Locked. RMW will be used for the coherence-aided atomics other than LLSC
2009-07-13 11:37:56 -05:00
Polina Dudnik
faf823f947
Moved the lock check and clearing the lock into makeRequest
2009-07-13 11:34:38 -05:00
Polina Dudnik
86ce60e5cd
Forgot to replace one of the RubyRequest_RMW
2009-07-13 11:25:23 -05:00
Polina Dudnik
226981b2a6
Reintegrated Derek's functional implementation of atomics with a minor change: don't clear lock on failure
2009-07-13 11:13:29 -05:00
Gabe Black
60577eb4ca
ISAs: Get rid of the IControl operand type.
...
A separate operand type is not necessary to use two bitfields to generate the
index.
2009-07-10 01:21:04 -07:00
