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64 commits

Author SHA1 Message Date
Gabor Dozsa
a288c94387 arm, config: Add an example ARM big.LITTLE(tm) configuration script
An ARM big.LITTLE system consists of two cpu clusters: the big
CPUs are typically complex out-of-order cores and the little
CPUs are simpler in-order ones. The fs_bigLITTLE.py script
can run a full system simulation with various number of big
and little cores and cache hierarchy. The commit also includes
two example device tree files for booting Linux on the
bigLITTLE system.

Change-Id: I6396fb3b2d8f27049ccae49d8666d643b66c088b
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-07-21 17:19:16 +01:00
Andreas Sandberg
a46f77e695 arm: Update dts to work with the new HDLCD driver
The dts files in system/arm/dt currently assume that an (unreleased)
gem5-specific virtual encoder is used as a remote endpoint for the
HDLCD. This driver won't be released as a more general virtual encoder
is about to be posted on the Linux DRI devel list and this encoder has
now been merged with gem5's kernel tree. This changeset updates gem5's
dts files to use that encoder.

Change-Id: Ic1a1be728efd31603752fdfba005b6dbdea42e7e
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Rene De Jong <rene.dejong@arm.com>
2016-05-06 15:51:45 +01:00
Andreas Sandberg
826e0047b0 arm: Ship Linux device trees with gem5
Ship aarch32 and aarch64 device trees with gem5. We currently ship
device trees as a part of the gem5 Linux kernel repository. This makes
tracking hard since device trees are supposed to be platform dependent
rather than kernel dependent (Linux considers device trees to be a
stable kernel ABI). It also makes code sharing between aarch32 and
aarch64 impossible.

This changeset implements a set of device trees for the new
VExpress_GEM5_V1 platform. The platform is described in a shared file
that is separate from the memory/CPU description. Due to differences
in how secondary CPUs are initialized, aarch32 and aarch64 use
different base files describing CPU nodes and the machine's
compatibility property.
2016-02-23 11:21:07 +00:00
Steve Reinhardt
dc8018a5c3 style: remove trailing whitespace
Result of running 'hg m5style --skip-all --fix-white -a'.
2016-02-06 17:21:18 -08:00
Karthik Sangaiah
47326f5422 arm: Bootloader fix for v8 over 16 cores
Previous code used a smaller 4 bit mask to test the MPIDR-EL1 register.
The bitmask was extended to support greater than 16 cores.
2015-07-15 14:43:35 +01:00
ARM gem5 Developers
612f8f074f arm: Add support for ARMv8 (AArch64 & AArch32)
Note: AArch64 and AArch32 interworking is not supported. If you use an AArch64
kernel you are restricted to AArch64 user-mode binaries. This will be addressed
in a later patch.

Note: Virtualization is only supported in AArch32 mode. This will also be fixed
in a later patch.

Contributors:
Giacomo Gabrielli    (TrustZone, LPAE, system-level AArch64, AArch64 NEON, validation)
Thomas Grocutt       (AArch32 Virtualization, AArch64 FP, validation)
Mbou Eyole           (AArch64 NEON, validation)
Ali Saidi            (AArch64 Linux support, code integration, validation)
Edmund Grimley-Evans (AArch64 FP)
William Wang         (AArch64 Linux support)
Rene De Jong         (AArch64 Linux support, performance opt.)
Matt Horsnell        (AArch64 MP, validation)
Matt Evans           (device models, code integration, validation)
Chris Adeniyi-Jones  (AArch64 syscall-emulation)
Prakash Ramrakhyani  (validation)
Dam Sunwoo           (validation)
Chander Sudanthi     (validation)
Stephan Diestelhorst (validation)
Andreas Hansson      (code integration, performance opt.)
Eric Van Hensbergen  (performance opt.)
Gabe Black
2014-01-24 15:29:34 -06:00
Matt Evans
25c1933ffe ARM: Fix issue with with way MPIDR is read to include affinity levels.
The simple_bootloader checks for CPU0 in a manner incompatible with systems
actually using affinity levels -- just looking at MPIDR[7:0].  However, in
future we may wish to use real affinity levels and this method will be in danger
of matching several CPUs with affinity0 = 0.

Match affinity2 == affinity1 == affinity0 == 0 instead.
2012-09-07 14:20:53 -05:00
Ali Saidi
91b737ed48 ARM: Add support for Versatile Express extended memory map
Also clean up how we create boot loader memory a bit.
2012-03-01 17:26:31 -06:00
Prakash Ramrakhyani
f738005266 ARM: Boot loader changes that make it more flexible about load and I/O addrs 2011-05-04 20:38:27 -05:00
Nathan Binkert
dfd4f6ad93 Cleanup system directory to fit into modern M5 tree 2011-02-16 00:34:02 -06:00
Nathan Binkert
99e7e5e7ef copyright: update copyright on alpha system files 2011-02-16 00:34:01 -06:00
Geoffrey Blake
10253f80d1 Fix bug in MDT BITMAP to allow more than 2GB of memory.
Signed-off by Ali Saidi <saidi@eecs.umich.edu>
2007-10-19 16:44:02 -04:00
Ali Saidi
e527d4b9b9 fix Makefile for new source tree 2006-08-16 15:51:06 -04:00
Ali Saidi
4d1f6a8aca update our copyrights to the new format 2006-08-16 15:26:52 -04:00
Ali Saidi
5dc260b139 put panic instructions in palcode rather than looping on mchecks. 2006-04-26 15:15:45 -04:00
Ali Saidi
576196c13c Add m5op to the build process
use quiesceNs on other CPUs
panic rather than spin on an error

console/Makefile:
    Add m5op to the build process
console/dbmentry.S:
    use quiesceNs on other CPUs
console/printf.c:
    panic rather than spin on an error.
2006-02-28 18:57:34 -05:00
Ali Saidi
a50e054ced change from bootStrap* to using the cpuStack array for setting up
other processor stacks
2006-02-23 15:00:04 -05:00
Nathan Binkert
c3d47c1de8 Fix console to work on all systems.
console/console.c:
    CONS_REM (remote console) doesn't work on Tru64.  Use CONS_DZ which
    seems to work alright everywhere.
2005-08-18 13:34:03 -04:00
Benjamin Nash
be14bc0a21 Merge zed.eecs.umich.edu:/.automount/fox/y/mserrano/alpha-system
into  zed.eecs.umich.edu:/z/benash/bk/alpha-system

console/console.c:
    Clean up code.
h/rpb.h:
    Update CTB struct.
2005-07-28 13:45:36 -04:00
Miguel Serrano
fa1512e206 changes
console/console.c:
    fixed bootstrap stack
h/rpb.h:
    ctb_term_type instead of ctb_baud
2005-07-28 12:26:05 -04:00
Benjamin Nash
8bd19cf3ee Merge m5read@m5.eecs.umich.edu:/bk/alpha-system
into  zed.eecs.umich.edu:/z/benash/bk/alpha-system
2005-07-26 12:46:28 -04:00
Benjamin Nash
5da70b93db New console terminal block structure, fix kernel stack pointer.
console/console.c:
    Use virtual addresses for kernel stack pointer, use new ctb structure.
h/rpb.h:
    Update console terminal block structure.
2005-07-26 12:42:02 -04:00
Nathan Binkert
e61899cbbf Add missing TSUNAMI ipi code. 2005-06-29 22:15:32 -04:00
Nathan Binkert
fce2978d41 console code cleanup
console/console.c:
    the go parameter to unixBoot is never used, so get rid of it.
    just panic if we return from unixBoot since it's never supposed
    to happen.
    remove the MAX_CPUS parameter and the bootStrapImpure variable
    and just allocate memory as needed.  (Can in theory support many
    more CPUs.)
2005-06-28 23:22:28 -04:00
Nathan Binkert
941db36a67 pass the location of the m5 backdoor via the m5AlphaAccess variable
only compile one console

console/Makefile:
    Now that the location of the m5 backdoor is passed into the
    console via the m5AlphaAccess variable, we only need to
    compile one console, and don't need to define TLASER or TSUNAMI
console/console.c:
    Don't hardcode the location of the AlphaAccess structure, but
    rely on m5 to pass in the correct value.
    Setup "volatile struct AlphaAccess *m5AlphaAccess" for use and
    get rid of the hardcoded usage.
2005-06-28 01:13:20 -04:00
Nathan Binkert
0b01f18603 Add tlaser.h, required by platform.S 2005-06-27 17:58:44 -04:00
Nathan Binkert
55e3b9f743 Major system code cleanup and formatting
remove unused code

console/Makefile:
    cleanup Makefile.  Remove unneeded -D options
console/console.c:
    Major cleanup and formatting
    remove unused #ifdef code
    remove unused #includes
    rename xxm -> m5
    rename simos -> m5
console/dbmentry.S:
console/paljtokern.S:
console/paljtoslave.S:
console/printf.c:
    Major cleanup and formatting
    remove unused #ifdef code
    remove unused #includes
    rename __start -> _start to get rid of warning.
h/cserve.h:
h/dc21164FromGasSources.h:
h/ev5_alpha_defs.h:
h/ev5_defs.h:
h/ev5_osfalpha_defs.h:
h/ev5_paldef.h:
h/fromHudsonMacros.h:
h/fromHudsonOsf.h:
h/rpb.h:
    Major cleanup and formatting
h/ev5_impure.h:
    Major cleanup and formatting
    remove unused #ifdef code
palcode/Makefile:
    cleanup Makefile
    remove unused -D options
    unify platform_tlaser.S and platform_tsunami.S into platform.S and
    generate multiple .o files using various #defines
    unify osfpal.S osfpal_cache_copy.S and osfpal_cache_copy_unaligned.S into
    osfpal.S and generate multiple .o files using various #defines
palcode/osfpal.S:
    Major cleanup and formatting
    remove unused #defines
    remove unused #if code
    merge copy code into this file.
palcode/platform.S:
    Major cleanup and formatting
    remove unused #defines
    remove unused #if code
    merge platform code into this file.
2005-06-27 17:25:54 -04:00
Ali Saidi
8cefbc93cf HP copyrights
console/Makefile:
    Added copyright
    added CROSS_COMPILE variable
    removed install target
console/console.c:
console/dbmentry.S:
console/paljtokern.S:
console/paljtoslave.S:
console/printf.c:
h/cia.h:
h/cserve.h:
h/dc21164FromGasSources.h:
h/eb164.h:
h/ev5_alpha_defs.h:
h/ev5_defs.h:
h/ev5_impure.h:
h/ev5_osfalpha_defs.h:
h/ev5_paldef.h:
h/fromHudsonMacros.h:
h/fromHudsonOsf.h:
h/lib.h:
h/platform.h:
h/regdefs.h:
h/rpb.h:
palcode/Makefile:
palcode/osfpal.S:
palcode/osfpal_cache_copy.S:
palcode/osfpal_cache_copy_unaligned.S:
palcode/platform_m5.S:
palcode/platform_tlaser.S:
    added hp and our copyright
2005-06-04 18:59:06 -04:00
Ali Saidi
d60a6c86c5 removed tlaserreg.h, rewrote necessary parts
deleted simos.h
deleted tlaserreg.h

palcode/platform_m5.S:
palcode/platform_tlaser.S:
    removed tlaserreg.h, rewrote necessary parts
2005-01-30 16:50:55 -05:00
Ali Saidi
5821f37cb6 Add support for tsunami with 64 processors and fix some console bugs
I steped on while doing it

console/console.c:
    Allocate more HWRPB pages so we have room for 64 percpu_rpbs
    Fix writing of Console Relocation Block virtual addresses so that
    if they are outside of the first page, which they will be with more
    than 8 processors, the correct adress is written
palcode/Makefile:
    Update makefile for tsunami with 64 processors
palcode/platform_m5.S:
    Add support for tsunami with 64 processors
2004-12-06 11:44:22 -05:00
Ali Saidi
99a522fb8b do a better job of always locking printf. We used to only lock on
secondary cpus, this also locks on the primary cpu.
Now the initial print out doesn't get garbled with more than 1 cpu.
2004-11-23 04:04:13 -05:00
Ali Saidi
66b80038ed Makefile cleanup, no seperate middle preprocessing steps anymore 2004-11-23 03:40:32 -05:00
Ali Saidi
8d148125f2 cleanup makefile and fix platform bug introduced in last commit
palcode/Makefile:
    Cleanup make file, no more ugly preprocessing steps
palcode/platform_m5.S:
    fix a mistake with m5 platform cleanup from before
2004-11-23 03:20:27 -05:00
Ali Saidi
8cfbcbdb9c update platform code to use PALTemp Whami register to get cpu id
instead of reading register from tsunami chipset, saving an uncached
read
2004-11-23 02:01:30 -05:00
Ali Saidi
8b1db1cf98 Fix from Adam: Strip the kseg off the physical address in the RPB structure. 2004-10-06 11:27:46 -04:00
Ali Saidi
1940fcdd29 changes to make smp work in linux
console/console.c:
    Remove Printed SimOS references and replace with M5
    Rework the SMP stuff, so we don't trash any stacks, or what we
    thought were stacks, but are actually other ppls memory.
console/dbmentry.s:
    add a carefully crafted piece of assembly that doesn't use the stack,
    so we don't clobber anthing in the time between when we are spinning
    and when the OS tells us to go.
palcode/platform_m5.s:
    add/fix code for IPI, multiprocessor interrupts (DIR), and initial
    bootstrapping of the cpu
2004-09-01 00:23:00 -04:00
Ali Saidi
29c5218e4f changed to generate tlaser and tsunami console code at different
addresses so the uncachable bit is set for tsunami.

console/Makefile:
console/console.c:
    changed to generate tlaser and tsunami console code at different addresses
2004-08-01 00:50:26 -04:00
Ali Saidi
ae3ba61665 changed the code not to use r11 (specifically) and r8,r9 for good
measure. The rest of the registers I used are touched by the tlaser
platform code so I would guess their are fair game.
Random memory troubles hopefully over.
2004-07-01 01:28:45 -04:00
Ali Saidi
ad63f2e67e Copy variables over one at a time rather than copying 4 bytes at a
time. Easiest way to deal with the endian issue.
2004-06-23 15:12:15 -04:00
Ali Saidi
ea03f8e35d Rather than using a loop to calculate the interrupt vector, use the ctlz instruction. 2004-06-06 19:33:50 -04:00
Ali Saidi
120825c1e2 Added ALPHA_ACCESS_BASE to get rid of machine_defs.h 2004-05-18 20:11:58 -04:00
Ali Saidi
0d184b3bc9 erik and I made the the same modification... merged. 2004-05-18 16:32:59 -04:00
Ali Saidi
496c48d9b2 Major clean up of alpha system files.
console/Makefile:
palcode/Makefile:
    moved header files to /h so updated make file for that
console/dbmentry.s:
console/paljtokern.s:
console/paljtoslave.s:
    upadated to use osf file that the palcode uses, one less file
2004-05-18 16:26:16 -04:00
Erik Hallnor
30d0b3a354 Setup makefile to compile the 3 flavors of palcode for each platform. 2004-05-17 21:09:20 -04:00
Ali Saidi
c5d815dc2d Deleted a whole bunch of files that we didn't nede in the header
directory

console/dbmentry.s:
console/printf.c:
    removed unneeded includes
2004-05-17 19:23:48 -04:00
Ali Saidi
8810fb73c6 Merge zeep.eecs.umich.edu:/m5/Bitkeeper/alpha-system
into zeep.eecs.umich.edu:/.automount/zizzer/y/saidi/work/alpha-system
2004-05-17 17:49:47 -04:00
Ali Saidi
31ac4ce140 console code now builds on zizzer
console/Makefile:
    Updated to build on linux and removed
    lots of crud that compiled, disassembled, and then reassembled
console/dbmentry.s:
    the assembler didn't like they comments, so I removed them
console/printf.c:
    Gcc was very unhappy, so I fixed this line
h/lib.h:
    time_t is defined in a std header, and this was causing some problems
2004-05-17 17:49:19 -04:00
Erik Hallnor
f33cf070c7 Add copy implementations to palcode.
palcode/osfpal.s:
    Add copypal loop copy implementation.
2004-05-17 17:18:32 -04:00
Ali Saidi
b582b5058e palcode updated to deal with interrupts correctly
deleted and then upon realizing we needed them undeleted a bunch of
header files in the palcode dir

console/Makefile:
    fixed so it will work with tru64... still haven't got the console to build under linux
palcode/platform_m5.s:
    fixed code to "fake" srm console interrupt handling correctly
    include serial interrupts
2004-05-17 02:04:19 -04:00
Ali Saidi
ce9b1a1e37 added some comments to palcode and zeroed system type in HWPRB (m5 will fill in)
console/console.c:
    0 the system type, let m5 overwrite
palcode/platform_m5.s:
    add some comments and make the timer interrupt actually care what CPU it happened on
2004-05-11 17:31:28 -04:00