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Major system code cleanup and formatting

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remove unused code

console/Makefile:
    cleanup Makefile.  Remove unneeded -D options
console/console.c:
    Major cleanup and formatting
    remove unused #ifdef code
    remove unused #includes
    rename xxm -> m5
    rename simos -> m5
console/dbmentry.S:
console/paljtokern.S:
console/paljtoslave.S:
console/printf.c:
    Major cleanup and formatting
    remove unused #ifdef code
    remove unused #includes
    rename __start -> _start to get rid of warning.
h/cserve.h:
h/dc21164FromGasSources.h:
h/ev5_alpha_defs.h:
h/ev5_defs.h:
h/ev5_osfalpha_defs.h:
h/ev5_paldef.h:
h/fromHudsonMacros.h:
h/fromHudsonOsf.h:
h/rpb.h:
    Major cleanup and formatting
h/ev5_impure.h:
    Major cleanup and formatting
    remove unused #ifdef code
palcode/Makefile:
    cleanup Makefile
    remove unused -D options
    unify platform_tlaser.S and platform_tsunami.S into platform.S and
    generate multiple .o files using various #defines
    unify osfpal.S osfpal_cache_copy.S and osfpal_cache_copy_unaligned.S into
    osfpal.S and generate multiple .o files using various #defines
palcode/osfpal.S:
    Major cleanup and formatting
    remove unused #defines
    remove unused #if code
    merge copy code into this file.
palcode/platform.S:
    Major cleanup and formatting
    remove unused #defines
    remove unused #if code
    merge platform code into this file.
This commit is contained in:
Nathan Binkert 2005-06-27 17:25:54 -04:00
parent 8cefbc93cf
commit 55e3b9f743
27 changed files with 3016 additions and 20160 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

65
system/alpha/console/Makefile
View file

@ -1,44 +1,41 @@
#Copyright (c) 2005
#The Regents of The University of Michigan
#All Rights Reserved
# Copyright (c) 2005
# The Regents of The University of Michigan
# All Rights Reserved
#
#This code is part of the M5 simulator, developed by Nathan Binkert,
#Erik Hallnor, Steve Raasch, and Steve Reinhardt, with contributions
#from Ron Dreslinski, Dave Greene, Lisa Hsu, Ali Saidi, and Andrew
#Schultz.
# This code is part of the M5 simulator, developed by Nathan Binkert,
# Erik Hallnor, Steve Raasch, and Steve Reinhardt, with contributions
# from Ron Dreslinski, Dave Greene, Lisa Hsu, Ali Saidi, and Andrew
# Schultz.
#
#Permission is granted to use, copy, create derivative works and
#redistribute this software and such derivative works for any purpose,
#so long as the copyright notice above, this grant of permission, and
#the disclaimer below appear in all copies made; and so long as the
#name of The University of Michigan is not used in any advertising or
#publicity pertaining to the use or distribution of this software
#without specific, written prior authorization.
# Permission is granted to use, copy, create derivative works and
# redistribute this software and such derivative works for any purpose,
# so long as the copyright notice above, this grant of permission, and
# the disclaimer below appear in all copies made; and so long as the
# name of The University of Michigan is not used in any advertising or
# publicity pertaining to the use or distribution of this software
# without specific, written prior authorization.
#
#THIS SOFTWARE IS PROVIDED AS IS, WITHOUT REPRESENTATION FROM THE
#UNIVERSITY OF MICHIGAN AS TO ITS FITNESS FOR ANY PURPOSE, AND WITHOUT
#WARRANTY BY THE UNIVERSITY OF MICHIGAN OF ANY KIND, EITHER EXPRESS OR
#IMPLIED, INCLUDING WITHOUT LIMITATION THE IMPLIED WARRANTIES OF
#MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE REGENTS OF
#THE UNIVERSITY OF MICHIGAN SHALL NOT BE LIABLE FOR ANY DAMAGES,
#INCLUDING DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL
#DAMAGES, WITH RESPECT TO ANY CLAIM ARISING OUT OF OR IN CONNECTION
#WITH THE USE OF THE SOFTWARE, EVEN IF IT HAS BEEN OR IS HEREAFTER
#ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
DBMENTRY = fffffc0000010000
CFLAGS=-I . -I ../h -I$(M5)/dev -nostdinc++ -Wa,-m21164
ARCHNAME=$(shell uname -m)
# THIS SOFTWARE IS PROVIDED AS IS, WITHOUT REPRESENTATION FROM THE
# UNIVERSITY OF MICHIGAN AS TO ITS FITNESS FOR ANY PURPOSE, AND WITHOUT
# WARRANTY BY THE UNIVERSITY OF MICHIGAN OF ANY KIND, EITHER EXPRESS OR
# IMPLIED, INCLUDING WITHOUT LIMITATION THE IMPLIED WARRANTIES OF
# MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE REGENTS OF
# THE UNIVERSITY OF MICHIGAN SHALL NOT BE LIABLE FOR ANY DAMAGES,
# INCLUDING DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL
# DAMAGES, WITH RESPECT TO ANY CLAIM ARISING OUT OF OR IN CONNECTION
# WITH THE USE OF THE SOFTWARE, EVEN IF IT HAS BEEN OR IS HEREAFTER
# ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
### If we are not compiling on an alpha, we must use cross tools ###
ifneq ($(ARCHNAME), alpha)
ifneq ($(shell uname -m), alpha)
CROSS_COMPILE?=alpha-unknown-linux-gnu-
endif
CC=$(CROSS_COMPILE)gcc
AS=$(CROSS_COMPILE)as
LD=$(CROSS_COMPILE)ld
DBMENTRY= fffffc0000010000
CFLAGS=-I . -I ../h -I$(M5)/dev -fno-builtin -Wa,-m21164
OBJS=dbmentry.o printf.o paljtokern.o paljtoslave.o
TLOBJS+=$(OBJS) console_tl.o
TSOBJS+=$(OBJS) console_ts.o
@ -54,19 +51,19 @@ all: console_tl console_ts
$(CC) $(CFLAGS) -nostdinc -o $@ -c $<
console_ts.o: console.c
$(CC) -g3 $(CFLAGS) -D _TIME_T -D TSUNAMI -o $@ -c $<
$(CC) -g3 $(CFLAGS) -D TSUNAMI -o $@ -c $<
console_tl.o: console.c
$(CC) -g3 $(CFLAGS) -D _TIME_T -D TLASER -o $@ -c $<
$(CC) -g3 $(CFLAGS) -D TLASER -o $@ -c $<
printf.o: printf.c
$(CC) -g3 $(CFLAGS) -o $@ -c $<
console_ts: $(TSOBJS)
$(LD) -o console_ts -N -Ttext $(DBMENTRY) -non_shared $(TSOBJS) -lc
$(LD) -o console_ts -N -Ttext $(DBMENTRY) -non_shared $(TSOBJS) -lc
console_tl: $(TLOBJS)
$(LD) -o console_tl -N -Ttext $(DBMENTRY) -non_shared $(TLOBJS) -lc
$(LD) -o console_tl -N -Ttext $(DBMENTRY) -non_shared $(TLOBJS) -lc
clean:
rm -f *.o console_t?

1813
system/alpha/console/console.c
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File diff suppressed because it is too large Load diff

181
system/alpha/console/dbmentry.S
View file

@ -1,139 +1,73 @@
/*
Copyright (c) 2003, 2004
The Regents of The University of Michigan
All Rights Reserved
This code is part of the M5 simulator, developed by Nathan Binkert,
Erik Hallnor, Steve Raasch, and Steve Reinhardt, with contributions
from Ron Dreslinski, Dave Greene, Lisa Hsu, Ali Saidi, and Andrew
Schultz.
Permission is granted to use, copy, create derivative works and
redistribute this software and such derivative works for any purpose,
so long as the copyright notice above, this grant of permission, and
the disclaimer below appear in all copies made; and so long as the
name of The University of Michigan is not used in any advertising or
publicity pertaining to the use or distribution of this software
without specific, written prior authorization.
THIS SOFTWARE IS PROVIDED AS IS, WITHOUT REPRESENTATION FROM THE
UNIVERSITY OF MICHIGAN AS TO ITS FITNESS FOR ANY PURPOSE, AND WITHOUT
WARRANTY BY THE UNIVERSITY OF MICHIGAN OF ANY KIND, EITHER EXPRESS OR
IMPLIED, INCLUDING WITHOUT LIMITATION THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE REGENTS OF
THE UNIVERSITY OF MICHIGAN SHALL NOT BE LIABLE FOR ANY DAMAGES,
INCLUDING DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL
DAMAGES, WITH RESPECT TO ANY CLAIM ARISING OUT OF OR IN CONNECTION
WITH THE USE OF THE SOFTWARE, EVEN IF IT HAS BEEN OR IS HEREAFTER
ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
*/
* Copyright (c) 2003, 2004
* The Regents of The University of Michigan
* All Rights Reserved
*
* This code is part of the M5 simulator, developed by Nathan Binkert,
* Erik Hallnor, Steve Raasch, and Steve Reinhardt, with contributions
* from Ron Dreslinski, Dave Greene, Lisa Hsu, Ali Saidi, and Andrew
* Schultz.
*
* Permission is granted to use, copy, create derivative works and
* redistribute this software and such derivative works for any purpose,
* so long as the copyright notice above, this grant of permission, and
* the disclaimer below appear in all copies made; and so long as the
* name of The University of Michigan is not used in any advertising or
* publicity pertaining to the use or distribution of this software
* without specific, written prior authorization.
*
* THIS SOFTWARE IS PROVIDED AS IS, WITHOUT REPRESENTATION FROM THE
* UNIVERSITY OF MICHIGAN AS TO ITS FITNESS FOR ANY PURPOSE, AND WITHOUT
* WARRANTY BY THE UNIVERSITY OF MICHIGAN OF ANY KIND, EITHER EXPRESS OR
* IMPLIED, INCLUDING WITHOUT LIMITATION THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE REGENTS OF
* THE UNIVERSITY OF MICHIGAN SHALL NOT BE LIABLE FOR ANY DAMAGES,
* INCLUDING DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL
* DAMAGES, WITH RESPECT TO ANY CLAIM ARISING OUT OF OR IN CONNECTION
* WITH THE USE OF THE SOFTWARE, EVEN IF IT HAS BEEN OR IS HEREAFTER
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
*/
/*
Copyright 1993 Hewlett-Packard Development Company, L.P.
* Copyright 1993 Hewlett-Packard Development Company, L.P.
*
* Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use, copy,
* modify, merge, publish, distribute, sublicense, and/or sell copies
* of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
Permission is hereby granted, free of charge, to any person obtaining a copy of
this software and associated documentation files (the "Software"), to deal in
the Software without restriction, including without limitation the rights to
use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
of the Software, and to permit persons to whom the Software is furnished to do
so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in all
copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
*/
/* taken from ebfw/rom/dbmentry.s */
#define EB164
/*#ifndef LINT
.data
.asciiz "$Id: dbmentry.s,v 1.1.1.1 1997/10/30 23:27:12 verghese Exp $"
.text
#endif
*/
/*
* Debug Monitor Entry code
*/
#ifndef MAKEDEPEND
#include "ev5_impure.h"
#include "cserve.h"
#include "fromHudsonOsf.h"
#endif
//#include "paldefs.h"
#include "regdefs.h"
#include "eb164.h"
//#include "ledcodes.h"
.text
/* return address and padding to octaword align */
#define STARTFRM 16
.globl __start
.ent __start, 0
__start:
.globl _start
.ent _start, 0
_start:
_entry:
br t0, 2f # get the current PC
2: ldgp gp, 0(t0) # init gp
#ifdef original_xxm
lda a2, CSERVE_K_RD_IMPURE
call_pal PAL_CSERVE_ENTRY
lda v0, CNS_Q_BASE(v0)
# Add KSEG offset to the impure area
subq zero, 1, t0
sll t0, 42, t0
addq t0, v0, v0
lda t0, CNS_Q_SIGNATURE(v0)
bic t0, 0x07, t0 # Clear bottom 3 bits to avoid
# allignment errors if the
# impure area is total rubbish
ldq t0, 0x00(t0)
srl t0, 16, t0 # Shift signature into bottom 16 bits.
lda t6, 0xDECB(zero) # Load the expected valid signature.
zap t6, 0xFC, t6 # Clear the upper bits.
cmpeq t0, t6, t0 # Is this a valid signature?
beq t0, 1f # Not valid, don't trust input params.
/*
* Init the stack at the first 8K boundary
* below the top of memory.
*/
lda t0, CNS_Q_MEM_SIZE(v0)
ldq t0, 0x00(t0) # Load memory size.
subq t0, 1, t0 # Last address in memory
srl t0, 13, t0 # Align to first 8KB boundary
sll t0, 13, sp # below the top of memory.
br zero, 2f
/*
* If memory size was not passed in via the
* PALcode impure data use the system specific
* MINIMUM_SYSTEM_MEMORY definition.
*/
1:
lda sp, (MINIMUM_SYSTEM_MEMORY&0xffff)(zero)
ldah sp, ((MINIMUM_SYSTEM_MEMORY+0x8000)>>16)(sp)
lda t0, (8*1024)(zero) # Allow for 8KB guard page.
subq sp, t0, sp
2:
#endif /* original_xxm */
/*
* SimOS. Stack pointer is start of a valid phys or KSEG page
*/
@ -146,13 +80,6 @@ slave: lda v0,(8*1024)(sp) /* end of page */
sll t0, 42, t0
bis t0, v0, sp
#ifdef original_xxm
# Add KSEG offset to the stack pointer
subq zero, 1, t0
sll t0, 42, t0
addq t0, sp, sp
#endif
lda sp, -STARTFRM(sp) # Create a stack frame
stq ra, 0(sp) # Place return address on the stack
@ -186,7 +113,7 @@ master:
ldgp gp, 0(ra)
bsr zero, _exit
.end __start
.end _start

215
system/alpha/console/paljtokern.S
View file

@ -1,97 +1,94 @@
/*
Copyright (c) 2003, 2004
The Regents of The University of Michigan
All Rights Reserved
This code is part of the M5 simulator, developed by Nathan Binkert,
Erik Hallnor, Steve Raasch, and Steve Reinhardt, with contributions
from Ron Dreslinski, Dave Greene, Lisa Hsu, Ali Saidi, and Andrew
Schultz.
Permission is granted to use, copy, create derivative works and
redistribute this software and such derivative works for any purpose,
so long as the copyright notice above, this grant of permission, and
the disclaimer below appear in all copies made; and so long as the
name of The University of Michigan is not used in any advertising or
publicity pertaining to the use or distribution of this software
without specific, written prior authorization.
THIS SOFTWARE IS PROVIDED AS IS, WITHOUT REPRESENTATION FROM THE
UNIVERSITY OF MICHIGAN AS TO ITS FITNESS FOR ANY PURPOSE, AND WITHOUT
WARRANTY BY THE UNIVERSITY OF MICHIGAN OF ANY KIND, EITHER EXPRESS OR
IMPLIED, INCLUDING WITHOUT LIMITATION THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE REGENTS OF
THE UNIVERSITY OF MICHIGAN SHALL NOT BE LIABLE FOR ANY DAMAGES,
INCLUDING DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL
DAMAGES, WITH RESPECT TO ANY CLAIM ARISING OUT OF OR IN CONNECTION
WITH THE USE OF THE SOFTWARE, EVEN IF IT HAS BEEN OR IS HEREAFTER
ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
*/
/*
Copyright 1993 Hewlett-Packard Development Company, L.P.
Permission is hereby granted, free of charge, to any person obtaining a copy of
this software and associated documentation files (the "Software"), to deal in
the Software without restriction, including without limitation the rights to
use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
of the Software, and to permit persons to whom the Software is furnished to do
so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in all
copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
*/
#include "dc21164FromGasSources.h" // DECchip 21164 specific definitions
#include "ev5_defs.h"
#include "fromHudsonOsf.h" // OSF/1 specific definitions
#include "fromHudsonMacros.h" // Global macro definitions
#include "ev5_impure.h" // Scratch & logout area data structures
#include "platform.h" // Platform specific definitions
.global palJToKern
.text 3
palJToKern:
/* Jump to kernel
args:
Kernel address - a0
PCBB - a1
First free PFN - a3?
Enable kseg addressing in ICSR
Enable kseg addressing in MCSR
Set VTBR -- Set to 1GB as per SRM, or maybe 8GB??
Set PCBB -- pass pointer in arg
Set PTBR -- get it out of PCB
Set KSP -- get it out of PCB
Jump to kernel address
Kernel args-
s0 first free PFN
s1 ptbr
s2 argc 0
s3 argv NULL
s5 osf_param (sysconfigtab) NULL
* Copyright (c) 2003, 2004
* The Regents of The University of Michigan
* All Rights Reserved
*
* This code is part of the M5 simulator, developed by Nathan Binkert,
* Erik Hallnor, Steve Raasch, and Steve Reinhardt, with contributions
* from Ron Dreslinski, Dave Greene, Lisa Hsu, Ali Saidi, and Andrew
* Schultz.
*
* Permission is granted to use, copy, create derivative works and
* redistribute this software and such derivative works for any purpose,
* so long as the copyright notice above, this grant of permission, and
* the disclaimer below appear in all copies made; and so long as the
* name of The University of Michigan is not used in any advertising or
* publicity pertaining to the use or distribution of this software
* without specific, written prior authorization.
*
* THIS SOFTWARE IS PROVIDED AS IS, WITHOUT REPRESENTATION FROM THE
* UNIVERSITY OF MICHIGAN AS TO ITS FITNESS FOR ANY PURPOSE, AND WITHOUT
* WARRANTY BY THE UNIVERSITY OF MICHIGAN OF ANY KIND, EITHER EXPRESS OR
* IMPLIED, INCLUDING WITHOUT LIMITATION THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE REGENTS OF
* THE UNIVERSITY OF MICHIGAN SHALL NOT BE LIABLE FOR ANY DAMAGES,
* INCLUDING DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL
* DAMAGES, WITH RESPECT TO ANY CLAIM ARISING OUT OF OR IN CONNECTION
* WITH THE USE OF THE SOFTWARE, EVEN IF IT HAS BEEN OR IS HEREAFTER
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
*/
/*
* Copyright 1993 Hewlett-Packard Development Company, L.P.
*
* Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use, copy,
* modify, merge, publish, distribute, sublicense, and/or sell copies
* of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
#include "dc21164FromGasSources.h" // DECchip 21164 specific definitions
#include "ev5_defs.h"
#include "fromHudsonOsf.h" // OSF/1 specific definitions
#include "fromHudsonMacros.h" // Global macro definitions
/* Jump to kernel
* args:
* Kernel address - a0
* PCBB - a1
* First free PFN - a3?
*
* Enable kseg addressing in ICSR
* Enable kseg addressing in MCSR
* Set VTBR -- Set to 1GB as per SRM, or maybe 8GB??
* Set PCBB -- pass pointer in arg
* Set PTBR -- get it out of PCB
* Set KSP -- get it out of PCB
*
* Jump to kernel address
*
* Kernel args-
* s0 first free PFN
* s1 ptbr
* s2 argc 0
* s3 argv NULL
* s5 osf_param (sysconfigtab) NULL
*/
.global palJToKern
.text 3
palJToKern:
ALIGN_BRANCH
ldq_p a0, 0(zero)
ldq_p a1, 8(zero)
ldq_p a3, 16(zero)
#ifdef undef
LDLI(t0,0x200000000) // 8GB, like the Mikasa
LDLI(t0,0x40000000) // 1GB, like the SRM
STALL // don't dual issue the load with mtpr -pb
#endif
/* Point the Vptbr at 8GB */
lda t0, 0x1(zero)
sll t0, 33, t0
@ -103,7 +100,7 @@ args:
/* Turn on superpage mapping in the mbox and icsr */
lda t0, (2<<MCSR_V_SP)(zero) // Get a '10' (binary) in MCSR<SP>
STALL // don't dual issue the load with mtpr -pb
mtpr t0, mcsr // Set the super page mode enable bit
mtpr t0, mcsr // Set the super page mode enable bit
STALL // don't dual issue the load with mtpr -pb
lda t0, 0(zero)
@ -112,45 +109,45 @@ args:
LDLI (t1,0x20000000)
STALL // don't dual issue the load with mtpr -pb
mfpr t0, icsr // Enable superpage mapping
mfpr t0, icsr // Enable superpage mapping
STALL // don't dual issue the load with mtpr -pb
bis t0, t1, t0
mtpr t0, icsr
STALL // Required stall to update chip ...
STALL // Required stall to update chip ...
STALL
STALL
STALL
STALL
ldq_p s0, PCB_Q_PTBR(a1)
sll s0, VA_S_OFF, s0 // Shift PTBR into position
sll s0, VA_S_OFF, s0 // Shift PTBR into position
STALL // don't dual issue the load with mtpr -pb
mtpr s0, ptPtbr // PHYSICAL MBOX INST -> MT PT20 IN 0,1
mtpr s0, ptPtbr // PHYSICAL MBOX INST -> MT PT20 IN 0,1
STALL // don't dual issue the load with mtpr -pb
ldq_p sp, PCB_Q_KSP(a1)
mtpr a0, excAddr // Load the dispatch address.
mtpr a0, excAddr // Load the dispatch address.
STALL // don't dual issue the load with mtpr -pb
bis a3, zero, a0 // first free PFN
ldq_p a1, PCB_Q_PTBR(a1) // ptbr
ldq_p a2, 24(zero) // argc
ldq_p a3, 32(zero) // argv
ldq_p a4, 40(zero) // environ
lda a5, 0(zero) // osf_param
bis a3, zero, a0 // first free PFN
ldq_p a1, PCB_Q_PTBR(a1) // ptbr
ldq_p a2, 24(zero) // argc
ldq_p a3, 32(zero) // argv
ldq_p a4, 40(zero) // environ
lda a5, 0(zero) // osf_param
STALL // don't dual issue the load with mtpr -pb
mtpr zero, dtbIa // Flush all D-stream TB entries
mtpr zero, itbIa // Flush all I-stream TB entries
mtpr zero, dtbIa // Flush all D-stream TB entries
mtpr zero, itbIa // Flush all I-stream TB entries
br zero, 2f
ALIGN_BLOCK
2: NOP
mtpr zero, icFlush // Flush the icache.
2: NOP
mtpr zero, icFlush // Flush the icache.
NOP
NOP
NOP // Required NOPs ... 1-10
NOP // Required NOPs ... 1-10
NOP
NOP
NOP
@ -161,7 +158,7 @@ args:
NOP
NOP
NOP // Required NOPs ... 11-20
NOP // Required NOPs ... 11-20
NOP
NOP
NOP
@ -172,7 +169,7 @@ args:
NOP
NOP
NOP // Required NOPs ... 21-30
NOP // Required NOPs ... 21-30
NOP
NOP
NOP
@ -183,7 +180,7 @@ args:
NOP
NOP
NOP // Required NOPs ... 31-40
NOP // Required NOPs ... 31-40
NOP
NOP
NOP
@ -194,13 +191,9 @@ args:
NOP
NOP
NOP // Required NOPs ... 41-44
NOP // Required NOPs ... 41-44
NOP
NOP
NOP
hw_rei_stall // Dispatch to kernel
hw_rei_stall // Dispatch to kernel

179
system/alpha/console/paljtoslave.S
View file

@ -1,80 +1,78 @@
/*
Copyright (c) 2003, 2004
The Regents of The University of Michigan
All Rights Reserved
* Copyright (c) 2003, 2004
* The Regents of The University of Michigan
* All Rights Reserved
*
* This code is part of the M5 simulator, developed by Nathan Binkert,
* Erik Hallnor, Steve Raasch, and Steve Reinhardt, with contributions
* from Ron Dreslinski, Dave Greene, Lisa Hsu, Ali Saidi, and Andrew
* Schultz.
*
* Permission is granted to use, copy, create derivative works and
* redistribute this software and such derivative works for any purpose,
* so long as the copyright notice above, this grant of permission, and
* the disclaimer below appear in all copies made; and so long as the
* name of The University of Michigan is not used in any advertising or
* publicity pertaining to the use or distribution of this software
* without specific, written prior authorization.
*
* THIS SOFTWARE IS PROVIDED AS IS, WITHOUT REPRESENTATION FROM THE
* UNIVERSITY OF MICHIGAN AS TO ITS FITNESS FOR ANY PURPOSE, AND WITHOUT
* WARRANTY BY THE UNIVERSITY OF MICHIGAN OF ANY KIND, EITHER EXPRESS OR
* IMPLIED, INCLUDING WITHOUT LIMITATION THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE REGENTS OF
* THE UNIVERSITY OF MICHIGAN SHALL NOT BE LIABLE FOR ANY DAMAGES,
* INCLUDING DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL
* DAMAGES, WITH RESPECT TO ANY CLAIM ARISING OUT OF OR IN CONNECTION
* WITH THE USE OF THE SOFTWARE, EVEN IF IT HAS BEEN OR IS HEREAFTER
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
*/
This code is part of the M5 simulator, developed by Nathan Binkert,
Erik Hallnor, Steve Raasch, and Steve Reinhardt, with contributions
from Ron Dreslinski, Dave Greene, Lisa Hsu, Ali Saidi, and Andrew
Schultz.
Permission is granted to use, copy, create derivative works and
redistribute this software and such derivative works for any purpose,
so long as the copyright notice above, this grant of permission, and
the disclaimer below appear in all copies made; and so long as the
name of The University of Michigan is not used in any advertising or
publicity pertaining to the use or distribution of this software
without specific, written prior authorization.
THIS SOFTWARE IS PROVIDED AS IS, WITHOUT REPRESENTATION FROM THE
UNIVERSITY OF MICHIGAN AS TO ITS FITNESS FOR ANY PURPOSE, AND WITHOUT
WARRANTY BY THE UNIVERSITY OF MICHIGAN OF ANY KIND, EITHER EXPRESS OR
IMPLIED, INCLUDING WITHOUT LIMITATION THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE REGENTS OF
THE UNIVERSITY OF MICHIGAN SHALL NOT BE LIABLE FOR ANY DAMAGES,
INCLUDING DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL
DAMAGES, WITH RESPECT TO ANY CLAIM ARISING OUT OF OR IN CONNECTION
WITH THE USE OF THE SOFTWARE, EVEN IF IT HAS BEEN OR IS HEREAFTER
ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
*/
/*
Copyright 1993 Hewlett-Packard Development Company, L.P.
* Copyright 1993 Hewlett-Packard Development Company, L.P.
*
* Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use, copy,
* modify, merge, publish, distribute, sublicense, and/or sell copies
* of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
Permission is hereby granted, free of charge, to any person obtaining a copy of
this software and associated documentation files (the "Software"), to deal in
the Software without restriction, including without limitation the rights to
use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
of the Software, and to permit persons to whom the Software is furnished to do
so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in all
copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
*/
#include "dc21164FromGasSources.h" // DECchip 21164 specific definitions
#include "ev5_defs.h"
#include "fromHudsonOsf.h" // OSF/1 specific definitions
#include "fromHudsonMacros.h" // Global macro definitions
#include "ev5_impure.h" // Scratch & logout area data structures
#include "platform.h" // Platform specific definitions
#include "dc21164FromGasSources.h" // DECchip 21164 specific definitions
#include "ev5_defs.h"
#include "fromHudsonOsf.h" // OSF/1 specific definitions
#include "fromHudsonMacros.h" // Global macro definitions
/*
* args:
* a0: here
* a1: boot location
* a2: CSERVE_J_KTOPAL
* a3: restrart_pv
* a4: vptb
* a5: my_rpb
*
* SRM Console Architecture III 3-26
*/
.global palJToSlave
.text 3
/*
* args:
a0: here
a1: boot location
a2: CSERVE_J_KTOPAL
a3: restrart_pv
a4: vptb
a5: my_rpb
*/
palJToSlave:
/*
* SRM Console Architecture III 3-26
*/
ALIGN_BRANCH
bis a3, zero, pv
@ -90,7 +88,7 @@ palJToSlave:
/* Turn on superpage mapping in the mbox and icsr */
lda t0, (2<<MCSR_V_SP)(zero) // Get a '10' (binary) in MCSR<SP>
STALL // don't dual issue the load with mtpr -pb
mtpr t0, mcsr // Set the super page mode enable bit
mtpr t0, mcsr // Set the super page mode enable bit
STALL // don't dual issue the load with mtpr -pb
lda t0, 0(zero)
@ -99,54 +97,43 @@ palJToSlave:
LDLI (t1,0x20000000)
STALL // don't dual issue the load with mtpr -pb
mfpr t0, icsr // Enable superpage mapping
mfpr t0, icsr // Enable superpage mapping
STALL // don't dual issue the load with mtpr -pb
bis t0, t1, t0
mtpr t0, icsr
STALL // Required stall to update chip ...
STALL // Required stall to update chip ...
STALL
STALL
STALL
STALL
ldq_p s0, PCB_Q_PTBR(a5)
sll s0, VA_S_OFF, s0 // Shift PTBR into position
sll s0, VA_S_OFF, s0 // Shift PTBR into position
STALL // don't dual issue the load with mtpr -pb
mtpr s0, ptPtbr // PHYSICAL MBOX INST -> MT PT20 IN 0,1
mtpr s0, ptPtbr // PHYSICAL MBOX INST -> MT PT20 IN 0,1
STALL // don't dual issue the load with mtpr -pb
ldq_p sp, PCB_Q_KSP(a5)
//mtpr a0, excAddr // Load the dispatch address.
//STALL // don't dual issue the load with mtpr -pb
//bis a3, zero, a0 // first free PFN
// ldq_p a1, PCB_Q_PTBR(a5) // ptbr
mtpr zero, dtbIa // Flush all D-stream TB entries
mtpr zero, itbIa // Flush all I-stream TB entries
//ldq_p a2, 24(zero) // argc
//ldq_p a3, 32(zero) // argv
//ldq_p a4, 40(zero) // environ
//lda a5, 0(zero) // osf_param
//STALL // don't dual issue the load with mtpr -pb
mtpr zero, dtbIa // Flush all D-stream TB entries
mtpr zero, itbIa // Flush all I-stream TB entries
mtpr a1, excAddr // Load the dispatch address.
mtpr a1, excAddr // Load the dispatch address.
STALL // don't dual issue the load with mtpr -pb
STALL // don't dual issue the load with mtpr -pb
mtpr zero, dtbIa // Flush all D-stream TB entries
mtpr zero, itbIa // Flush all I-stream TB entries
mtpr zero, dtbIa // Flush all D-stream TB entries
mtpr zero, itbIa // Flush all I-stream TB entries
br zero, 2f
ALIGN_BLOCK
2: NOP
mtpr zero, icFlush // Flush the icache.
mtpr zero, icFlush // Flush the icache.
NOP
NOP
NOP // Required NOPs ... 1-10
NOP // Required NOPs ... 1-10
NOP
NOP
NOP
@ -157,7 +144,7 @@ palJToSlave:
NOP
NOP
NOP // Required NOPs ... 11-20
NOP // Required NOPs ... 11-20
NOP
NOP
NOP
@ -168,7 +155,7 @@ palJToSlave:
NOP
NOP
NOP // Required NOPs ... 21-30
NOP // Required NOPs ... 21-30
NOP
NOP
NOP
@ -179,7 +166,7 @@ palJToSlave:
NOP
NOP
NOP // Required NOPs ... 31-40
NOP // Required NOPs ... 31-40
NOP
NOP
NOP
@ -190,12 +177,10 @@ palJToSlave:
NOP
NOP
NOP // Required NOPs ... 41-44
NOP // Required NOPs ... 41-44
NOP
NOP
NOP
hw_rei_stall // Dispatch to kernel
hw_rei_stall // Dispatch to kernel

474
system/alpha/console/printf.c
View file

@ -1,302 +1,324 @@
/*
Copyright 1993, 1994 Hewlett-Packard Development Company, L.P.
Permission is hereby granted, free of charge, to any person obtaining a copy of
this software and associated documentation files (the "Software"), to deal in
the Software without restriction, including without limitation the rights to
use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
of the Software, and to permit persons to whom the Software is furnished to do
so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in all
copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
*/
#ifndef LINT
static char *rcsid = "$Id: printf.c,v 1.1.1.1 1997/10/30 23:27:12 verghese Exp $";
#endif
/*
* $Log: printf.c,v $
* Revision 1.1.1.1 1997/10/30 23:27:12 verghese
* current 10/29/97
* Copyright (c) 2003, 2004
* The Regents of The University of Michigan
* All Rights Reserved
*
* Revision 1.1 1995/06/26 21:09:35 berc
* Initial revision
* This code is part of the M5 simulator, developed by Nathan Binkert,
* Erik Hallnor, Steve Raasch, and Steve Reinhardt, with contributions
* from Ron Dreslinski, Dave Greene, Lisa Hsu, Ali Saidi, and Andrew
* Schultz.
*
* Revision 1.8 1994/10/06 20:29:08 fdh
* Corrected unsigned long declaration.
*
* Revision 1.7 1994/08/05 20:16:23 fdh
* Updated Copyright header and RCS $Id: identifier.
*
* Revision 1.6 1994/06/21 15:41:54 rusling
* fixedup WNT compiler warnings
*
* Revision 1.5 1994/06/17 19:35:37 fdh
* Clean-up...
*
* Revision 1.4 1994/01/19 10:40:08 rusling
* Ported to Alpha Windows NT.
*
* Revision 1.3 1993/11/02 21:57:45 fdh
* Fixed sign extension problem introduced in version 1.2
*
* Revision 1.2 1993/10/13 15:29:02 rusling
* Added floating point support in printf. This meant adding variable arguments to
* it and FormatItem() and including stdarg.h.
*
* Revision 1.1 1993/06/08 19:56:24 fdh
* Initial revision
* Permission is granted to use, copy, create derivative works and
* redistribute this software and such derivative works for any purpose,
* so long as the copyright notice above, this grant of permission, and
* the disclaimer below appear in all copies made; and so long as the
* name of The University of Michigan is not used in any advertising or
* publicity pertaining to the use or distribution of this software
* without specific, written prior authorization.
*
* THIS SOFTWARE IS PROVIDED AS IS, WITHOUT REPRESENTATION FROM THE
* UNIVERSITY OF MICHIGAN AS TO ITS FITNESS FOR ANY PURPOSE, AND WITHOUT
* WARRANTY BY THE UNIVERSITY OF MICHIGAN OF ANY KIND, EITHER EXPRESS OR
* IMPLIED, INCLUDING WITHOUT LIMITATION THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE REGENTS OF
* THE UNIVERSITY OF MICHIGAN SHALL NOT BE LIABLE FOR ANY DAMAGES,
* INCLUDING DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL
* DAMAGES, WITH RESPECT TO ANY CLAIM ARISING OUT OF OR IN CONNECTION
* WITH THE USE OF THE SOFTWARE, EVEN IF IT HAS BEEN OR IS HEREAFTER
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
*/
/* printf.c
L. S.
Sun Feb 10 20:18:22 1985
/*
* Copyright 1993 Hewlett-Packard Development Company, L.P.
*
* Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use, copy,
* modify, merge, publish, distribute, sublicense, and/or sell copies
* of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
//#include "system.h"
#include "lib.h"
#include <sys/types.h>
#include <stdarg.h>
/* The string s is terminated by a '\0' */
void
PutString(const char *s)
{
while (*s) PutChar(*s++);
while (*s)
PutChar(*s++);
}
/* print c count times */
void
PutRepChar(char c, int count)
{
while (count--) PutChar(c);
while (count--)
PutChar(c);
}
/* put string reverse */
void
PutStringReverse(const char *s, int index)
{
while ((index--) > 0) PutChar(s[index]);
while (index-- > 0)
PutChar(s[index]);
}
/* prints value in radix, in a field width width, with fill
character fill
if radix is negative, print as signed quantity
if width is negative, left justify
if width is 0, use whatever is needed
if fill is 0, use ' '
/*
* prints value in radix, in a field width width, with fill
* character fill
* if radix is negative, print as signed quantity
* if width is negative, left justify
* if width is 0, use whatever is needed
* if fill is 0, use ' '
*/
void
PutNumber(sl value, int radix, int width, char fill)
PutNumber(long value, int radix, int width, char fill)
{
char buffer[40];
ui bufferindex = 0;
ul uvalue;
uw digit;
uw left = FALSE;
uw negative = FALSE;
char buffer[40];
uint bufferindex = 0;
ulong uvalue;
ushort digit;
ushort left = 0;
ushort negative = 0;
if (fill == 0) fill = ' ';
if (fill == 0)
fill = ' ';
if (width < 0) {
width = -width;
left = TRUE;
if (width < 0) {
width = -width;
left = 1;
}
if (width < 0 || width > 80) width = 0;
if (radix < 0) {
radix = -radix;
if (value < 0) {
negative = TRUE;
value = -value;
}
if (width < 0 || width > 80)
width = 0;
if (radix < 0) {
radix = -radix;
if (value < 0) {
negative = 1;
value = -value;
}
}
switch (radix) {
case 8:
case 10:
case 16: break;
default: {
PutString("****");
return;
}
switch (radix) {
case 8:
case 10:
case 16:
break;
default:
PutString("****");
return;
}
uvalue = value;
do {
if (radix != 16)
{
digit = (uw)(uvalue % radix);
uvalue /= radix;
}
else
{
digit = (uw)(uvalue & 0xf);
uvalue = uvalue >> 4;
}
buffer[bufferindex] = digit + ((digit <= 9) ? '0' : ('A' - 10));
bufferindex += 1;
uvalue = value;
do {
if (radix != 16) {
digit = (ushort)(uvalue % radix);
uvalue /= radix;
} else {
digit = (ushort)(uvalue & 0xf);
uvalue = uvalue >> 4;
}
buffer[bufferindex] = digit + ((digit <= 9) ? '0' : ('A' - 10));
bufferindex += 1;
} while (uvalue != 0);
/* fill # ' ' and negative cannot happen at once */
if (negative) {
buffer[bufferindex] = '-';
bufferindex += 1;
if (negative) {
buffer[bufferindex] = '-';
bufferindex += 1;
}
if ((ui)width <= bufferindex) PutStringReverse(buffer, bufferindex);
else {
width -= bufferindex;
if (!left) PutRepChar(fill, width);
PutStringReverse(buffer, bufferindex);
if (left) PutRepChar(fill, width);
if ((uint)width <= bufferindex) {
PutStringReverse(buffer, bufferindex);
} else {
width -= bufferindex;
if (!left)
PutRepChar(fill, width);
PutStringReverse(buffer, bufferindex);
if (left)
PutRepChar(fill, width);
}
}
ul power(long base, long n)
ulong
power(long base, long n)
{
ul p;
ulong p;
for (p = 1; n > 0; --n)
p = p * base;
return p;
for (p = 1; n > 0; --n)
p = p * base;
return p;
}
void putFloat(double a, int fieldwidth, char fill)
void
putFloat(double a, int fieldwidth, char fill)
{
int i;
ul b;
int i;
ulong b;
/*
* Put out everything before the decimal place.
*/
PutNumber(((ul) a), 10, fieldwidth, fill);
/*
* Output the decimal place.
*/
PutChar('.' & 0x7f);
/*
* Output the n digits after the decimal place.
*/
for (i = 1; i < 6; i++) {
b = (ul)(power(10, i) * (double)(a - (ul) a));
PutChar((char)(b % 10) + '0');
}
/*
* Put out everything before the decimal place.
*/
PutNumber(((ulong) a), 10, fieldwidth, fill);
/*
* Output the decimal place.
*/
PutChar('.' & 0x7f);
/*
* Output the n digits after the decimal place.
*/
for (i = 1; i < 6; i++) {
b = (ulong)(power(10, i) * (double)(a - (ulong) a));
PutChar((char)(b % 10) + '0');
}
}
const char *
FormatItem(const char *f, va_list *ap)
{
char c;
int fieldwidth = 0;
int leftjust = FALSE;
int radix = 0;
char fill = ' ';
if (*f == '0') fill = '0';
while (c = *f++) {
if (c >= '0' && c <= '9') {
fieldwidth = (fieldwidth * 10) + (c - '0');
}
else switch (c) {
case '\000': return(--f);
case '%': PutChar('%');
return(f);
case '-': leftjust = TRUE;
break;
case 'c': {
char a = va_arg(*ap, char *);
char c;
int fieldwidth = 0;
int leftjust = 0;
int radix = 0;
char fill = ' ';
if (leftjust) PutChar(a & 0x7f);
if (fieldwidth > 0) PutRepChar(fill, fieldwidth - 1);
if (!leftjust) PutChar(a & 0x7f);
return(f);
if (*f == '0')
fill = '0';
while (c = *f++) {
if (c >= '0' && c <= '9') {
fieldwidth = (fieldwidth * 10) + (c - '0');
} else {
switch (c) {
case '\000':
return(--f);
case '%':
PutChar('%');
return(f);
case '-':
leftjust = 1;
break;
case 'c': {
char a = (char)va_arg(*ap, int);
if (leftjust)
PutChar(a & 0x7f);
if (fieldwidth > 0)
PutRepChar(fill, fieldwidth - 1);
if (!leftjust)
PutChar(a & 0x7f);
return(f);
}
case 's': {
const char *a = va_arg(*ap, const char *);
if (leftjust)
PutString((const char *) a);
if (fieldwidth > strlen((const char *) a))
PutRepChar(fill, fieldwidth - strlen((const char *)a));
if (!leftjust)
PutString((const char *) a);
return(f);
}
case 'd':
radix = -10;
break;
case 'u':
radix = 10;
break;
case 'x':
radix = 16;
break;
case 'X':
radix = 16;
break;
case 'o':
radix = 8;
break;
case 'f': {
double a = va_arg(*ap, double);
putFloat(a, fieldwidth, fill);
return(f);
}
default: /* unknown switch! */
radix = 3;
break;
}
}
case 's': {
const char *a = va_arg(*ap, const char *);
if (leftjust) PutString((const char *) a);
if (fieldwidth > strlen((const char *) a))
PutRepChar(fill, fieldwidth - strlen((const char *)a));
if (!leftjust) PutString((const char *) a);
return(f);
}
case 'd': radix = -10;
break;
case 'u': radix = 10;
break;
case 'x': radix = 16;
break;
case 'X': radix = 16;
break;
case 'o': radix = 8;
break;
case 'f': {
double a = va_arg(*ap, double);
putFloat(a, fieldwidth, fill);
return(f);
}
default: /* unknown switch! */
radix = 3;
break;
}
if (radix) break;
if (radix)
break;
}
if (leftjust) fieldwidth = -fieldwidth;
{
sl a = va_arg(*ap, sl);
PutNumber(a, radix, fieldwidth, fill);
}
return(f);
if (leftjust)
fieldwidth = -fieldwidth;
long a = va_arg(*ap, long);
PutNumber(a, radix, fieldwidth, fill);
return(f);
}
int
printf(const char *f, ...)
{
va_list ap;
va_list ap;
va_start(ap, f);
va_start(ap, f);
while (*f) {
if (*f == '%') f = FormatItem(f + 1, &ap);
else PutChar(*f++);
}
while (*f) {
if (*f == '%')
f = FormatItem(f + 1, &ap);
else
PutChar(*f++);
}
if (*(f-1)=='\n') {
/* add a line-feed (SimOS console output goes to shell */
PutChar('\r');
}
if (*(f - 1) == '\n') {
/* add a line-feed (SimOS console output goes to shell */
PutChar('\r');
}
va_end(ap); /* clean up */
return 0;
va_end(ap); /* clean up */
return 0;
}
void
panic(const char *f, ...)
{
va_list ap;
va_list ap;
va_start(ap, f);
va_start(ap, f);
printf("CONSOLE PANIC (looping): ");
while (*f) {
if (*f == '%') f = FormatItem(f + 1, &ap);
else PutChar(*f++);
printf("CONSOLE PANIC (looping): ");
while (*f) {
if (*f == '%')
f = FormatItem(f + 1, &ap);
else
PutChar(*f++);
}
va_end(ap); /* clean up */
while(1);
va_end(ap); /* clean up */
while(1);
}

456
system/alpha/h/cia.h
View file

@ -1,456 +0,0 @@
/*
Copyright 1993, 1994, 1995 Hewlett-Packard Development Company, L.P.
Permission is hereby granted, free of charge, to any person obtaining a copy of
this software and associated documentation files (the "Software"), to deal in
the Software without restriction, including without limitation the rights to
use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
of the Software, and to permit persons to whom the Software is furnished to do
so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in all
copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
*/
#ifndef __CIA_H_LOADED
#define __CIA_H_LOADED
/*
* $Id: cia.h,v 1.1.1.1 1997/10/30 23:27:14 verghese Exp $;
*/
/*
* $Log: cia.h,v $
* Revision 1.1.1.1 1997/10/30 23:27:14 verghese
* current 10/29/97
*
* Revision 1.3 1995/04/20 16:37:22 cruz
* Made some deletions and modifications.
*
* Revision 1.2 1994/12/19 18:33:02 cruz
* Added some new constants.
*
* Revision 1.1 1994/11/23 19:49:39 cruz
* Initial revision
*
*
*/
/*
******************************** WARNING *******************************
* BE EXTREMELY CAREFUL WHEN USING OFFSETS LARGER THAN 0x8000 WITH
* AN "LDA" INSTRUCTION BECAUSE THEY WILL CAUSE AN UNWANTED SIGN
* EXTENSION.
******************************** WARNING *******************************
*/
/* ======================================================================
* = BASE ADDRESSES =
* ======================================================================
*
* Define the base address for registers accessing the memory
* controller
*/
#define MC_GCR_BASE 0x874 /* General Control Register */
#define MC_GCR_BASE_SHIFT 28 /* Shift base by this # of bits */
#define MC_DIAG_BASE 0x874 /* Diagnostic Registers */
#define MC_DIAG_BASE_SHIFT 28
#define MC_PERFMON_BASE 0x874 /* Performance monitoring regs */
#define MC_PERFMON_BASE_SHIFT 28
#define MC_ERROR_BASE 0x874 /* Error Registers */
#define MC_ERROR_BASE_SHIFT 28
#define MC_MCR_BASE 0x875 /* Memory Configuration Registers*/
#define MC_MCR_BASE_SHIFT 28
#define MC_PCI_BASE 0x876 /* PCI Configuration Registers */
#define MC_PCI_BASE_SHIFT 28
/* ======================================================================
* = OFFSETS FOR THE GENERAL CONTROL REGISTERS (87.4000.0000) =
* ======================================================================
*/
#define MC_PCI_REV 0x80 /* Revision of CIA ASIC. */
#define MC_PCI_LAT 0xC0 /* PCI Master Latency Timer. */
#define MC_CIA_CTRL 0x100 /* CIA Control Register. */
#define MC_CIA_CNFG 0x200 /* CIA Configuration Register. */
#define MC_HAE_MEM 0x400 /* HW Address Extension (Sparse)*/
#define MC_HAE_IO 0x440 /* HW Addr. Ext. for sparse IO. */
#define MC_CFG 0x480 /* Configuration reg for bridges*/
#define MC_CACK_EN 0x600 /* Acknowledgement Control Reg. */
/* ======================================================================
* = OFFSETS FOR THE DIAGNOSTIC REGISTERS (87.4000.0000) =
* ======================================================================
*/
#define MC_CIA_DIAG 0x2000 /* Diagnostic control register */
#define MC_DIAG_CHECK 0x3000 /* Diagnostic check register */
/* ======================================================================
* = OFFSETS FOR THE PERFORMANCE MONITORING REGISTERS (87.4000.0000) =
* ======================================================================
*/
#define MC_PERF_MONITOR 0x4000 /* Performance monitor register */
#define MC_PERF_CONTROL 0x4040 /* Perf. Mon. Control register */
/* ======================================================================
* = OFFSETS FOR THE ERROR REGISTERS (87.4000.0000) =
* ======================================================================
*/
#define MC_CPU_ERR0 0x8000 /* CPU Error Info Register 0. */
#define MC_CPU_ERR1 0x8040 /* CPU Error Info Register 1. */
#define MC_CIA_ERR 0x8200 /* CIA Error Register. */
#define MC_CIA_STAT 0x8240 /* CIA Status Register. */
#define MC_ERR_MASK 0x8280 /* CIA Error Mask Register. */
#define MC_CIA_SYN 0x8300 /* CIA Syndrome Register. */
#define MC_MEM_ERR0 0x8400 /* Memory Port Status Register 0*/
#define MC_MEM_ERR1 0x8440 /* Memory Port Status Register 1*/
#define MC_PCI_ERR0 0x8800 /* PCI Error Status Register 0. */
#define MC_PCI_ERR1 0x8840 /* PCI Error Status Register 1. */
/* ======================================================================
* = OFFSETS FOR THE MEMORY CONFIGURATION REGISTERS (87.5000.0000) =
* ======================================================================
*/
#define MC_MCR 0x0 /* Memory Configuration Register*/
#define MC_MBA0 0x600 /* Memory Base Address Register */
#define MC_MBA2 0x680 /* Memory Base Address Register */
#define MC_MBA4 0x700 /* Memory Base Address Register */
#define MC_MBA6 0x780 /* Memory Base Address Register */
#define MC_MBA8 0x800 /* Memory Base Address Register */
#define MC_MBAA 0x880 /* Memory Base Address Register */
#define MC_MBAC 0x900 /* Memory Base Address Register */
#define MC_MBAE 0x980 /* Memory Base Address Register */
#define MC_TMG0 0xB00 /* Memory Timing Register */
#define MC_TMG1 0xB40 /* Memory Timing Register */
#define MC_TMG2 0xB80 /* Memory Timing Register */
/* ======================================================================
* = OFFSETS FOR THE PCI CONFIGURATION REGISTERS (87.6000.0000) =
* ======================================================================
*/
#define MC_TBIA 0x100 /* S/G Translation Buffer Inval.*/
#define MC_W0_BASE 0x400 /* Window Base 0. */
#define MC_W0_MASK 0x440 /* Window Mask 0. */
#define MC_T0_BASE 0x480 /* Translated Base 0. */
#define MC_W1_BASE 0x500 /* Window Base 1. */
#define MC_W1_MASK 0x540 /* Window Mask 1. */
#define MC_T1_BASE 0x580 /* Translated Base 1. */
#define MC_W2_BASE 0x600 /* Window Base 2. */
#define MC_W2_MASK 0x640 /* Window Mask 2. */
#define MC_T2_BASE 0x680 /* Translated Base 2. */
#define MC_W3_BASE 0x700 /* Window Base 3. */
#define MC_W3_MASK 0x740 /* Window Mask 3. */
#define MC_T3_BASE 0x780 /* Translated Base 3. */
#define MC_DAC 0x7C0 /* Window DAC Base. */
#define MC_LTB_TAG0 0x800 /* Lockable Translation Buffer. */
#define MC_LTB_TAG1 0x840 /* Lockable Translation Buffer. */
#define MC_LTB_TAG2 0x880 /* Lockable Translation Buffer. */
#define MC_LTB_TAG3 0x8C0 /* Lockable Translation Buffer. */
#define MC_TB_TAG0 0x900 /* Translation Buffer Tag. */
#define MC_TB_TAG1 0x940 /* Translation Buffer Tag. */
#define MC_TB_TAG2 0x980 /* Translation Buffer Tag. */
#define MC_TB_TAG3 0x9C0 /* Translation Buffer Tag. */
#define MC_TB0_PAGE0 0x1000 /* Translation Buffer 0 Page. */
#define MC_TB0_PAGE1 0x1040 /* Translation Buffer 0 Page. */
#define MC_TB0_PAGE2 0x1080 /* Translation Buffer 0 Page. */
#define MC_TB0_PAGE3 0x10C0 /* Translation Buffer 0 Page. */
#define MC_TB1_PAGE0 0x1100 /* Translation Buffer 1 Page. */
#define MC_TB1_PAGE1 0x1140 /* Translation Buffer 1 Page. */
#define MC_TB1_PAGE2 0x1180 /* Translation Buffer 1 Page. */
#define MC_TB1_PAGE3 0x11C0 /* Translation Buffer 1 Page. */
#define MC_TB2_PAGE0 0x1200 /* Translation Buffer 2 Page. */
#define MC_TB2_PAGE1 0x1240 /* Translation Buffer 2 Page. */
#define MC_TB2_PAGE2 0x1280 /* Translation Buffer 2 Page. */
#define MC_TB2_PAGE3 0x12C0 /* Translation Buffer 2 Page. */
#define MC_TB3_PAGE0 0x1300 /* Translation Buffer 3 Page. */
#define MC_TB3_PAGE1 0x1340 /* Translation Buffer 3 Page. */
#define MC_TB3_PAGE2 0x1380 /* Translation Buffer 3 Page. */
#define MC_TB3_PAGE3 0x13C0 /* Translation Buffer 3 Page. */
#define MC_TB4_PAGE0 0x1400 /* Translation Buffer 4 Page. */
#define MC_TB4_PAGE1 0x1440 /* Translation Buffer 4 Page. */
#define MC_TB4_PAGE2 0x1480 /* Translation Buffer 4 Page. */
#define MC_TB4_PAGE3 0x14C0 /* Translation Buffer 4 Page. */
#define MC_TB5_PAGE0 0x1500 /* Translation Buffer 5 Page. */
#define MC_TB5_PAGE1 0x1540 /* Translation Buffer 5 Page. */
#define MC_TB5_PAGE2 0x1580 /* Translation Buffer 5 Page. */
#define MC_TB5_PAGE3 0x15C0 /* Translation Buffer 5 Page. */
#define MC_TB6_PAGE0 0x1600 /* Translation Buffer 6 Page. */
#define MC_TB6_PAGE1 0x1640 /* Translation Buffer 6 Page. */
#define MC_TB6_PAGE2 0x1680 /* Translation Buffer 6 Page. */
#define MC_TB6_PAGE3 0x16C0 /* Translation Buffer 6 Page. */
#define MC_TB7_PAGE0 0x1700 /* Translation Buffer 7 Page. */
#define MC_TB7_PAGE1 0x1740 /* Translation Buffer 7 Page. */
#define MC_TB7_PAGE2 0x1780 /* Translation Buffer 7 Page. */
#define MC_TB7_PAGE3 0x17C0 /* Translation Buffer 7 Page. */
/* ======================================================================
* = BIT EXTENT FOR CIA_CTRL REGISTER (87.4000.0100) =
* ======================================================================
*/
#define MC_CIA_CTRL_V_PCI_EN 0
#define MC_CIA_CTRL_M_PCI_EN (1 << MC_CIA_CTRL_V_PCI_EN)
#define MC_CIA_CTRL_V_PCI_LOCK_EN 1
#define MC_CIA_CTRL_M_PCI_LOCK_EN (1 << MC_CIA_CTRL_V_PCI_LOCK_EN)
#define MC_CIA_CTRL_V_PCI_LOOP_EN 2
#define MC_CIA_CTRL_M_PCI_LOOP_EN (1 << MC_CIA_CTRL_V_PCI_LOOP_EN)
#define MC_CIA_CTRL_V_FST_BB_EN 3
#define MC_CIA_CTRL_M_FST_BB_EN (1 << MC_CIA_CTRL_V_FST_BB_EN)
#define MC_CIA_CTRL_V_PCI_MST_EN 4
#define MC_CIA_CTRL_M_PCI_MST_EN (1 << MC_CIA_CTRL_V_PCI_MST_EN)
#define MC_CIA_CTRL_V_PCI_MEM_EN 5
#define MC_CIA_CTRL_M_PCI_MEM_EN (1 << MC_CIA_CTRL_V_PCI_MEM_EN)
#define MC_CIA_CTRL_V_PCI_REQ64_EN 6
#define MC_CIA_CTRL_M_PCI_REQ64_EN (1 << MC_CIA_CTRL_V_PCI_REQ64_EN)
#define MC_CIA_CTRL_V_PCI_ACK64_EN 7
#define MC_CIA_CTRL_M_PCI_ACK64_EN (1 << MC_CIA_CTRL_V_PCI_ACK64_EN)
#define MC_CIA_CTRL_V_ADDR_PE_EN 8
#define MC_CIA_CTRL_M_ADDR_PE_EN (1 << MC_CIA_CTRL_V_ADDR_PE_EN)
#define MC_CIA_CTRL_V_PERR_EN 9
#define MC_CIA_CTRL_M_PERR_EN (1 << MC_CIA_CTRL_V_PERR_EN)
#define MC_CIA_CTRL_V_FILLERR_EN 10
#define MC_CIA_CTRL_M_FILLERR_EN (1 << MC_CIA_CTRL_V_FILLERR_EN)
#define MC_CIA_CTRL_V_MCHKERR_EN 11
#define MC_CIA_CTRL_M_MCHKERR_EN (1 << MC_CIA_CTRL_V_MCHKERR_EN)
#define MC_CIA_CTRL_V_ECC_CHK_EN 12
#define MC_CIA_CTRL_M_ECC_CHK_EN (1 << MC_CIA_CTRL_V_ECC_CHK_EN)
#define MC_CIA_CTRL_V_ASSERT_IDLE_BC 13
#define MC_CIA_CTRL_M_ASSERT_IDLE_BC (1 << MC_CIA_CTRL_V_ASSERT_IDLE_BC)
#define MC_CIA_CTRL_V_CON_IDLE_BC 14
#define MC_CIA_CTRL_M_CON_IDLE_BC (1 << MC_CIA_CTRL_V_CON_IDLE_BC)
#define MC_CIA_CTRL_V_CSR_IOA_BYPASS 15
#define MC_CIA_CTRL_M_CSR_IOA_BYPASS (1 << MC_CIA_CTRL_V_CSR_IOA_BYPASS )
#define MC_CIA_CTRL_V_IO_FLUSHREQ_EN 16
#define MC_CIA_CTRL_M_IO_FLUSHREQ_EN (1 << MC_CIA_CTRL_V_IO_FLUSHREQ_EN )
#define MC_CIA_CTRL_V_CPU_FLUSHREQ_EN 17
#define MC_CIA_CTRL_M_CPU_FLUSHREQ_EN (1 << MC_CIA_CTRL_V_CPU_FLUSHREQ_EN )
#define MC_CIA_CTRL_V_ARB_EV5_EN 18
#define MC_CIA_CTRL_M_ARB_EV5_EN (1 << MC_CIA_CTRL_V_ARB_EV5_EN)
#define MC_CIA_CTRL_V_EN_ARB_LINK 19
#define MC_CIA_CTRL_M_EN_ARB_LINK (1 << MC_CIA_CTRL_V_EN_ARB_LINK)
#define MC_CIA_CTRL_V_RD_TYPE 20
#define MC_CIA_CTRL_M_RD_TYPE (3 << MC_CIA_CTRL_V_RD_TYPE)
#define MC_CIA_CTRL_V_RL_TYPE 24
#define MC_CIA_CTRL_M_RL_TYPE (3 << MC_CIA_CTRL_V_RL_TYPE)
#define MC_CIA_CTRL_V_RM_TYPE 28
#define MC_CIA_CTRL_M_RM_TYPE (3 << MC_CIA_CTRL_V_RM_TYPE)
/* ======================================================================
* = BIT EXTENT FOR CACK_EN REGISTER (87.4000.0600) =
* ======================================================================
*/
#define MC_CACK_EN_V_MEM_LOCK 0x0 /* Controls LOCK enable. */
#define MC_CACK_EN_V_MB 0x1 /* Controls MB enable. */
#define MC_CACK_EN_V_SET_DIRTY 0x2 /* Controls SET_DIRTY enable. */
#define MC_CACK_EN_V_BC_VICTIM 0x3 /* Controls BC_VICTIM enable. */
/* ======================================================================
* = BIT SIZES FOR CACK_EN REGISTER (87.4000.0600) =
* ======================================================================
*/
#define MC_CACK_EN_S_MEM_LOCK 1 /* Controls LOCK enable. */
#define MC_CACK_EN_S_MB 1 /* Controls MB enable. */
#define MC_CACK_EN_S_SET_DIRTY 1 /* Controls SET_DIRTY enable. */
#define MC_CACK_EN_S_BC_VICTIM 1 /* Controls BC_VICTIM enable. */
/* ======================================================================
* = BIT MASKS FOR CACK_EN REGISTER (87.4000.0600) =
* ======================================================================
*/
#define MC_CACK_EN_M_MEM_LOCK (((1<<MC_CACK_EN_S_MEM_LOCK)-1) << MC_CACK_EN_V_MEM_LOCK)
#define MC_CACK_EN_M_MB (((1<<MC_CACK_EN_S_MB)-1) << MC_CACK_EN_V_MB)
#define MC_CACK_EN_M_SET_DIRTY (((1<<MC_CACK_EN_S_SET_DIRTY)-1) << MC_CACK_EN_V_SET_DIRTY)
#define MC_CACK_EN_M_BC_VICTIM (((1<<MC_CACK_EN_S_BC_VICTIM)-1) << MC_CACK_EN_V_BC_VICTIM)
/* ======================================================================
* = BIT EXTENT FOR MCR REGISTER (87.5000.0000) =
* ======================================================================
*/
#define MC_MCR_V_MEM_SIZE 0x0 /* 1 = 256-bit data, 0 = 128-bit*/
#define MC_MCR_V_CACHE_SIZE 0x4 /* Set to match CPU's cache size*/
#define MC_MCR_V_REF_RATE 0x8 /* Refresh rate counter. */
#define MC_MCR_V_REF_BURST 0x18 /* Refresh burst. */
#define MC_MCR_V_TMG_R0 0x20 /* Row address setup. */
#define MC_MCR_V_LONG_CBR_CAS 0x22 /* Refresh CAS pulse width. */
#define MC_MCR_V_DLY_IDLE_BC 0x26 /* ??. */
#define MC_MCR_V_EARLY_IDLE_BC 0x29 /* ??. */
/* ======================================================================
* = BIT SIZES FOR MCR REGISTER (87.5000.0000) =
* ======================================================================
*/
#define MC_MCR_S_MEM_SIZE 1
#define MC_MCR_S_CACHE_SIZE 3
#define MC_MCR_S_REF_RATE 10
#define MC_MCR_S_REF_BURST 2
#define MC_MCR_S_TMG_R0 2
#define MC_MCR_S_LONG_CBR_CAS 1
#define MC_MCR_S_DLY_IDLE_BC 2
#define MC_MCR_S_EARLY_IDLE_BC 1
/* ======================================================================
* = BIT MASKS FOR MCR REGISTER (87.5000.0000) =
* ======================================================================
*/
#define MC_MCR_M_MEM_SIZE (((1<<MC_MCR_S_MEM_SIZE)-1) << MC_MCR_V_MEM_SIZE)
#define MC_MCR_M_CACHE_SIZE (((1<<MC_MCR_S_CACHE_SIZE)-1) << MC_MCR_V_CACHE_SIZE)
#define MC_MCR_M_REF_RATE (((1<<MC_MCR_S_REF_RATE)-1) << MC_MCR_V_REF_RATE)
#define MC_MCR_M_REF_BURST (((1<<MC_MCR_S_REF_BURST)-1) << MC_MCR_V_REF_BURST)
#define MC_MCR_M_TMG_R0 (((1<<MC_MCR_S_TMG_R0)-1) << MC_MCR_V_TMG_R0)
#define MC_MCR_M_LONG_CBR_CAS (((1<<MC_MCR_S_LONG_CBR_CAS)-1) << MC_MCR_V_LONG_CBR_CAS)
#define MC_MCR_M_DLY_IDLE_BC (((1<<MC_MCR_S_DLY_IDLE_BC)-1) << MC_MCR_V_DLY_IDLE_BC)
#define MC_MCR_M_EARLY_IDLE_BC (((1<<MC_MCR_S_EARLY_IDLE_BC)-1) << MC_MCR_V_EARLY_IDLE_BC)
/* ======================================================================
* = BIT EXTENT FOR TIMING REGISTERS =
* ======================================================================
*/
#define MC_TMG_V_R1 0 /* [1:0] row address hold */
#define MC_TMG_V_R2 2 /* [3:2] row address hold */
#define MC_TMG_V_R3 4 /* [5:4] read, cycle time */
#define MC_TMG_V_R4 6 /* [7:6] read, delay from */
/* MEM_RD_RDY to CAS assertion */
#define MC_TMG_V_R5 8 /* [9:8] read, cas pulse width */
#define MC_TMG_V_R6 10 /* [11:10] read, column address hold*/
#define MC_TMG_V_W1 12 /* [13:12] writes, non-linked */
/* victim, delay from start to MEM_WR */
#define MC_TMG_V_W4 14 /*[16:14] writes, MEM_WR to CAS assert*/
#define MC_TMG_V_PRE 17 /* [17] RAS Pre-charge delay */
/* __0=no delay, 1=delay 30 ns */
#define MC_TMG_V_V3 18 /* [19:18] write, cycle time */
#define MC_TMG_V_V4 20 /* [22:20] linked victim, */
/* MEM_WR to CAS assertion */
#define MC_TMG_V_V5 24 /* [25:24] write, victim, CAS */
/* pulse width */
#define MC_TMG_V_V6 26 /* [27:26] victim/write, column*/
/* address hold */
#define MC_TMG_V_RV 28 /* [29:28] read-victim, delay */
/* from MEM_RD_RDY de-assertion*/
/* to MEM_WR */
#define MC_TMG_V_RD_DLY 30 /* [31:30] select clk the dsw */
/* will use to capture memory */
/* data 0=CLK, 1=CLK2X */
/* ======================================================================
* = BIT EXTENT FOR MBA REGISTERS (87.5000.0600 + n*80) =
* ======================================================================
*/
#define MC_MBA_V_S0_VALID 0 /* Side 0 for the bank is valid */
#define MC_MBA_V_ROW_TYPE 1 /* Row and Column configuration */
#define MC_MBA_V_MASK 4 /* Indicates size of mem SIMMs */
#define MC_MBA_V_S1_VALID 15 /* Side 1 for the bank is valid */
#define MC_MBA_V_PATTERN 16 /* Base address of the bank */
#define MC_MBA_V_TMG_SEL 28 /* Select timing register. */
/* ======================================================================
* = BIT FIELD VALUES FOR MBA REGISTERS (87.5000.0600 + n*80) =
* ======================================================================
*/
#define MC_MBA_V_ROW_TYPE_10X10 0 /* 10 row, 10 column */
#define MC_MBA_V_ROW_TYPE_12X10 1 /* 12 row, 10 column */
#define MC_MBA_V_ROW_TYPE_11X11 1 /* 11 row, 11 column */
#define MC_MBA_V_ROW_TYPE_13X11 2 /* 13 row, 11 column */
#define MC_MBA_V_ROW_TYPE_12X12 2 /* 12 row, 12 column */
#define MC_MBA_V_TMG_SEL_TMG0 0 /* Select timing register 0. */
#define MC_MBA_V_TMG_SEL_TMG1 1 /* Select timing register 1. */
#define MC_MBA_V_TMG_SEL_TMG2 2 /* Select timing register 2. */
/* ======================================================================
* = BIT SIZES FOR MBA REGISTERS (87.5000.0600 + n*80) =
* ======================================================================
*/
#define MC_MBA_S_S0_VALID 1
#define MC_MBA_S_ROW_TYPE 2
#define MC_MBA_S_MASK 5
#define MC_MBA_S_S1_VALID 1
#define MC_MBA_S_PATTERN 10
#define MC_MBA_S_TMG_SEL 2
/* ======================================================================
* = BIT MASKS FOR MBA REGISTERS (87.5000.0600 + n*80) =
* ======================================================================
*/
#define MC_MBA_M_S0_VALID (((1<<MC_MBA_S_S0_VALID)-1) << MC_MBA_V_S0_VALID)
#define MC_MBA_M_ROW_TYPE (((1<<MC_MBA_S_ROW_TYPE)-1) << MC_MBA_V_ROW_TYPE)
#define MC_MBA_M_MASK (((1<<MC_MBA_S_MASK)-1) << MC_MBA_V_MASK)
#define MC_MBA_M_S1_VALID (((1<<MC_MBA_S_S1_VALID)-1) << MC_MBA_V_S1_VALID)
#define MC_MBA_M_PATTERN (((1<<MC_MBA_S_PATTERN)-1) << MC_MBA_V_PATTERN)
#define MC_MBA_M_TMG_SEL (((1<<MC_MBA_S_TMG_SEL)-1) << MC_MBA_V_TMG_SEL)
#define cia_k_main_csr_base 0x0874 /* CIA General Control Register Base*/
#define cia_v_main_csr_base 28 /* Shift base by this # of bits */
/* Offsets from CIA control base register. */
#define hae_mem 0x0400
#define hae_io 0x0440
#define cia_err 0x8200
#define cia_err_mask 0x8280
#define cia_err_v_rcvd_mas_abt 7
#define cia_err_m_rcvd_mas_abt (1 << cia_err_v_rcvd_mas_abt)
#define cia_err_mask_v_mas_abt 7
#define cia_err_mask_m_mas_abt (1 << cia_err_mask_v_mas_abt)
#define cia_k_addr_trans 0x876 /* CIA's PCI Address Translation Regs*/
#define cia_v_addr_trans 28 /* Shift base by this # of bits */
/* Offsets from PCI address translation base register. Must be < 0x8000 */
/* if they are to be used with LDA instructions! */
#define w_base0 0x0400
#define w_mask0 0x0440
#define t_base0 0x0480
#define w_base1 0x0500
#define w_mask1 0x0540
#define t_base1 0x0580
#define w_base2 0x0600
#define w_mask2 0x0640
#define t_base2 0x0680
#define w_base3 0x0700
#define w_mask3 0x0740
#define t_base3 0x0780
#define w_v_en 0x0
#define w_m_en (1 << w_v_en)
/* CIA Memory Control Register. */
#define mcr 0
#define mba 0x600
#define mba_v_disp 0x7
#define mba_k_disp 0x80 /* 1 << mba_v_disp */
/* The following constants define which bits are provided by the HAE_MEM*/
/* register for each of the three sparse regions. */
#define hae_sp1_bits 0xE0000000
#define hae_sp2_bits 0xF8000000
#define hae_sp3_bits 0xFC000000
#endif /* __CIA_H_LOADED */

101
system/alpha/h/cserve.h
View file

@ -1,85 +1,32 @@
/*
Copyright 1993, 1994 Hewlett-Packard Development Company, L.P.
Permission is hereby granted, free of charge, to any person obtaining a copy of
this software and associated documentation files (the "Software"), to deal in
the Software without restriction, including without limitation the rights to
use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
of the Software, and to permit persons to whom the Software is furnished to do
so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in all
copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
*/
/*
* VID: [T1.2] PT: [Fri Apr 21 16:47:20 1995] SF: [cserve.h]
* TI: [/sae_users/cruz/bin/vice -iplatform.s -l// -p# -DEB164 -h -m -aeb164 ]
* Copyright 1993 Hewlett-Packard Development Company, L.P.
*
* Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use, copy,
* modify, merge, publish, distribute, sublicense, and/or sell copies
* of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
#define __CSERVE_LOADED 1
/*
*****************************************************************************
**
** FACILITY:
**
** DECchip 21164 OSF/1 PALcode
**
** MODULE:
**
** cserve.h
**
** MODULE DESCRIPTION:
**
** Platform specific cserve definitions.
**
** AUTHOR: ES
**
** CREATION DATE: 21-JUN-1994
**
** $Id: cserve.h,v 1.1.1.1 1997/10/30 23:27:18 verghese Exp $
**
** MODIFICATION HISTORY:
**
** $Log: cserve.h,v $
** Revision 1.1.1.1 1997/10/30 23:27:18 verghese
** current 10/29/97
**
** Revision 1.6 1995/04/03 17:29:52 samberg
** Add rd_bccfg_off
**
** Revision 1.5 1995/02/02 19:31:34 samberg
** Added WR_BCACHE, deleted WR_BCCFG and WR_BCCTL
**
** Revision 1.4 1994/12/08 17:13:34 samberg
** Add CSERVE_K_WR_BCCTL and CSERVE_K_WR_BCCFG
**
** Revision 1.3 1994/11/30 15:59:30 samberg
** Use c-style comments for c compiler use
**
** Revision 1.2 1994/11/22 19:02:46 samberg
** Add constants for ev4 backward compatibility
**
** Revision 1.2 1994/11/22 19:02:46 samberg
** Add constants for ev4 backward compatibility
**
** Revision 1.1 1994/07/08 17:01:40 samberg
** Initial revision
**
**
*/
/*
** Console Service (cserve) sub-function codes:
*/
* Console Service (cserve) sub-function codes:
*/
#define CSERVE_K_LDQP 0x01
#define CSERVE_K_STQP 0x02
#define CSERVE_K_JTOPAL 0x09

119
system/alpha/h/dc21164FromGasSources.h
View file

@ -1,105 +1,30 @@
/*
Copyright 1993 Hewlett-Packard Development Company, L.P.
Permission is hereby granted, free of charge, to any person obtaining a copy of
this software and associated documentation files (the "Software"), to deal in
the Software without restriction, including without limitation the rights to
use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
of the Software, and to permit persons to whom the Software is furnished to do
so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in all
copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
*/
* Copyright 1993 Hewlett-Packard Development Company, L.P.
*
* Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use, copy,
* modify, merge, publish, distribute, sublicense, and/or sell copies
* of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
#ifndef DC21164FROMGASSOURCES_INCLUDED
#define DC21164FROMGASSOURCES_INCLUDED 1
/*
**
** FACILITY:
**
** DECchip 21164 PALcode
**
** MODULE:
**
** dc21164.h
**
** MODULE DESCRIPTION:
**
** DECchip 21164 specific definitions
**
** AUTHOR: ER
**
** CREATION DATE: 24-Nov-1993
**
** $Id: dc21164FromGasSources.h,v 1.1.1.1 1997/10/30 23:27:19 verghese Exp $
**
** MODIFICATION HISTORY:
**
** $Log: dc21164FromGasSources.h,v $
** Revision 1.1.1.1 1997/10/30 23:27:19 verghese
** current 10/29/97
**
** Revision 1.1 1995/11/18 01:45:46 boyle
** Initial revision
**
** Revision 1.15 1995/04/21 02:06:30 fdh
** Replaced C++ style comments with Standard C style comments.
**
** Revision 1.14 1995/03/20 14:55:23 samberg
** Add flushIc to make Roger Cruz's life easier.
**
** Revision 1.13 1994/12/14 15:52:48 samberg
** Add slXmit and slRcv bit definitions
**
** Revision 1.12 1994/09/07 15:43:49 samberg
** Changes for Makefile.vpp, take out OSF definition
**
** Revision 1.11 1994/07/26 17:38:35 samberg
** Changes for SD164.
**
** Revision 1.10 1994/07/08 17:02:12 samberg
** Changes to support platform specific additions
**
** Revision 1.8 1994/05/31 15:49:21 ericr
** Moved ptKdebug from pt10 to pt13; pt10 is used in MCHK flows
**
** Revision 1.7 1994/05/26 19:29:51 ericr
** Added BC_CONFIG definitions
**
** Revision 1.6 1994/05/25 14:27:25 ericr
** Added physical bit to ldq_lp and stq_cp macros
**
** Revision 1.5 1994/05/20 18:07:50 ericr
** Changed line comments to C++ style comment character
**
** Revision 1.4 1994/01/17 21:46:54 ericr
** Added floating point register definitions
**
** Revision 1.3 1994/01/03 19:31:49 ericr
** Added cache parity error status register definitions
**
** Revision 1.2 1993/12/22 20:42:35 eric
** Added ptTrap, ptMisc and flag definitions
** Added PAL shadow regsiter definitions
**
** Revision 1.1 1993/12/16 21:55:05 eric
** Initial revision
**
**
**--
*/
/*
**
** INTERNAL PROCESSOR REGISTER DEFINITIONS

184
system/alpha/h/eb164.h
View file

@ -1,184 +0,0 @@
/*
Copyright 1993 Hewlett-Packard Development Company, L.P.
Permission is hereby granted, free of charge, to any person obtaining a copy of
this software and associated documentation files (the "Software"), to deal in
the Software without restriction, including without limitation the rights to
use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
of the Software, and to permit persons to whom the Software is furnished to do
so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in all
copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
*/
#ifndef __EB164_H_LOADED
#define __EB164_H_LOADED
/*
* $Id: eb164.h,v 1.1.1.1 1997/10/30 23:27:14 verghese Exp $;
*/
/*
* $Log: eb164.h,v $
* Revision 1.1.1.1 1997/10/30 23:27:14 verghese
* current 10/29/97
*
* Revision 1.3 1995/02/10 02:21:36 fdh
* Corrected EB164 banner.
*
* Revision 1.2 1994/12/07 21:24:58 cruz
* Added constant defining the maximum size of the BCache
*
* Revision 1.1 1994/11/23 19:47:30 cruz
* Initial revision
*
*
*/
#ifdef EB164
#define BANNER "DECchip 21164 Evaluation Board (EB164) Debug Monitor"
#define PROMPT "EB164> "
/****************************************************************************
* Basic *
****************************************************************************/
#define NEEDPCI
#define NEEDDEBUGGER
#define NEEDFLOPPY
/****************************************************************************
* CIA (Part of CIA) definitions *
****************************************************************************/
#include "cia.h"
/****************************************************************************
* Plug in cards, what does it have? *
****************************************************************************/
/*
* The Allied Telesis card is an ISA card based on the am79c960
* chip.
*/
#define ALLIED_TELESIS_AT_1500T
/*
* The DEC Etherworks ISA card is a LANCE like device.
*/
#define DEC_ETHERWORKS
#define NEED21040
/****************************************************************************
* ISA Address Space *
****************************************************************************/
#define RTCBASE 0x70
#define LEDPORT 0x80 /* JDR Microdevices P.O.S.T. Diagnostics Card. */
/*
* Allied telesis is optional. We treat it like an optional
* am79c960 as far as the driver is concerned, see /h/am79c960.h
* for more definitions and /ether/am79c960_device.c for the device
* driver.
*/
#ifdef ALLIED_TELESIS_AT_1500T
#define OPTIONAL_AM79C960 /* warning only define this once - kmc */
#define NEEDAM79C960 /* same for this */
#define OPTIONAL_AM79C960_BASE 0x360
#define OPTIONAL_AM79C960_INT 9
/*
* This parameter determines the
* DMA Mask for the DMA2 controller.
* Mask Channel
* ---- -------
* 1 5
* 2 6
* 3 7
* 4 8
*/
#define OPTIONAL_AM79C960_DMA 1 /* Selects DMA Channel 5 */
#endif
#ifdef DEC_ETHERWORKS
#define DEC_ETHERWORKS_BASE 0x300
#endif
#ifdef DEC_ETHERWORKS
#define DEC_ETHERWORKS_BASE 0x300
#endif
/****************************************************************************
* System Address Space *
****************************************************************************/
#define MINIMUM_SYSTEM_MEMORY 0x1000000 /* 16MB */
#define MAXIMUM_SYSTEM_CACHE 0x800000 /* 8MB */
#define DMA_BUFF_BASE 0x100000
/****************************************************************************
* PCI I/O Address Space *
****************************************************************************/
/*
* Definitions for the windows mapping PCI addresses into
* system addresses
*
* 16 megabyte window starting at CPU address = 0.
*/
#define PCI_BASE_1_USED 1
#define PCI_BASE_1 0x000100000
#define PCI_MASK_1 0x000000000
#define PCI_TBASE_1 0x000100000
#define PCI_BASE_2_USED 0
#define PCI_BASE_2 0x000000000
#define PCI_MASK_2 0x000000000
#define PCI_TBASE_2 0x000000000
#define PCI_BASE_3_USED 0
#define PCI_BASE_3 0x000000000
#define PCI_MASK_3 0x000000000
#define PCI_TBASE_3 0x000000000
#define PCI_BASE_4_USED 0
#define PCI_BASE_4 0x000000000
#define PCI_MASK_4 0x00000000
#define PCI_TBASE_4 0x000000000
/*
* Each mask translates to a number of these units. For
* APECS this unit is 1Kbyte.
*/
#define PCI_MASK_UNIT 0x100000
/*
* Where do we start allocating addresses from in PCI I/O space?
*/
#define PCI_IO_BASE 0xB000
/*
* ROM definitions.
*/
#define NEEDFLASHMEMORY
#define INTEL_28F008SA
#define ROMBASE 0xFFF80000
#define ROMSIZE 0x100000
#define ROMINC 0x1
#endif /* EB164 */
#endif /* __EB164_H_LOADED */

201
system/alpha/h/ev5_alpha_defs.h
View file

@ -1,24 +1,26 @@
/*
Copyright 1993 Hewlett-Packard Development Company, L.P.
Permission is hereby granted, free of charge, to any person obtaining a copy of
this software and associated documentation files (the "Software"), to deal in
the Software without restriction, including without limitation the rights to
use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
of the Software, and to permit persons to whom the Software is furnished to do
so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in all
copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
*/
* Copyright 1993 Hewlett-Packard Development Company, L.P.
*
* Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use, copy,
* modify, merge, publish, distribute, sublicense, and/or sell copies
* of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
#ifndef EV5_ALPHA_DEFS_INCLUDED
#define EV5_ALPHA_DEFS_INCLUDED 1
@ -26,24 +28,19 @@ SOFTWARE.
// from ev5_alpha_defs.mar from Lance's fetch directory
// Lower-caseified and $ signs removed ... pb Nov/95
// .MACRO _ALPHADEFS
// ALPHADEF_VER == 6 ; Flag the version number of this file.
// .ENDM
// .MACRO _PSDEF,_GBL
// _DEFINI PS,_GBL
//;+
//; PS Layout - PS
//; Loc Size name function
//; ------ ------ ______ -----------------------------------
//; <31:29> 3 SA stack alignment
//; <31:13> 24 RES Reserved MBZ
//; <12:8> 5 IPL Priority level
//; <7> 1 VMM Virtual Mach Monitor
//; <6:5> 2 RES Reserved MBZ
//; <4:3> 2 CM Current Mode
//; <2> 1 IP Interrupt Pending
//; <1:0> 2 SW Software bits
//;-
//
// PS Layout - PS
// Loc Size name function
// ------ ------ ______ -----------------------------------
// <31:29> 3 SA stack alignment
// <31:13> 24 RES Reserved MBZ
// <12:8> 5 IPL Priority level
// <7> 1 VMM Virtual Mach Monitor
// <6:5> 2 RES Reserved MBZ
// <4:3> 2 CM Current Mode
// <2> 1 IP Interrupt Pending
// <1:0> 2 SW Software bits
//
#define ps_v_sw 0
#define ps_m_sw (3<<ps_v_sw)
@ -101,33 +98,29 @@ SOFTWARE.
#define ps_c_ipl30 (0x1E00)
#define ps_c_ipl31 (0x1F00)
// _DEFEND PS,_GBL,DEF
// .ENDM
//;+
//; PTE layout - symbol prefix PTE_
//;
//; Loc Size name function
//; ------ ------ ------ -----------------------------------
//; <63:32> 32 PFN Page Frame Number
//; <31:16> 16 SOFT Bits reserved for software use
//; <15> 1 UWE User write enable
//; <14> 1 SWE Super write enable
//; <13> 1 EWE Exec write enable
//; <12> 1 KWE Kernel write enable
//; <11> 1 URE User read enable
//; <10> 1 SRE Super read enable
//; <9> 1 ERE Exec read enable
//; <8> 1 KRE Kernel read enable
//; <7:6> 2 RES Reserved SBZ
//; <5> 1 HPF Huge Page Flag
//; <4> 1 ASM Wild card address space number match
//; <3> 1 FOE Fault On execute
//; <2> 1 FOW Fault On Write
//; <1> 1 FOR Fault On Read
//; <0> 1 V valid bit
//;-
// .MACRO _PTEDEF,_GBL
// _DEFINI PTE,_GBL
//
// PTE layout - symbol prefix PTE_
//
// Loc Size name function
// ------ ------ ------ -----------------------------------
// <63:32> 32 PFN Page Frame Number
// <31:16> 16 SOFT Bits reserved for software use
// <15> 1 UWE User write enable
// <14> 1 SWE Super write enable
// <13> 1 EWE Exec write enable
// <12> 1 KWE Kernel write enable
// <11> 1 URE User read enable
// <10> 1 SRE Super read enable
// <9> 1 ERE Exec read enable
// <8> 1 KRE Kernel read enable
// <7:6> 2 RES Reserved SBZ
// <5> 1 HPF Huge Page Flag
// <4> 1 ASM Wild card address space number match
// <3> 1 FOE Fault On execute
// <2> 1 FOW Fault On Write
// <1> 1 FOR Fault On Read
// <0> 1 V valid bit
//
#define pte_v_pfn 32
#define pte_m_soft (0xFFFF0000)
@ -161,20 +154,16 @@ SOFTWARE.
#define pte_m_v (0x0001)
#define pte_v_v 0
// _DEFEND PTE,_GBL,DEF
// .ENDM
//;+
//; VA layout - symbol prefix VA_
//;
//; Loc Size name function
//; ------ ------ ------- -----------------------------------
//; <42:33> 10 SEG1 First seg table offset for mapping
//; <32:23> 10 SEG2 Second seg table offset for mapping
//; <22:13> 10 SEG3 Third seg table offset for mapping
//; <12:0> 13 OFFSET Byte within page
//;-
// .MACRO _VADEF,_GBL
// _DEFINI VA,_GBL
//
// VA layout - symbol prefix VA_
//
// Loc Size name function
// ------ ------ ------- -----------------------------------
// <42:33> 10 SEG1 First seg table offset for mapping
// <32:23> 10 SEG2 Second seg table offset for mapping
// <22:13> 10 SEG3 Third seg table offset for mapping
// <12:0> 13 OFFSET Byte within page
//
#define va_m_offset (0x000000001FFF)
#define va_v_offset 0
@ -185,13 +174,9 @@ SOFTWARE.
#define va_m_seg1 (0x7FE00000000)
#define va_v_seg1 33
// _DEFEND VA,_GBL,DEF
// .ENDM
//;+
//; PRIVILEGED CONTEXT BLOCK (PCB)
//;-
// .MACRO _PCBDEF,_GBL
// _DEFINI PCB,_GBL
//
//PRIVILEGED CONTEXT BLOCK (PCB)
//
#define pcb_q_ksp 0
#define pcb_q_esp 8
#define pcb_q_ssp 16
@ -211,13 +196,9 @@ SOFTWARE.
#define pcb_v_dat 63
#define pcb_v_pme 62
// _DEFEND PCB,_GBL,DEF
// .ENDM
//;+
//; SYSTEM CONTROL BLOCK (SCB)
//;-
// .MACRO _SCBDEF,_GBL
// _DEFINI SCB,_GBL
//
// SYSTEM CONTROL BLOCK (SCB)
//
#define scb_v_fen (0x0010)
#define scb_v_acv (0x0080)
@ -266,13 +247,9 @@ SOFTWARE.
#define scb_v_procmchk (0x0670)
#define scb_v_passive_rel (0x06F0)
// _DEFEND SCB,_GBL,DEF
// .ENDM
//;+
//; Stack frame (FRM)
//;-
// .MACRO _FRMDEF,_GBL
// _DEFINI FRM,_GBL
//
// Stack frame (FRM)
//
#define frm_v_r2 (0x0000)
#define frm_v_r3 (0x0008)
@ -283,13 +260,9 @@ SOFTWARE.
#define frm_v_pc (0x0030)
#define frm_v_ps (0x0038)
// _DEFEND FRM,_GBL,DEF
// .ENDM
//;+
//; Exeception summary register (EXS)
//;-
// .MACRO _EXSDEF,_GBL
// _DEFINI EXS,_GBL
//
// Exeception summary register (EXS)
//
// exs_v_swc <0> ; Software completion
// exs_v_inv <1> ; Ivalid operation
// exs_v_dze <2> ; Div by zero
@ -313,13 +286,9 @@ SOFTWARE.
#define exs_m_ine (1<<exs_v_ine)
#define exs_m_iov (1<<exs_v_iov)
// _defend exs,_gbl,def
// .endm
//;+
//; machine check error summary register (mces)
//;-
// .macro _mcesdef,_gbl
// _defini mces,_gbl
//
// machine check error summary register (mces)
//
// mces_v_mchk <0> ; machine check in progress
// mces_v_sce <1> ; system correctable error
// mces_v_pce <2> ; processor correctable error
@ -337,9 +306,5 @@ SOFTWARE.
#define mces_m_dpc (1<<mces_v_dpc)
#define mces_m_dsc (1<<mces_v_dsc)
#define mces_m_all ((1<<mces_v_mchk) | (1<<mces_v_sce) | (1<<mces_v_pce) | (1<<mces_v_dpc) | (1<<mces_v_dsc))
// _defend mces,_gbl,def
// .endm
#endif

67
system/alpha/h/ev5_defs.h
View file

@ -1,55 +1,52 @@
/*
Copyright 1995 Hewlett-Packard Development Company, L.P.
Permission is hereby granted, free of charge, to any person obtaining a copy of
this software and associated documentation files (the "Software"), to deal in
the Software without restriction, including without limitation the rights to
use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
of the Software, and to permit persons to whom the Software is furnished to do
so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in all
copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
*/
* Copyright 1995 Hewlett-Packard Development Company, L.P.
*
* Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use, copy,
* modify, merge, publish, distribute, sublicense, and/or sell copies
* of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
#ifndef EV5_DEFS_INCLUDED
#define EV5_DEFS_INCLUDED 1
// adapted from the version emailed to lance..pb Nov/95
// ********************************************************************************************************************************
// Created 25-JUL-1995 14:21:23 by VAX SDL V3.2-12 Source: 21-JUL-1995 11:03:08 EV5$:[EV5.DVT.SUP]EV5_DEFS.SDL;24
// ********************************************************************************************************************************
// .MACRO $EV5DEF,..EQU=<=>,..COL=<:>
// EV5$K_REVISION'..equ'34
// In the definitions below, registers are annotated with one of the following
// symbols:
// In the definitions below, registers are annotated with one of the
// following symbols:
//
// RW - The register may be read and written
// RW - The register may be read and written
// RO - The register may only be read
// WO - The register may only be written
//
// For RO and WO registers, all bits and fields within the register are also
// read-only or write-only. For RW registers, each bit or field within
// the register is annotated with one of the following:
// For RO and WO registers, all bits and fields within the register
// are also read-only or write-only. For RW registers, each bit or
// field within the register is annotated with one of the following:
//
// RW - The bit/field may be read and written
// RO - The bit/field may be read; writes are ignored
// WO - The bit/field may be written; reads return an UNPREDICTABLE result.
// WO - The bit/field may be written; reads return an UNPREDICTABLE result
// WZ - The bit/field may be written; reads return a 0
// WC - The bit/field may be read; writes cause state to clear
// RC - The bit/field may be read, which also causes state to clear; writes are ignored
// RC - The bit/field may be read, which also causes state to clear;
// writes are ignored
// Architecturally-defined (SRM) registers for EVMS
#define pt0 320
#define pt1 321
#define pt2 322

485
system/alpha/h/ev5_impure.h
View file

@ -1,59 +1,64 @@
/*
Copyright 1993 Hewlett-Packard Development Company, L.P.
Permission is hereby granted, free of charge, to any person obtaining a copy of
this software and associated documentation files (the "Software"), to deal in
the Software without restriction, including without limitation the rights to
use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
of the Software, and to permit persons to whom the Software is furnished to do
so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in all
copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
*/
* Copyright 1993 Hewlett-Packard Development Company, L.P.
*
* Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use, copy,
* modify, merge, publish, distribute, sublicense, and/or sell copies
* of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
#ifndef EV5_IMPURE_INCLUDED
#define EV5_IMPURE_INCLUDED
/*
// This uses the Hudson file format from "impure.h" but with the fields from
// the distrubuted palcode "ev5_impure.sdl" .. pboyle Nov/95
//orig file: impure.sdl
//orig
//orig Abstract: PAL impure scratch area and logout area data structure definitions for
//orig Alpha firmware.
//orig
//orig
//orig module $pal_impure;
//orig
//orig Edit Date Who Description
//orig ---- --------- --- ---------------------
//orig 1 7-Jul-93 JEM Initial Entry
//orig 2 18-nov-93 JEM Add shadow bc_ctl and pmctr_ctl to impure area
//orig Delete mvptbr
//orig Calculate pal$logout from end of impure area
//orig 3 6-dec-93 JEM Add pmctr_ctl bitfield definitions
//orig 4 3-feb-94 JEM Remove f31,r31 from impure area; Remove bc_ctl, pmctr_ctl;
//orig add ic_perr_stat, pmctr, dc_perr_stat, sc_stat, sc_addr, sc_ctl,
//orig bc_tag_addr, ei_stat, ei_addr, fill_syn, ld_lock
//orig 5 19-feb-94 JEM add gpr constants, and add f31,r31 back in to be consistent with ev4
//orig add cns$ipr_offset
//orig 6 18-apr-94 JEM Add shadow bc_ctl and pmctr_ctl to impure area again.
//orig 7 18-jul-94 JEM Add bc_config shadow. Add mchk$sys_base constant to mchk logout frame
//orig
//orig
//orig constant REVISION equals 7 prefix IMPURE$; // Revision number of this file
// file: impure.sdl
//
// PAL impure scratch area and logout area data structure definitions for
// Alpha firmware.
//
//
// module $pal_impure;
//
// Edit Date Who Description
// ---- --------- --- ---------------------
// 1 7-Jul-93 JEM Initial Entry
// 2 18-nov-93 JEM Add shadow bc_ctl and pmctr_ctl to impure area
// Delete mvptbr
// Calculate pal$logout from end of impure area
// 3 6-dec-93 JEM Add pmctr_ctl bitfield definitions
// 4 3-feb-94 JEM Remove f31,r31 from impure area; Remove bc_ctl,
// pmctr_ctl; add ic_perr_stat, pmctr, dc_perr_stat,
// sc_stat, sc_addr, sc_ctl, bc_tag_addr, ei_stat,
// ei_addr, fill_syn, ld_lock
// 5 19-feb-94 JEM add gpr constants, and add f31,r31 back in to be
// consistent with ev4
// add cns$ipr_offset
// 6 18-apr-94 JEM Add shadow bc_ctl and pmctr_ctl to impure area again.
// 7 18-jul-94 JEM Add bc_config shadow. Add mchk$sys_base constant
// to mchk logout frame
//
//
// constant REVISION equals 7 prefix IMPURE$; // Revision number of this file
//orig
/*
** Macros for saving/restoring data to/from the PAL impure scratch
** area.
**
@ -73,34 +78,6 @@ SOFTWARE.
** macros will auto-magically adjust the offsets accordingly.
**
*/
#if 0
#define SAVE_GPR(reg,offset,base) \
stq_p reg, ((offset-0x200)&0x3FF)(base)
#define RESTORE_GPR(reg,offset,base) \
ldq_p reg, ((offset-0x200)&0x3FF)(base)
#define SAVE_FPR(reg,offset,base) \
stt reg, ((offset-0x200)&0x3FF)(base)
#define RESTORE_FPR(reg,offset,base) \
ldt reg, ((offset-0x200)&0x3FF)(base)
#define SAVE_IPR(reg,offset,base) \
mfpr v0, reg; \
stq_p v0, ((offset-CNS_Q_IPR)&0x3FF)(base)
#define RESTORE_IPR(reg,offset,base) \
ldq_p v0, ((offset-CNS_Q_IPR)&0x3FF)(base); \
mtpr v0, reg
#define SAVE_SHADOW(reg,offset,base) \
stq_p reg, ((offset-CNS_Q_IPR)&0x3FF)(base)
#define RESTORE_SHADOW(reg,offset,base)\
ldq_p reg, ((offset-CNS_Q_IPR)&0x3FF)(base)
#else
//#define SEXT10(X) (((X) & 0x200) ? ((X) | 0xfffffffffffffc00) : (X))
#define SEXT10(X) ((X) & 0x3ff)
//#define SEXT10(X) (((X) << 55) >> 55)
@ -131,13 +108,13 @@ SOFTWARE.
#define RESTORE_SHADOW(reg,offset,base)\
ldq_p reg, (SEXT10(offset-CNS_Q_IPR))(base)
#endif
/* orig Structure of the processor-specific impure area */
/* orig aggregate impure struct prefix "" tag "";
* orig cns$flag quadword;
* orig cns$hlt quadword;
*/
/* Structure of the processor-specific impure area */
/* aggregate impure struct prefix "" tag "";
* cns$flag quadword;
* cns$hlt quadword;
*/
/* Define base for debug monitor compatibility */
#define CNS_Q_BASE 0x000
@ -145,138 +122,140 @@ SOFTWARE.
#define CNS_Q_HALT 0x108
/* orig constant (
* orig cns$r0,cns$r1,cns$r2,cns$r3,cns$r4,cns$r5,cns$r6,cns$r7,
* orig cns$r8,cns$r9,cns$r10,cns$r11,cns$r12,cns$r13,cns$r14,cns$r15,
* orig cns$r16,cns$r17,cns$r18,cns$r19,cns$r20,cns$r21,cns$r22,cns$r23,
* orig cns$r24,cns$r25,cns$r26,cns$r27,cns$r28,cns$r29,cns$r30,cns$r31
* orig ) equals . increment 8 prefix "" tag "";
* orig cns$gpr quadword dimension 32;
*/
/* constant (
* cns$r0,cns$r1,cns$r2,cns$r3,cns$r4,cns$r5,cns$r6,cns$r7,
* cns$r8,cns$r9,cns$r10,cns$r11,cns$r12,cns$r13,cns$r14,cns$r15,
* cns$r16,cns$r17,cns$r18,cns$r19,cns$r20,cns$r21,cns$r22,cns$r23,
* cns$r24,cns$r25,cns$r26,cns$r27,cns$r28,cns$r29,cns$r30,cns$r31
* ) equals . increment 8 prefix "" tag "";
* cns$gpr quadword dimension 32;
*/
/* Offset to base of saved GPR area - 32 quadword */
#define CNS_Q_GPR 0x110
#define cns_gpr CNS_Q_GPR
/* orig constant (
* orig cns$f0,cns$f1,cns$f2,cns$f3,cns$f4,cns$f5,cns$f6,cns$f7,
* orig cns$f8,cns$f9,cns$f10,cns$f11,cns$f12,cns$f13,cns$f14,cns$f15,
* orig cns$f16,cns$f17,cns$f18,cns$f19,cns$f20,cns$f21,cns$f22,cns$f23,
* orig cns$f24,cns$f25,cns$f26,cns$f27,cns$f28,cns$f29,cns$f30,cns$f31
* orig ) equals . increment 8 prefix "" tag "";
* orig cns$fpr quadword dimension 32;
*/
/* constant (
* cns$f0,cns$f1,cns$f2,cns$f3,cns$f4,cns$f5,cns$f6,cns$f7,
* cns$f8,cns$f9,cns$f10,cns$f11,cns$f12,cns$f13,cns$f14,cns$f15,
* cns$f16,cns$f17,cns$f18,cns$f19,cns$f20,cns$f21,cns$f22,cns$f23,
* cns$f24,cns$f25,cns$f26,cns$f27,cns$f28,cns$f29,cns$f30,cns$f31
* ) equals . increment 8 prefix "" tag "";
* cns$fpr quadword dimension 32;
*/
/* Offset to base of saved FPR area - 32 quadwords */
#define CNS_Q_FPR 0x210
/* orig #t=.;
* orig cns$mchkflag quadword;
*/
/* #t=.;
* cns$mchkflag quadword;
*/
#define CNS_Q_MCHK 0x310
/* orig constant cns$pt_offset equals .;
* orig constant (
* orig cns$pt0,cns$pt1,cns$pt2,cns$pt3,cns$pt4,cns$pt5,cns$pt6,
* orig cns$pt7,cns$pt8,cns$pt9,cns$pt10,cns$pt11,cns$pt12,cns$pt13,
* orig cns$pt14,cns$pt15,cns$pt16,cns$pt17,cns$pt18,cns$pt19,cns$pt20,
* orig cns$pt21,cns$pt22,cns$pt23
* orig ) equals . increment 8 prefix "" tag "";
* orig cns$pt quadword dimension 24;
*/
/* constant cns$pt_offset equals .;
* constant (
* cns$pt0,cns$pt1,cns$pt2,cns$pt3,cns$pt4,cns$pt5,cns$pt6,
* cns$pt7,cns$pt8,cns$pt9,cns$pt10,cns$pt11,cns$pt12,cns$pt13,
* cns$pt14,cns$pt15,cns$pt16,cns$pt17,cns$pt18,cns$pt19,cns$pt20,
* cns$pt21,cns$pt22,cns$pt23
* ) equals . increment 8 prefix "" tag "";
* cns$pt quadword dimension 24;
*/
/* Offset to base of saved PALtemp area - 25 quadwords */
#define CNS_Q_PT 0x318
/* orig cns$shadow8 quadword;
* orig cns$shadow9 quadword;
* orig cns$shadow10 quadword;
* orig cns$shadow11 quadword;
* orig cns$shadow12 quadword;
* orig cns$shadow13 quadword;
* orig cns$shadow14 quadword;
* orig cns$shadow25 quadword;
*/
/* cns$shadow8 quadword;
* cns$shadow9 quadword;
* cns$shadow10 quadword;
* cns$shadow11 quadword;
* cns$shadow12 quadword;
* cns$shadow13 quadword;
* cns$shadow14 quadword;
* cns$shadow25 quadword;
*/
/* Offset to base of saved PALshadow area - 8 quadwords */
#define CNS_Q_SHADOW 0x3D8
/* Offset to base of saved IPR area */
#define CNS_Q_IPR 0x418
/* orig constant cns$ipr_offset equals .; */
/* orig cns$exc_addr quadword; */
/* constant cns$ipr_offset equals .; */
/* cns$exc_addr quadword; */
#define CNS_Q_EXC_ADDR 0x418
/* orig cns$pal_base quadword; */
/* cns$pal_base quadword; */
#define CNS_Q_PAL_BASE 0x420
/* orig cns$mm_stat quadword; */
/* cns$mm_stat quadword; */
#define CNS_Q_MM_STAT 0x428
/* orig cns$va quadword; */
/* cns$va quadword; */
#define CNS_Q_VA 0x430
/* orig cns$icsr quadword; */
/* cns$icsr quadword; */
#define CNS_Q_ICSR 0x438
/* orig cns$ipl quadword; */
/* cns$ipl quadword; */
#define CNS_Q_IPL 0x440
/* orig cns$ps quadword; // Ibox current mode */
/* cns$ps quadword; // Ibox current mode */
#define CNS_Q_IPS 0x448
/* orig cns$itb_asn quadword; */
/* cns$itb_asn quadword; */
#define CNS_Q_ITB_ASN 0x450
/* orig cns$aster quadword; */
/* cns$aster quadword; */
#define CNS_Q_ASTER 0x458
/* orig cns$astrr quadword; */
/* cns$astrr quadword; */
#define CNS_Q_ASTRR 0x460
/* orig cns$isr quadword; */
/* cns$isr quadword; */
#define CNS_Q_ISR 0x468
/* orig cns$ivptbr quadword; */
/* cns$ivptbr quadword; */
#define CNS_Q_IVPTBR 0x470
/* orig cns$mcsr quadword; */
/* cns$mcsr quadword; */
#define CNS_Q_MCSR 0x478
/* orig cns$dc_mode quadword; */
/* cns$dc_mode quadword; */
#define CNS_Q_DC_MODE 0x480
/* orig cns$maf_mode quadword; */
/* cns$maf_mode quadword; */
#define CNS_Q_MAF_MODE 0x488
/* orig cns$sirr quadword; */
/* cns$sirr quadword; */
#define CNS_Q_SIRR 0x490
/* orig cns$fpcsr quadword; */
/* cns$fpcsr quadword; */
#define CNS_Q_FPCSR 0x498
/* orig cns$icperr_stat quadword; */
/* cns$icperr_stat quadword; */
#define CNS_Q_ICPERR_STAT 0x4A0
/* orig cns$pmctr quadword; */
/* cns$pmctr quadword; */
#define CNS_Q_PM_CTR 0x4A8
/* orig cns$exc_sum quadword; */
/* cns$exc_sum quadword; */
#define CNS_Q_EXC_SUM 0x4B0
/* orig cns$exc_mask quadword; */
/* cns$exc_mask quadword; */
#define CNS_Q_EXC_MASK 0x4B8
/* orig cns$intid quadword; */
/* cns$intid quadword; */
#define CNS_Q_INT_ID 0x4C0
/* orig cns$dcperr_stat quadword; */
/* cns$dcperr_stat quadword; */
#define CNS_Q_DCPERR_STAT 0x4C8
/* orig cns$sc_stat quadword; */
/* cns$sc_stat quadword; */
#define CNS_Q_SC_STAT 0x4D0
/* orig cns$sc_addr quadword; */
/* cns$sc_addr quadword; */
#define CNS_Q_SC_ADDR 0x4D8
/* orig cns$sc_ctl quadword; */
/* cns$sc_ctl quadword; */
#define CNS_Q_SC_CTL 0x4E0
/* orig cns$bc_tag_addr quadword; */
/* cns$bc_tag_addr quadword; */
#define CNS_Q_BC_TAG_ADDR 0x4E8
/* orig cns$ei_stat quadword; */
/* cns$ei_stat quadword; */
#define CNS_Q_EI_STAT 0x4F0
/* orig cns$ei_addr quadword; */
/* cns$ei_addr quadword; */
#define CNS_Q_EI_ADDR 0x4F8
/* orig cns$fill_syn quadword; */
/* cns$fill_syn quadword; */
#define CNS_Q_FILL_SYN 0x500
/* orig cns$ld_lock quadword; */
/* cns$ld_lock quadword; */
#define CNS_Q_LD_LOCK 0x508
/* orig cns$bc_ctl quadword; // shadow of on chip bc_ctl */
/* cns$bc_ctl quadword; // shadow of on chip bc_ctl */
#define CNS_Q_BC_CTL 0x510
/* orig cns$pmctr_ctl quadword; // saved frequency select info for performance monitor counter */
/* cns$pmctr_ctl quadword; // saved frequency select info for performance monitor counter */
#define CNS_Q_PM_CTL 0x518
/* orig cns$bc_config quadword; // shadow of on chip bc_config */
/* cns$bc_config quadword; // shadow of on chip bc_config */
#define CNS_Q_BC_CFG 0x520
/* orig constant cns$size equals .;
* orig
* orig constant pal$impure_common_size equals (%x0200 +7) & %xfff8;
* orig constant pal$impure_specific_size equals (.+7) & %xfff8;
* orig constant cns$mchksize equals (.+7-#t) & %xfff8;
* orig constant pal$logout_area equals pal$impure_specific_size ;
* orig end impure;
/* constant cns$size equals .;
*
* constant pal$impure_common_size equals (%x0200 +7) & %xfff8;
* constant pal$impure_specific_size equals (.+7) & %xfff8;
* constant cns$mchksize equals (.+7-#t) & %xfff8;
* constant pal$logout_area equals pal$impure_specific_size ;
* end impure;
*/
/* This next set of stuff came from the old code ..pb */
@ -295,56 +274,54 @@ SOFTWARE.
/* orig
* orig aggregate EV5PMCTRCTL_BITS structure fill prefix PMCTR_CTL$;
* orig SPROCESS bitfield length 1 ;
* orig FILL_0 bitfield length 3 fill tag $$;
* orig FRQ2 bitfield length 2 ;
* orig FRQ1 bitfield length 2 ;
* orig FRQ0 bitfield length 2 ;
* orig CTL2 bitfield length 2 ;
* orig CTL1 bitfield length 2 ;
* orig CTL0 bitfield length 2 ;
* orig FILL_1 bitfield length 16 fill tag $$;
* orig FILL_2 bitfield length 32 fill tag $$;
* orig end EV5PMCTRCTL_BITS;
* orig
* orig end_module $pal_impure;
* orig
* orig module $pal_logout;
* orig
* orig //
* orig // Start definition of Corrected Error Frame
* orig //
/*
* aggregate EV5PMCTRCTL_BITS structure fill prefix PMCTR_CTL$;
* SPROCESS bitfield length 1 ;
* FILL_0 bitfield length 3 fill tag $$;
* FRQ2 bitfield length 2 ;
* FRQ1 bitfield length 2 ;
* FRQ0 bitfield length 2 ;
* CTL2 bitfield length 2 ;
* CTL1 bitfield length 2 ;
* CTL0 bitfield length 2 ;
* FILL_1 bitfield length 16 fill tag $$;
* FILL_2 bitfield length 32 fill tag $$;
* end EV5PMCTRCTL_BITS;
*
* end_module $pal_impure;
*
* module $pal_logout;
*
* //
* // Start definition of Corrected Error Frame
* //
*/
/*
* orig aggregate crd_logout struct prefix "" tag "";
* aggregate crd_logout struct prefix "" tag "";
*/
#ifdef SIMOS
#define pal_logout_area 0x600
#define mchk_crd_base 0
#endif
/* orig mchk$crd_flag quadword; */
/* mchk$crd_flag quadword; */
#define mchk_crd_flag 0
/* orig mchk$crd_offsets quadword; */
/* mchk$crd_offsets quadword; */
#define mchk_crd_offsets 8
/* orig
* orig // Pal-specific information */
/*
* // Pal-specific information */
#define mchk_crd_mchk_code 0x10
/* orig mchk$crd_mchk_code quadword;
* orig
* orig // CPU-specific information
* orig constant mchk$crd_cpu_base equals . ;
* orig mchk$crd_ei_addr quadword; */
/* mchk$crd_mchk_code quadword;
*
* // CPU-specific information
* constant mchk$crd_cpu_base equals . ;
* mchk$crd_ei_addr quadword; */
#define mchk_crd_ei_addr 0x18
/* orig mchk$crd_fill_syn quadword; */
/* mchk$crd_fill_syn quadword; */
#define mchk_crd_fill_syn 0x20
/* orig mchk$crd_ei_stat quadword; */
/* mchk$crd_ei_stat quadword; */
#define mchk_crd_ei_stat 0x28
/* orig mchk$crd_isr quadword; */
/* mchk$crd_isr quadword; */
#define mchk_crd_isr 0x30
/*
@ -362,7 +339,6 @@ SOFTWARE.
#define mchk_crd_rsvd 0x70
#ifdef SIMOS
/*
* mchk area seems different for tlaser
*/
@ -376,70 +352,65 @@ SOFTWARE.
#define mchk_tlepmerr 0x18
#endif
/* orig
* orig // System-specific information
* orig constant mchk$crd_sys_base equals . ;
* orig constant mchk$crd_size equals (.+7) & %xfff8;
* orig
* orig end crd_logout;
* orig //
* orig // Start definition of Machine check logout Frame
* orig //
* orig aggregate logout struct prefix "" tag "";
* orig mchk$flag quadword; */
/* orig mchk$offsets quadword; */
/* orig
* orig // Pal-specific information
* orig mchk$mchk_code quadword; */
/*
* // System-specific information
* constant mchk$crd_sys_base equals . ;
* constant mchk$crd_size equals (.+7) & %xfff8;
*
* end crd_logout;
* //
* // Start definition of Machine check logout Frame
* //
* aggregate logout struct prefix "" tag "";
* mchk$flag quadword; */
/* mchk$offsets quadword; */
/*
* // Pal-specific information
* mchk$mchk_code quadword; */
/*
* orig mchk$pt quadword dimension 24;
* orig
* orig // CPU-specific information
* orig constant mchk$cpu_base equals . ;
* orig mchk$exc_addr quadword;
* orig mchk$exc_sum quadword;
* orig mchk$exc_mask quadword;
* orig mchk$pal_base quadword;
* orig mchk$isr quadword;
* orig mchk$icsr quadword;
* orig mchk$ic_perr_stat quadword;
* orig mchk$dc_perr_stat quadword;
* orig mchk$va quadword;
* orig mchk$mm_stat quadword;
* orig mchk$sc_addr quadword;
* orig mchk$sc_stat quadword;
* orig mchk$bc_tag_addr quadword;
* orig mchk$ei_addr quadword;
* orig mchk$fill_syn quadword;
* orig mchk$ei_stat quadword;
* orig mchk$ld_lock quadword;
* orig
* orig // System-specific information
* orig
* orig constant mchk$sys_base equals . ;
* orig mchk$sys_ipr1 quadword ; // Holder for system-specific stuff
* orig
* orig constant mchk$size equals (.+7) & %xfff8;
* orig
* orig
* orig constant mchk$crd_base equals 0 ;
* orig constant mchk$mchk_base equals mchk$crd_size ;
* orig
* orig
* orig end logout;
* orig
* orig end_module $pal_logout;
* mchk$pt quadword dimension 24;
*
* // CPU-specific information
* constant mchk$cpu_base equals . ;
* mchk$exc_addr quadword;
* mchk$exc_sum quadword;
* mchk$exc_mask quadword;
* mchk$pal_base quadword;
* mchk$isr quadword;
* mchk$icsr quadword;
* mchk$ic_perr_stat quadword;
* mchk$dc_perr_stat quadword;
* mchk$va quadword;
* mchk$mm_stat quadword;
* mchk$sc_addr quadword;
* mchk$sc_stat quadword;
* mchk$bc_tag_addr quadword;
* mchk$ei_addr quadword;
* mchk$fill_syn quadword;
* mchk$ei_stat quadword;
* mchk$ld_lock quadword;
*
* // System-specific information
*
* constant mchk$sys_base equals . ;
* mchk$sys_ipr1 quadword ; // Holder for system-specific stuff
*
* constant mchk$size equals (.+7) & %xfff8;
*
*
* constant mchk$crd_base equals 0 ;
* constant mchk$mchk_base equals mchk$crd_size ;
*
*
* end logout;
*
* end_module $pal_logout;
*/
/* this is lingering in the old ladbx code but looks like it was from ev4 days.
* This was 0x160 in the old days..pb
*/
/*
* this is lingering in the old ladbx code but looks like it was from
* ev4 days. This was 0x160 in the old days..pb
*/
#define LAF_K_SIZE MACHINE_CHECK_SIZE
#endif

154
system/alpha/h/ev5_osfalpha_defs.h
View file

@ -1,44 +1,40 @@
/*
Copyright 1993 Hewlett-Packard Development Company, L.P.
Permission is hereby granted, free of charge, to any person obtaining a copy of
this software and associated documentation files (the "Software"), to deal in
the Software without restriction, including without limitation the rights to
use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
of the Software, and to permit persons to whom the Software is furnished to do
so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in all
copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
*/
* Copyright 1993 Hewlett-Packard Development Company, L.P.
*
* Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use, copy,
* modify, merge, publish, distribute, sublicense, and/or sell copies
* of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
#ifndef EV5_OSFALPHA_DEFS_INCLUDED
#define EV5_OSFALPHA_DEFS_INCLUDED 1
// from ev5_osfalpha_defs.mar from Lance's fetch directory
// lowercaseified and $ changed to _ and reformatting for gas...pb Nov/95
//orig .MACRO $OSF_ALPHADEFS
//orig OSF_ALPHADEF_VER == 5 ; Flag the version number of this file.
//orig .ENDM
//orig .MACRO $OSF_PSDEF,$GBL
//orig $DEFINI OSFPS,$GBL
//orig;+
//orig; PS Layout - PS
//orig; Loc Size name function
//orig; ------ ------ ----- -----------------------------------
//orig; <0:2> 3 IPL Prio level
//orig; <3> 1 CM Current Mode
//orig;-
//
// PS Layout - PS
// Loc Size name function
// ------ ------ ----- -----------------------------------
// <0:2> 3 IPL Prio level
// <3> 1 CM Current Mode
//
#define osfps_v_mode 3
#define osfps_m_mode (1<<osfps_v_mode)
@ -61,33 +57,27 @@ SOFTWARE.
#define osfint_c_perf 4
#define osfint_c_passrel 5
//orig _DEFEND OSFPS,_GBL,DEF
//orig .ENDM
//orig;+
//orig; PTE layout - symbol prefix osfpte_
//orig;
//orig; Loc Size name function
//orig; ------ ------ ------ -----------------------------------
//orig; <63:32> 32 PFN Page Frame Number
//orig; <31:16> 16 SOFT Bits reserved for software use
//orig; <15:14> 2
//orig; <13> 1 UWE User write enable
//orig; <12> 1 KWE Kernel write enable
//orig; <11:10> 2
//orig; <9> 1 URE User read enable
//orig; <8> 1 KRE Kernel read enable
//orig; <7:6> 2 RES Reserved SBZ
//orig; <5> 1 HPF Huge Page Flag
//orig; <4> 1 ASM Wild card address space number match
//orig; <3> 1 FOE Fault On execute
//orig; <2> 1 FOW Fault On Write
//orig; <1> 1 FOR Fault On Read
//orig; <0> 1 V valid bit
//orig;-
//orig .MACRO _OSF_PTEDEF,_GBL
//orig _DEFINI OSFPTE,_GBL
//
// PTE layout - symbol prefix osfpte_
//
// Loc Size name function
// ------ ------ ------ -----------------------------------
// <63:32> 32 PFN Page Frame Number
// <31:16> 16 SOFT Bits reserved for software use
// <15:14> 2
// <13> 1 UWE User write enable
// <12> 1 KWE Kernel write enable
// <11:10> 2
// <9> 1 URE User read enable
// <8> 1 KRE Kernel read enable
// <7:6> 2 RES Reserved SBZ
// <5> 1 HPF Huge Page Flag
// <4> 1 ASM Wild card address space number match
// <3> 1 FOE Fault On execute
// <2> 1 FOW Fault On Write
// <1> 1 FOR Fault On Read
// <0> 1 V valid bit
//
#define osfpte_v_pfn 32
#define osfpte_m_soft (0xFFFF0000)
@ -116,21 +106,16 @@ SOFTWARE.
#define osfpte_m_ksegbits (osfpte_m_kre | osfpte_m_kwe | osfpte_m_v | osfpte_m_asm)
#define osfpte_m_prot (osfpte_m_ure+osfpte_m_uwe | osfpte_m_kre | osfpte_m_kwe)
//orig _DEFEND OSFPTE,_GBL,DEF
//orig .ENDM
//orig;+
//orig; VA layout - symbol prefix VA_
//orig;
//orig; Loc Size name function
//orig; ------ ------ ------- -----------------------------------
//orig; <42:33> 10 SEG1 First seg table offset for mapping
//orig; <32:23> 10 SEG2 Second seg table offset for mapping
//orig; <22:13> 10 SEG3 Third seg table offset for mapping
//orig; <12:0> 13 OFFSET Byte within page
//orig;-
//orig .MACRO _OSF_VADEF,_GBL
//orig _DEFINI OSFVA,_GBL
//
// VA layout - symbol prefix VA_
//
// Loc Size name function
// ------ ------ ------- -----------------------------------
// <42:33> 10 SEG1 First seg table offset for mapping
// <32:23> 10 SEG2 Second seg table offset for mapping
// <22:13> 10 SEG3 Third seg table offset for mapping
// <12:0> 13 OFFSET Byte within page
//
#define osfva_m_offset (0x000000001FFF)
#define osfva_v_offset 0
@ -141,14 +126,6 @@ SOFTWARE.
#define osfva_m_seg1 (0x7FE00000000)
#define osfva_v_seg1 33
//orig _DEFEND OSFVA,_GBL,DEF
//orig .ENDM
//orig;+
//orig; PRIVILEGED CONTEXT BLOCK (PCB)
//orig;-
//orig .MACRO _OSF_PCBDEF,_GBL
//orig _DEFINI OSFPCB,_GBL
#define osfpcb_q_ksp (0x0000)
#define osfpcb_q_usp (0x0008)
#define osfpcb_q_Usp (0x0008)
@ -160,14 +137,6 @@ SOFTWARE.
#define osfpcb_q_fen (0x0028)
#define osfpcb_v_pme 62
//orig _DEFEND OSFPCB,_GBL,DEF
//orig .ENDM
//orig;+
//orig; Stack Frame
//orig;-
//orig .MACRO _OSF_SFDEF,_GBL
//orig _DEFINI OSFSF,_GBL
#define osfsf_ps (0x00)
#define osfsf_pc (0x08)
#define osfsf_gp (0x10)
@ -176,7 +145,4 @@ SOFTWARE.
#define osfsf_a2 (0x28)
#define osfsf_c_size (0x30)
//orig _DEFEND OSFSF,_GBL,DEF
//orig .ENDM
#endif

101
system/alpha/h/ev5_paldef.h
View file

@ -1,24 +1,26 @@
/*
Copyright 1993 Hewlett-Packard Development Company, L.P.
Permission is hereby granted, free of charge, to any person obtaining a copy of
this software and associated documentation files (the "Software"), to deal in
the Software without restriction, including without limitation the rights to
use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
of the Software, and to permit persons to whom the Software is furnished to do
so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in all
copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
*/
* Copyright 1993 Hewlett-Packard Development Company, L.P.
*
* Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use, copy,
* modify, merge, publish, distribute, sublicense, and/or sell copies
* of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
#ifndef EV5_PALDEF_INCLUDED
#define EV5_PALDEF_INCLUDED 1
@ -26,18 +28,12 @@ SOFTWARE.
// from ev5_paldef.mar from Lance's fetch directory...pb Nov/95
// some entries have been superceeded by the more recent evt_defs.h
// These are lower-caseified and have the $ signs (unnecessarily we now discover) removed.
// These are lower-caseified and have the $ signs (unnecessarily we
// now discover) removed.
// Note that at the bottom of this file is the version of ev5_defs.mar
// which is more recent than the top part of the file and contains overlapping information...pb Nov/95
// .MACRO PALDEFS
// PALDEF_VER == 1 ; Flag the version number of this file.
// .ENDM
//
//
// .MACRO _HALT_CODES,_GBL
// _DEFINI HALT_CODES,_GBL
// which is more recent than the top part of the file and contains
// overlapping information...pb Nov/95
#define hlt_c_reset 0
#define hlt_c_hw_halt 1
@ -52,12 +48,6 @@ SOFTWARE.
#define hlt_c_mpstart 34
#define hlt_c_lfu_start 35
// halt codes above 255 reserved for platform specific errors
// _DEFEND HALT_CODES,_GBL,DEF
// .ENDM
// .MACRO _MCHK_CODES,_GBL
// _DEFINI MCHK_CODES,_GBL
#define mchk_c_tperr (64<<1)
#define mchk_c_tcperr (65<<1)
#define mchk_c_herr (66<<1)
@ -80,24 +70,12 @@ SOFTWARE.
#define mchk_c_sys_hrd_error (257<<1)
#define mchk_c_sys_ecc (258<<1)
// _DEFEND MCHK_CODES,_GBL,DEF
// .ENDM
// .MACRO _EV5_MM,_GBL
// _DEFINI _EV5_MM,_GBL
#define page_seg_size_bits 10
#define page_offset_size_bits 13
#define page_size_bytes 8192
#define va_size_bits 43
#define pa_size_bits 45
// _DEFEND _EV5_MM,_GBL,DEF
// .ENDM
// .MACRO _PALTEMP,_GBL
// _DEFINI _PALTEMP,_GBL
// replaced by ev5_defs.h #define pt0 (0x140)
// replaced by ev5_defs.h #define pt1 (0x141)
// replaced by ev5_defs.h #define pt2 (0x142)
@ -153,55 +131,28 @@ SOFTWARE.
#define pt_misc_v_switch 48
#define pt_misc_v_cm 56
// _DEFEND _PALTEMP,_GBL,DEF
// .ENDM
// .MACRO _OSF_MMCSR_DEF,_GBL
// _DEFINI OSFMMCSR,_GBL
#define mmcsr_c_tnv 0
#define mmcsr_c_acv 1
#define mmcsr_c_for 2
#define mmcsr_c_foe 3
#define mmcsr_c_fow 4
// _DEFEND OSFMMCSR,_GBL,DEF
// .ENDM
// .MACRO _MM_STAT_DEF,_GBL
// _DEFINI MMSTATDEF,_GBL
#define mm_stat_m_opcode (0x3F)
#define mm_stat_m_ra (0x1F)
#define evx_opc_sync (0x18)
#define EVX_OPC_SYNC (0x18)
#define evx_opc_hw_ld (0x1B)
// _DEFEND MMSTATDEF,_GBL,DEF
// .ENDM
// .MACRO _OSF_A0_DEF,_GBL
// _DEFINI OSFA0DEF,_GBL
#define osf_a0_bpt (0x0)
#define osf_a0_bugchk (0x1)
#define osf_a0_gentrap (0x2)
#define osf_a0_fen (0x3)
#define osf_a0_opdec (0x4)
// _DEFEND OSFA0DEF,_GBL,DEF
// .ENDM
// .MACRO _EV5_IPLDEF,_GBL
// _DEFINI EV5_IPLDEF,_GBL
#define ipl_machine_check 31
#define ipl_powerfail 30
#define ipl_perf_count 29
#define ipl_clock 22
#define ipl_interprocessor 22
// _DEFEND EV5_IPLDEF,_GBL,DEF
// .ENDM
#endif

97
system/alpha/h/fromHudsonMacros.h
View file

@ -1,81 +1,30 @@
/*
Copyright 1993, 1994 Hewlett-Packard Development Company, L.P.
Permission is hereby granted, free of charge, to any person obtaining a copy of
this software and associated documentation files (the "Software"), to deal in
the Software without restriction, including without limitation the rights to
use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
of the Software, and to permit persons to whom the Software is furnished to do
so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in all
copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
*/
* Copyright 1993, 1994 Hewlett-Packard Development Company, L.P.
*
* Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use, copy,
* modify, merge, publish, distribute, sublicense, and/or sell copies
* of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
#ifndef HUDSON_MACROS_LOADED
#define HUDSON_MACROS_LOADED 1
/*
* VID: [T1.2] PT: [Fri Apr 21 16:47:16 1995] SF: [macros.h]
* TI: [/sae_users/cruz/bin/vice -iplatform.s -l// -p# -DEB164 -h -m -aeb164 ]
*/
/*
**
** FACILITY:
**
** DECchip 21164 PALcode
**
** MODULE:
**
** macros.h
**
** MODULE DESCRIPTION:
**
** DECchip 21164 PALcode macro definitions
**
** AUTHOR: ER
**
** CREATION DATE: 29-Nov-1993
**
** $Id: fromHudsonMacros.h,v 1.1.1.1 1997/10/30 23:27:19 verghese Exp $
**
** MODIFICATION HISTORY:
**
** $Log: fromHudsonMacros.h,v $
** Revision 1.1.1.1 1997/10/30 23:27:19 verghese
** current 10/29/97
**
** Revision 1.1 1995/11/18 01:46:23 boyle
** Initial revision
**
** Revision 1.5 1994/07/08 17:03:12 samberg
** Changes to support platform specific additions
**
** Revision 1.4 1994/05/20 19:24:19 ericr
** Moved STALL macro from osfpal.s to here
** Added LDLI macro
**
** Revision 1.3 1994/05/20 18:08:14 ericr
** Changed line comments to C++ style comment character
**
** Revision 1.2 1994/02/28 18:45:51 ericr
** Fixed EGORE related bugs
**
** Revision 1.1 1993/12/16 21:55:05 eric
** Initial revision
**
**
**--
*/
#define STALL \
mfpr r31, pt0
@ -132,6 +81,4 @@ SOFTWARE.
ldah reg, ((val+0x8000) >> 16)(zero); \
lda reg, (val&0xffff)(reg)
#endif

113
system/alpha/h/fromHudsonOsf.h
View file

@ -1,98 +1,31 @@
/*
Copyright 1993, 1994 Hewlett-Packard Development Company, L.P.
Permission is hereby granted, free of charge, to any person obtaining a copy of
this software and associated documentation files (the "Software"), to deal in
the Software without restriction, including without limitation the rights to
use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
of the Software, and to permit persons to whom the Software is furnished to do
so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in all
copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
*/
* Copyright 1993, 1994 Hewlett-Packard Development Company, L.P.
*
* Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use, copy,
* modify, merge, publish, distribute, sublicense, and/or sell copies
* of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
#ifndef FROMHUDSONOSF_INCLUDED
#define FROMHUDSONOSF_INCLUDED 1
/*
* VID: [T1.2] PT: [Fri Apr 21 16:47:14 1995] SF: [osf.h]
* TI: [/sae_users/cruz/bin/vice -iplatform.s -l// -p# -DEB164 -h -m -aeb164 ]
*/
#define __OSF_LOADED 1
/*
**
** FACILITY:
**
** DECchip 21164 PALcode
**
** MODULE:
**
** osf.h
**
** MODULE DESCRIPTION:
**
** OSF/1 specific definitions
**
** AUTHOR: ER
**
** CREATION DATE: 24-Nov-1993
**
** $Id: fromHudsonOsf.h,v 1.1.1.1 1997/10/30 23:27:19 verghese Exp $
**
** MODIFICATION HISTORY:
**
** $Log: fromHudsonOsf.h,v $
** Revision 1.1.1.1 1997/10/30 23:27:19 verghese
** current 10/29/97
**
** Revision 1.1 1995/11/18 01:46:31 boyle
** Initial revision
**
** Revision 1.11 1995/04/21 02:06:30 fdh
** Replaced C++ style comments with Standard C style comments.
**
** Revision 1.10 1994/09/26 14:17:47 samberg
** Complete VICE work and EB164/SD164 breakout.
**
** Revision 1.9 1994/07/26 17:39:10 samberg
** Changes for SD164.
**
** Revision 1.8 1994/07/08 17:03:48 samberg
** Changes to support platform specific additions
**
** Revision 1.7 1994/05/20 19:23:51 ericr
** Moved STACK_FRAME macro from osfpal.s to here
**
** Revision 1.6 1994/05/20 18:08:19 ericr
** Changed line comments to C++ style comment character
**
** Revision 1.5 1994/01/11 18:43:33 ericr
** Removed PAL version/revision and size constants
**
** Revision 1.4 1994/01/05 16:22:32 ericr
** Added more SCB vector offsets and MCHK error code
**
** Revision 1.3 1994/01/03 19:35:40 ericr
** Derive mask definitions from field constants
**
** Revision 1.2 1993/12/22 20:43:01 eric
** Added mask definitions for MCES bits
**
** Revision 1.1 1993/12/16 21:55:05 eric
** Initial revision
**
**
**--
*/
#define __OSF_LOADED 1
/*
** Seg0 and Seg1 Virtual Address (VA) Format
**

517
system/alpha/h/lib.h
View file

@ -1,517 +0,0 @@
/*
Copyright 1993, 1994Hewlett-Packard Development Company, L.P.
Permission is hereby granted, free of charge, to any person obtaining a copy of
this software and associated documentation files (the "Software"), to deal in
the Software without restriction, including without limitation the rights to
use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
of the Software, and to permit persons to whom the Software is furnished to do
so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in all
copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
*/
#ifndef __LIB_H_LOADED
#define __LIB_H_LOADED
/*
* $Id: lib.h,v 1.1.1.1 1997/10/30 23:27:16 verghese Exp $;
*/
/*
* $Log: lib.h,v $
* Revision 1.1.1.1 1997/10/30 23:27:16 verghese
* current 10/29/97
*
* Revision 1.1 1995/06/23 00:18:57 berc
* Initial revision
*
* Revision 1.29 1995/04/05 21:46:10 cruz
* Added EB164 prototype for wr_bcache().
*
* Revision 1.28 1995/04/03 18:35:32 cruz
* Extended the prototype definition of cserv.
*
* Revision 1.27 1995/03/05 04:17:23 fdh
* Corrected prototype for inrom().
*
* Revision 1.26 1995/02/28 03:05:53 fdh
* Moved rom.c prototypes to rom.h
*
* Revision 1.25 1995/02/27 19:21:27 fdh
* Added prototypes for Ctype routines.
*
* Revision 1.24 1995/02/23 21:48:31 fdh
* Added prototypes for set_haxr() and atoi().
*
* Revision 1.23 1995/02/22 22:01:10 fdh
* Changed types for tolower() and toupper().
*
* Revision 1.22 1995/02/19 17:46:01 fdh
* Changed one of the arguments to read_rom().
*
* Revision 1.21 1995/02/10 02:23:20 fdh
* Added prototype for set_romboot().
*
* Revision 1.20 1994/11/19 03:30:51 fdh
* Added support for romlist command.
*
* Revision 1.19 1994/11/18 19:05:31 fdh
* swpipl returns the current ipl.
*
* Revision 1.18 1994/11/08 21:39:20 fdh
* Added declaration for the flash routine.
*
* Revision 1.17 1994/11/01 11:30:01 rusling
* Changed following PCI-PCI bridge support.
*
* Revision 1.16 1994/08/05 20:13:47 fdh
* Updated Copyright header and RCS $Id: identifier.
*
* Revision 1.15 1994/08/03 19:44:23 fdh
* Fixups around the linker defined symbols _edata and _end.
* Protect time_t definition with #ifndef _TIME_T.
*
* Revision 1.14 1994/07/22 21:02:46 fdh
* Added extern void rtcBaseInit(void); for EB64 builds.
*
* Revision 1.13 1994/07/21 18:10:06 fdh
* >> Added EnableBCache(), DisableBCache(), and CleanBCache().
*
* Revision 1.12 1994/07/13 14:17:07 fdh
* Added data structure for holding pointers to SROM interface
* parameters.
*
* Revision 1.11 1994/06/28 20:08:21 fdh
* Modified filenames and build precedure to fit into a FAT filesystem.
*
* Revision 1.10 1994/06/22 15:10:34 rusling
* Fixed up WNT compile warnings.
*
* Revision 1.9 1994/06/21 15:27:47 rusling
* Removed putFloat() prototype.
*
* Revision 1.8 1994/06/21 14:18:05 rusling
* changed definition of loadHeader() in rom.c
*
* Revision 1.7 1994/06/21 10:38:53 rusling
* Added strncmp() for WNT.
*
* Revision 1.5 1994/06/20 14:18:59 fdh
* Fixup header file preprocessor #include conditionals.
*
* Revision 1.4 1994/06/17 19:34:01 fdh
* Clean-up...
*
* Revision 1.3 1994/06/13 15:54:35 fdh
* Added definitions of unsigned amounts as defined in system.h
* Definitions are also placed here to make the lib subdirectory
* free-standing from the rest of the source tree.
*
* Revision 1.2 1994/06/03 20:18:38 fdh
* Added protypes for all routines in /lib.
*
* Revision 1.1 1994/01/19 10:33:21 rusling
* Initial revision
*
* Revision 1.1 1993/06/08 19:56:14 fdh
* Initial revision
*
*/
#include <stddef.h>
#ifndef TRUE
#define TRUE 1
#endif
#ifndef FALSE
#define FALSE 0
#endif
/*
* Definitions of unsigned amounts
*/
#define ub unsigned char
#define uw unsigned short int
#ifdef _WIN32
#define ul unsigned __int64
#define sl __int64
#define ui unsigned int
#else
#define ul unsigned long
#define sl long
#define ui unsigned int
#endif
typedef struct {
ul *abox_ctl;
#ifdef DC21064
ul *biu_ctl;
#endif /* DC21064 */
#ifdef DC21066
ui *bcr0;
ui *bcr1;
ui *bcr2;
ui *bcr3;
ui *bmr0;
ui *bmr1;
ui *bmr2;
ui *bmr3;
#endif /* DC21066 */
ul *srom_rev;
ul *proc_id;
ul *mem_size;
ul *cycle_cnt;
ul *signature;
ul *proc_mask;
ul *sysctx;
int valid;
} sysdata_t;
#ifdef _WIN32
extern ul end;
extern ul edata;
#define _END end
#define _EDATA edata
#else
extern ul _end;
extern ul _edata;
#define _END _end
#define _EDATA _edata
#endif
#ifndef _TIME_T
#define _TIME_T
typedef int time_t;
/* typedef ui time_t; */
#endif
/*::::::::::::::
rw.c
::::::::::::::*/
/* Here B = 8 bits, W = 16 bits, L = 32 bits, Q = 64 bits */
extern ub ReadB(ub * adr);
extern uw ReadW(uw * adr);
extern void WriteB(ub * adr , ub data);
extern void WriteW(uw * adr , uw data);
/*::::::::::::::
beep.c
::::::::::::::*/
extern void tone(int period , int time);
extern void dummy(int x);
extern void Beep(int msec , int freq);
extern void msleep(int ms);
/*::::::::::::::
c8514.c
::::::::::::::*/
extern int c8514init(void);
extern void c8514erase(void);
extern void c8514putc(char c);
extern void c8514show(void);
extern void c8514hide(void);
extern void c8514insfontchar(int code , ub * s);
extern void initfont(void);
/*::::::::::::::
date.c
::::::::::::::*/
extern void printDate(void);
extern void setDate(ub * date);
extern ui gettime(void);
//extern time_t time(void);
extern void CheckDate(void);
/*::::::::::::::
initdata.c
::::::::::::::*/
extern void doinitdata(void );
/*::::::::::::::
ebxx_io.c
::::::::::::::*/
extern void outportb(ul p , ui d);
extern void outportw(ul p , ui d);
extern void outportt(ul p , ui d);
extern void outportl(ul p , ui d);
extern void outportbxt(ul p , ui d);
extern void outport(ul p , ui d);
extern void outcfgb(ui bus, ui dev, ui reg, ui data);
extern void outcfgw(ui bus, ui dev, ui reg, ui data);
extern void outcfgl(ui bus, ui dev, ui reg, ui data);
extern void outmembxt(ul p , ui d);
extern void outmemwat(ul p , ui d);
extern ui inportb(ul p);
extern ui inportw(ul p);
extern ui inportt(ul p);
extern ui inportl(ul p);
extern ui inportwat(ul p);
extern ui inportbxt(ul p);
extern ui inport(ul p);
extern ui incfgb(ui bus, ui dev, ui reg);
extern ui incfgw(ui bus, ui dev, ui reg);
extern ui incfgl(ui bus, ui dev, ui reg);
extern ui inmembat(ul p);
extern ui inmembxt(ul p);
extern void IOBusInit(void);
extern ul IOPCIClearNODEV(void);
extern void outLed(ui d);
extern void out_ioc_csr(ui p , ul d);
extern ul in_ioc_csr(ui p);
extern void outmemb(ul p , ui d);
extern void outmemw(ul p , ui d);
extern void outmemt(ul p , ui d);
extern void outmeml(ul p , ui d);
extern void outmem(ul p , ui d);
extern ui inmemb(ul p);
extern ui inmemw(ul p);
extern ui inmemt(ul p);
extern ul inmeml(ul p);
extern ui inmemwat(ul p);
extern ui inmem(ul p);
extern void set_haxr(unsigned int addr);
extern void outVti(ul p , ui d);
extern ui inVti(ul p);
extern ub inrom(ul p);
extern ui insctl(void);
extern void outsctl(ui d);
extern ui inIack(void);
#ifdef EB64
extern void rtcBaseInit(void);
#endif
/*::::::::::::::
ebxx_mem.c
::::::::::::::*/
extern void memdetect(void);
extern int check_mem_esr(int silent);
#ifdef EB66
extern void out_mem_csr(ul p , ul d);
extern ul in_mem_csr(ui p);
#elif EB64P
extern void out_mem_csr(ui p , ui d);
extern ui in_mem_csr(ui p);
#endif
extern void EnableBCache(void);
extern void DisableBCache(void);
#ifdef EB164
void wr_bcache (ui argc, ul arg1, ul arg2, ui select);
#endif
/*::::::::::::::
ffcsubs.c
::::::::::::::*/
extern size_t strlen(const char *s);
#if 0
extern void bzero(void *s, int count);
extern void bcopy(void *from, void *to, int count);
#endif
extern int tolower(int c);
extern int toupper(int c);
extern int IsAlpha(char c);
extern int IsDigit(char c);
/*::::::::::::::
fftty.c
::::::::::::::*/
extern void UnGetChar(char c);
extern char MonGetChar(void);
extern void FlushLine(void);
extern ul ReadHex(void);
extern void ReadString(char * s);
extern char RawMonGetChar(void);
extern int kbdcontinue(void );
/*::::::::::::::
floppy.c
::::::::::::::*/
extern int floppyRead(int loadtype , char * file2load);
/*::::::::::::::
gpchar.c
::::::::::::::*/
extern void PutChar(char c);
extern char GetChar(void);
extern int CharAv(void);
extern void WaitUs(int usecs);
/*::::::::::::::
ident.c
::::::::::::::*/
extern int ident(ul first , ul last);
/*::::::::::::::
int.c
::::::::::::::*/
extern void intr_enable(int int_level);
/*::::::::::::::
kbd.c
::::::::::::::*/
extern void kbd_error(char * error_msg , int s1);
extern int kbd_init(void);
extern void kbd_reset_state(void);
extern int kbd_charav(void);
extern int kbd_getc(void);
/*::::::::::::::
leds.c
::::::::::::::*/
extern void sethdled(int v);
extern int isturbo(void);
extern int kbd_locked(void);
/*::::::::::::::
memtest.c
::::::::::::::*/
extern ul do_memtest(char * llim , char * hlim , int inc);
extern void memtest1(char * llim , char * hlim , int inc , int pattern);
extern void memtest2(char * llim , char * hlim , int inc , int seed);
extern void memtest3(char * llim , char * hlim , int inc);
extern void memtest(char * min , char * max , int inc);
/*::::::::::::::
p8514.c
::::::::::::::*/
extern void pwgaFillSolid(ui fg , ui alu , ui planemask , int xDst , int yDst , int wDst , int hDst);
extern void pwgaDrawColorImage(int xDst , int yDst , int wDst , int hDst , ub * pSrc , int widthSrc , ui alu , ui planemask);
extern void pwgaBlit(int xSrc , int ySrc , int wSrc , int hSrc , int xDst , int yDst , ui alu , ui planemask);
extern int DisplayOpen(int mode1024);
extern void DisplayClose(void);
extern void byteoutport(int p , int d);
extern void short_delay(void);
extern void InitLUT(void);
extern int pwgaExists(void);
extern ui pwgaHWInit(int mode1024);
extern void outwords(short * wSrc , int wcount);
extern void outwblock(ub * pSrc , int w , int h , int widthSrc);
/*::::::::::::::
pr.c
::::::::::::::*/
extern void PQ(ul x);
extern void PL(ui x);
extern void PW(uw x);
extern void PB(ub x);
extern void PutSpace(void);
extern void PutCR(void);
/*::::::::::::::
printf.c
::::::::::::::*/
extern void PutString(const char * s);
extern int printf(const char *f, ...);
/*::::::::::::::
search.c
::::::::::::::*/
extern int search(ul first , ul last , int size , char * valstr , int inverse);
extern void ParseVal(char * s , ul * val , ul * mask , int size);
/*::::::::::::::
sniff.c
::::::::::::::*/
extern int find_first(int map);
extern int sniff_eisa(int id , int mask , int num_slots);
/*::::::::::::::
uart.c
::::::::::::::*/
extern int uart_charav(int port);
extern char uart_getchar(int port);
extern void uart_putchar(int port , char c);
extern void putcLpt(int c);
extern void uart_init_line(int line , int baud);
extern int uart_init(void);
/*::::::::::::::
vga.c
::::::::::::::*/
extern void vgaerase(void);
extern void vgalcgen(void);
extern void vgasetloc(void);
extern void vgaputc(register int c);
extern void vgastl(ul a , int d);
extern int vgaldl(ul a);
extern ub readreg(ui sel , ui off);
extern void writereg(ui sel , ui off , ub dat);
extern void dumpvga(void);
extern void vgainit(void);
/*::::::::::::::
libc.c
::::::::::::::*/
extern int memcmp(const void * pcs , const void * pct , size_t n);
extern void * memset(void * ps , char c , size_t n);
extern void * memmove(void * ps , const void * pct , size_t n);
extern void * memcpy(void * ps , const void * pct , size_t n);
extern int atoi(const char *nptr);
extern int isalnum(int c);
extern int isalpha(int c);
extern int isascii(int c);
extern int iscntrl(int c);
extern int isdigit(int c);
extern int isgraph(int c);
extern int islower(int c);
extern int isprint(int c);
extern int ispunct(int c);
extern int isspace(int c);
extern int isupper(int c);
extern int isxdigit(int c);
/*::::::::::::::
flash.c
::::::::::::::*/
extern int flash_main(ui src , ui segnum, ui segcnt);
/*::::::::::::::
asmstuff.s
::::::::::::::*/
extern void mb(void);
extern ul GetSP(void);
extern ul cServe(ul, ul, ul, ...);
extern void wrfen(ui);
extern void swppal(ul, ul, ul, ul);
extern void halt(void);
extern void wait_cycles(ui cycles);
extern int swpipl(ui);
extern void CleanBCache(ul);
/* Here B = 8 bits, W = 16 bits, L = 32 bits, Q = 64 bits */
#ifdef _WIN32
extern ui ReadL(ul);
extern void WriteL(ul, ui);
extern ul ReadQ(ul);
extern void WriteQ(ul, ul);
#else
#define WriteL(address,value) (*(ui *)(address)=(ui)(value))
#define ReadL(address) (*(ui *)(address))
#define WriteQ(address,value) (*(ul *)(address)=(ul)(value))
#define ReadQ(address) (*(ul *)(address))
#endif
/*::::::::::::::::
host specific library definitions
::::::::::::::::*/
#ifdef _WIN32
extern int strcmp(char *cs, char *ct);
extern char *strcpy(char *s, char *ct);
extern int strncmp(char *cs, char *ct, int n);
extern char *strncpy(char *s, char *ct, int n);
extern int rand(void);
#endif
#endif /* __LIB_H_LOADED */

244
system/alpha/h/platform.h
View file

@ -1,244 +0,0 @@
/*
Copyright 1993, 1994 Hewlett-Packard Development Company, L.P.
Permission is hereby granted, free of charge, to any person obtaining a copy of
this software and associated documentation files (the "Software"), to deal in
the Software without restriction, including without limitation the rights to
use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
of the Software, and to permit persons to whom the Software is furnished to do
so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in all
copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
*/
/*
* VID: [T1.2] PT: [Fri Apr 21 16:47:18 1995] SF: [platform.h]
* TI: [/sae_users/cruz/bin/vice -iplatform.s -l// -p# -DEB164 -h -m -aeb164 ]
*/
#define __PLATFORM_LOADED 1
/*
**
** FACILITY:
**
** DECchip 21164 OSF/1 PALcode
**
** MODULE:
**
** platform.h
**
** MODULE DESCRIPTION:
**
** Platform specific definitions.
**
** AUTHOR: Lance Berc (taken from EB164 code)
**
** CREATION DATE: 14-Jun-1995
**
** $Id: platform.h,v 1.1.1.1 1997/10/30 23:27:20 verghese Exp $
**
** MODIFICATION HISTORY:
**
** $Log: platform.h,v $
** Revision 1.1.1.1 1997/10/30 23:27:20 verghese
** current 10/29/97
**
* Revision 1.1 1995/06/14 18:50:42 berc
* Initial revision
*
*/
#if !defined(CONSOLE_ENTRY)
#define CONSOLE_ENTRY 0x10000
#endif /* CONSOLE_ENTRY */
#define DEBUGDEATH(c) \
lda a0, c(zero) ; \
br DebugDeath
#define DEBUGSTORE(c) \
stq_p t0,0(zero) ; \
stq_p t1,8(zero) ; \
lda t0, 0x400(zero) ; \
sll t0, 29, t0 ; \
ldah t0, 0x280(t0) ; \
9: lda t1, 0x140(t0) ; \
ldl_p t1, 0(t1) ; \
srl t1, 16, t1 ; \
and t1, 0x20, t1 ; \
beq t1, 9b ; \
lda t1, c(zero) ; \
stl_p t1, 0(t0) ; \
mb ; \
ldq_p t1, 8(zero) ; \
ldq_p t0, 0(zero)
/*
** IPL translation table definitions:
**
** EB164 specific IRQ pins are
**
** Line IPL Source OSF/1 IPL
** ---- --- ------ ---------
** IRQ0 20 Corrected ECC error 7
** IRQ1 21 PCI/ISA 3
** IRQ2 22 Real Time Clock 5
** IRQ3 23 SIO NMI, CIA errors 7
**
** The mask contains one byte for each IPL level, with IPL0 in the
** least significant (right-most) byte and IPL7 in the most
** significant (left-most) byte. Each byte in the mask maps the
** OSF/1 IPL to the DC21164 IPL.
**
** OSF/1 IPL IPL
** --------- ---
** 0 0
** 1 1
** 2 2
** 3 21 (to account for PCI/ISA at IPL 21)
** 4 21
** 5 22 (to account for clock at IPL 21)
** 6 30 (to account for powerfail)
** 7 31
*/
#define INT_K_MASK_HIGH 0x1F1E1615
#define INT_K_MASK_LOW 0x15020100
#define BYTE_ENABLE_SHIFT 5
/*
** Dallas DS1287A Real-Time Clock (RTC) Definitions:
*/
#define RTCADD 0x160000
#define RTCDAT 0x170000
/*
** Serial Port (COM) Definitions:
*/
#define DLA_K_BRG 12 /* Baud Rate Divisor = 9600 */
#define LSR_V_THRE 5 /* Xmit Holding Register Empty Bit */
#define LCR_M_WLS 3 /* Word Length Select Mask */
#define LCR_M_STB 4 /* Number Of Stop Bits Mask */
#define LCR_M_PEN 8 /* Parity Enable Mask */
#define LCR_M_DLAB 128 /* Divisor Latch Access Bit Mask */
#define LCR_K_INIT (LCR_M_WLS | LCR_M_STB)
#define MCR_M_DTR 1 /* Data Terminal Ready Mask */
#define MCR_M_RTS 2 /* Request To Send Mask */
#define MCR_M_OUT1 4 /* Output 1 Control Mask */
#define MCR_M_OUT2 8 /* UART Interrupt Mask Enable */
#define MCR_K_INIT (MCR_M_DTR | \
MCR_M_RTS | \
MCR_M_OUT1 | \
MCR_M_OUT2)
/* CPU Adr[39:29]=0x500 select PCI Mem. */
#define PCI_MEM 0x400
#define SLOT_D_COM1 (0x140000)
#define SLOT_D_COM2 (0x150000)
#define COM1_RBR (SLOT_D_COM1 | (0x0 << 1)) /* Receive Buffer Register Offset */
#define COM1_THR (SLOT_D_COM1 | (0x0 << 1)) /* Xmit Holding Register Offset */
#define COM1_IER (SLOT_D_COM1 | (0x1 << 1)) /* Interrupt Enable Register Offset */
#define COM1_IIR (SLOT_D_COM1 | (0x2 << 1)) /* Interrupt ID Register Offset */
#define COM1_LCR (SLOT_D_COM1 | (0x3 << 1)) /* Line Control Register Offset */
#define COM1_MCR (SLOT_D_COM1 | (0x4 << 1)) /* Modem Control Register Offset */
#define COM1_LSR (SLOT_D_COM1 | (0x5 << 1)) /* Line Status Register Offset */
#define COM1_MSR (SLOT_D_COM1 | (0x6 << 1)) /* Modem Status Register Offset */
#define COM1_SCR (SLOT_D_COM1 | (0x7 << 1)) /* Scratch Register Offset */
#define COM1_DLL (SLOT_D_COM1 | (0x8 << 1)) /* Divisor Latch (LS) Offset */
#define COM1_DLH (SLOT_D_COM1 | (0x9 << 1)) /* Divisor Latch (MS) Offset */
#define COM2_RBR (SLOT_D_COM2 | (0x0 << 1))
#define COM2_THR (SLOT_D_COM2 | (0x0 << 1))
#define COM2_IER (SLOT_D_COM2 | (0x1 << 1))
#define COM2_IIR (SLOT_D_COM2 | (0x2 << 1))
#define COM2_LCR (SLOT_D_COM2 | (0x3 << 1))
#define COM2_MCR (SLOT_D_COM2 | (0x4 << 1))
#define COM2_LSR (SLOT_D_COM2 | (0x5 << 1))
#define COM2_MSR (SLOT_D_COM2 | (0x6 << 1))
#define COM2_SCR (SLOT_D_COM2 | (0x7 << 1))
#define COM2_DLL (SLOT_D_COM2 | (0x8 << 1))
#define COM2_DLH (SLOT_D_COM2 | (0x9 << 1))
/*
** Macro to define a port address
*/
#define IO_MASK 0x7FFFFFF
/* NOTE ON ADDITIONAL PORT DEFINITION:
**
** We also need to set bit 39! Since the span between bit 39
** and the byte enable field is more than 32, we set bit 39 in the
** port macros.
*/
/*
** Macro to write a byte literal to a specified port
*/
#define OutPortByte(port,val,tmp0,tmp1) \
LDLI (tmp0, port); \
sll tmp0, BYTE_ENABLE_SHIFT, tmp0; \
lda tmp1, PCI_MEM(zero); \
sll tmp1, 29, tmp1; \
bis tmp0, tmp1, tmp0; \
lda tmp1, (val)(zero); \
sll tmp1, 8*(port & 3), tmp1; \
stl_p tmp1, 0x00(tmp0); \
mb
/*
** Macro to write a byte from a register to a specified port
*/
#define OutPortByteReg(port,reg,tmp0,tmp1) \
LDLI (tmp0, port); \
sll tmp0, BYTE_ENABLE_SHIFT, tmp0; \
lda tmp1, PCI_MEM(zero); \
sll tmp1, 29, tmp1; \
bis tmp0, tmp1, tmp0; \
sll reg, 8*(port & 3), tmp1; \
stl_p tmp1, 0x00(tmp0); \
mb
/*
** Macro to write a longword from a register to a specified port
*/
#define OutPortLongReg(port,reg,tmp0,tmp1) \
LDLI (tmp0, port); \
sll tmp0, BYTE_ENABLE_SHIFT, tmp0; \
lda tmp1, PCI_MEM(zero); \
sll tmp1, 29, tmp1; \
bis tmp0, tmp1, tmp0; \
stl_p tmp1, 0x18(tmp0); \
mb
/*
** Macro to read a byte from a specified port
*/
#define InPortByte(port,tmp0,tmp1) \
LDLI (tmp0, port); \
sll tmp0, BYTE_ENABLE_SHIFT, tmp0; \
lda tmp1, PCI_MEM(zero); \
sll tmp1, 29, tmp1; \
bis tmp0, tmp1, tmp0; \
ldl_p tmp0, 0x00(tmp0); \
srl tmp0, (8 * (port & 3)), tmp0; \
zap tmp0, 0xfe, tmp0

81
system/alpha/h/regdefs.h
View file

@ -1,81 +0,0 @@
/*
Copyright 1993Hewlett-Packard Development Company, L.P.
Permission is hereby granted, free of charge, to any person obtaining a copy of
this software and associated documentation files (the "Software"), to deal in
the Software without restriction, including without limitation the rights to
use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
of the Software, and to permit persons to whom the Software is furnished to do
so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in all
copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
*/
#ifndef __REGDEFS_H_LOADED
#define __REGDEFS_H_LOADED
/*
* $Id: regdefs.h,v 1.1.1.1 1997/10/30 23:27:17 verghese Exp $;
*/
/*
* $Log: regdefs.h,v $
* Revision 1.1.1.1 1997/10/30 23:27:17 verghese
* current 10/29/97
*
* Revision 1.2 1995/02/24 16:00:18 fdh
* Conditional around #define AT.
*
* Revision 1.1 1995/02/24 15:54:26 fdh
* Initial revision
*
*/
#define v0 $0
#define t0 $1
#define t1 $2
#define t2 $3
#define t3 $4
#define t4 $5
#define t5 $6
#define t6 $7
#define t7 $8
#define s0 $9
#define s1 $10
#define s2 $11
#define s3 $12
#define s4 $13
#define s5 $14
#define s6 $15
#define fp $15 /* fp & s6 are the same */
#define a0 $16
#define a1 $17
#define a2 $18
#define a3 $19
#define a4 $20
#define a5 $21
#define t8 $22
#define t9 $23
#define t10 $24
#define t11 $25
#define ra $26
#define pv $27 /* pv and t5 are the same */
#define t12 $27
#ifndef AT
#define AT $at
#endif
#define gp $29
#define sp $30
#define zero $31
#endif /* __REGDEFS_H_LOADED */

293
system/alpha/h/rpb.h
View file

@ -1,32 +1,30 @@
/*
Copyright 1990 Hewlett-Packard Development Company, L.P.
Permission is hereby granted, free of charge, to any person obtaining a copy of
this software and associated documentation files (the "Software"), to deal in
the Software without restriction, including without limitation the rights to
use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
of the Software, and to permit persons to whom the Software is furnished to do
so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in all
copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
*/
/*
* "@(#)rpb.h 9.2 (ULTRIX/OSF) 10/30/91"
* Copyright 1990 Hewlett-Packard Development Company, L.P.
*
* Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use, copy,
* modify, merge, publish, distribute, sublicense, and/or sell copies
* of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
/*
* Defines for the architected startup addresses.
*/
#define HWRPB_ADDR 0x10000000 /* 256 MB */
#define BOOT_ADDR 0x20000000 /* 512 MB */
#define PGTBL_ADDR 0x40000000 /* 1 GB */
@ -66,7 +64,7 @@ SOFTWARE.
#define SV_PF_RSVD 0x00000000 /* RESERVED */
#define SV_RESERVED 0x00000000 /* All STS bits; zero for backward compat. */
#define SV_RESERVED 0x00000000 /* All STS bits; 0 for back compat */
#define SV_MPCAP 0x00000001 /* MP capable */
#define SV_PF_UNITED 0x00000020 /* United */
#define SV_PF_SEPARATE 0x00000040 /* Separate */
@ -76,8 +74,8 @@ SOFTWARE.
#define SV_GRAPHICS 0x00000200 /* Embedded graphics processor */
#define SV_STS_MASK 0x0000fc00 /* STS bits - system and I/O board */
#define SV_SANDPIPER 0x00000400 /* others define system platforms. */
#define SV_STS_MASK 0x0000fc00 /* STS bits - system and I/O board */
#define SV_SANDPIPER 0x00000400 /* others define system platforms */
#define SV_FLAMINGO 0x00000800 /* STS BIT SETTINGS */
#define SV_HOTPINK 0x00000c00 /* STS BIT SETTINGS */
#define SV_FLAMINGOPLUS 0x00001000 /* STS BIT SETTINGS */
@ -96,7 +94,7 @@ SOFTWARE.
#define CONS_NONE 0 /* no console present */
#define CONS_SRVC 1 /* console is service processor */
#define CONS_DZ 2 /* console is dz/dl VT device */
#define CONS_GRPH 3 /* cons is graphics dev w/ dz/dl keybd*/
#define CONS_GRPH 3 /* cons is gfx dev w/ dz/dl keybd*/
#define CONS_REM 4 /* cons is remote, protocal enet/MOP */
/*
@ -108,50 +106,49 @@ SOFTWARE.
#define PALvar_OpenVMS 1
#define PALvar_OSF1 2
#include <sys/types.h>
/*
* The Alpha restart parameter block, which is a page or 2 in low memory
*/
struct rpb {
struct rpb *rpb_selfref; /* 000: physical self-reference */
long rpb_string; /* 008: contains string "HWRPB" */
long rpb_vers; /* 010: HWRPB version number */
u_long rpb_size; /* 018: bytes in RPB perCPU CTB CRB MEMDSC */
u_long rpb_cpuid; /* 020: primary cpu id */
u_long rpb_pagesize; /* 028: page size in bytes */
u_long rpb_addrbits; /* 030: number of phys addr bits */
u_long rpb_maxasn; /* 038: max valid ASN */
char rpb_ssn[16]; /* 040: system serial num: 10 ascii chars */
u_long rpb_systype; /* 050: system type */
long rpb_sysvar; /* 058: system variation */
long rpb_sysrev; /* 060: system revision */
u_long rpb_clock; /* 068: scaled interval clock intr freq */
u_long rpb_counter; /* 070: cycle counter frequency */
u_long rpb_vptb; /* 078: virtual page table base */
long rpb_res1; /* 080: reserved */
u_long rpb_trans_off; /* 088: offset to translation buffer hint */
u_long rpb_numprocs; /* 090: number of processor slots */
u_long rpb_slotsize; /* 098: per-cpu slot size */
u_long rpb_percpu_off; /* 0A0: offset to per_cpu slots */
u_long rpb_num_ctb; /* 0A8: number of CTBs */
u_long rpb_ctb_size; /* 0B0: bytes in largest CTB */
u_long rpb_ctb_off; /* 0B8: offset to CTB (cons term block) */
u_long rpb_crb_off; /* 0C0: offset to CRB (cons routine block) */
u_long rpb_mdt_off; /* 0C8: offset to memory descriptor table */
u_long rpb_config_off; /* 0D0: offset to config data block */
u_long rpb_fru_off; /* 0D8: offset to FRU table */
void (*rpb_saveterm)(); /* 0E0: virt addr of save term routine */
long rpb_saveterm_pv; /* 0E8: proc value for save term routine */
void (*rpb_rstrterm)(); /* 0F0: virt addr of restore term routine */
long rpb_rstrterm_pv; /* 0F8: proc value for restore term routine */
void (*rpb_restart)(); /* 100: virt addr of CPU restart routine */
long rpb_restart_pv; /* 108: proc value for CPU restart routine */
long rpb_software; /* 110: used to determine presence of kdebug */
long rpb_hardware; /* 118: reserved for hardware */
long rpb_checksum; /* 120: checksum of prior entries in rpb */
long rpb_rxrdy; /* 128: receive ready bitmask */
long rpb_txrdy; /* 130: transmit ready bitmask */
u_long rpb_dsr_off; /* 138: Dynamic System Recog. offset */
long rpb_string; /* 008: contains string "HWRPB" */
long rpb_vers; /* 010: HWRPB version number */
ulong rpb_size; /* 018: bytes in RPB perCPU CTB CRB MEMDSC */
ulong rpb_cpuid; /* 020: primary cpu id */
ulong rpb_pagesize; /* 028: page size in bytes */
ulong rpb_addrbits; /* 030: number of phys addr bits */
ulong rpb_maxasn; /* 038: max valid ASN */
char rpb_ssn[16]; /* 040: system serial num: 10 ascii chars */
ulong grpb_systype; /* 050: system type */
long rpb_sysvar; /* 058: system variation */
long rpb_sysrev; /* 060: system revision */
ulong rpb_clock; /* 068: scaled interval clock intr freq */
ulong rpb_counter; /* 070: cycle counter frequency */
ulong rpb_vptb; /* 078: virtual page table base */
long rpb_res1; /* 080: reserved */
ulong rpb_trans_off; /* 088: offset to translation buffer hint */
ulong rpb_numprocs; /* 090: number of processor slots */
ulong rpb_slotsize; /* 098: per-cpu slot size */
ulong rpb_percpu_off; /* 0A0: offset to per_cpu slots */
ulong rpb_num_ctb; /* 0A8: number of CTBs */
ulong rpb_ctb_size; /* 0B0: bytes in largest CTB */
ulong rpb_ctb_off; /* 0B8: offset to CTB (cons term block) */
ulong rpb_crb_off; /* 0C0: offset to CRB (cons routine block) */
ulong rpb_mdt_off; /* 0C8: offset to memory descriptor table */
ulong rpb_config_off; /* 0D0: offset to config data block */
ulong rpb_fru_off; /* 0D8: offset to FRU table */
void (*rpb_saveterm)(); /* 0E0: virt addr of save term routine */
long rpb_saveterm_pv; /* 0E8: proc value for save term routine */
void (*rpb_rstrterm)(); /* 0F0: virt addr of restore term routine */
long rpb_rstrterm_pv; /* 0F8: proc value for restore term routine */
void (*rpb_restart)(); /* 100: virt addr of CPU restart routine */
long rpb_restart_pv; /* 108: proc value for CPU restart routine */
long rpb_software; /* 110: used to determine presence of kdebug */
long rpb_hardware; /* 118: reserved for hardware */
long rpb_checksum; /* 120: checksum of prior entries in rpb */
long rpb_rxrdy; /* 128: receive ready bitmask */
long rpb_txrdy; /* 130: transmit ready bitmask */
ulong rpb_dsr_off; /* 138: Dynamic System Recog. offset */
};
#define rpb_kdebug rpb_software
@ -165,15 +162,15 @@ struct rpb {
* with formats used by other palcode types.
*/
struct bootpcb {
long rpb_ksp; /* 000: kernel stack pointer */
long rpb_usp; /* 008: user stack pointer */
long rpb_ptbr; /* 010: page table base register */
int rpb_cc; /* 018: cycle counter */
int rpb_asn; /* 01C: address space number */
long rpb_proc_uniq; /* 020: proc/thread unique value */
long rpb_fen; /* 028: floating point enable */
long rpb_palscr[2]; /* 030: pal scratch area */
long rpb_pcbpad[8]; /* 040: padding for fixed size */
long rpb_ksp; /* 000: kernel stack pointer */
long rpb_usp; /* 008: user stack pointer */
long rpb_ptbr; /* 010: page table base register */
int rpb_cc; /* 018: cycle counter */
int rpb_asn; /* 01C: address space number */
long rpb_proc_uniq; /* 020: proc/thread unique value */
long rpb_fen; /* 028: floating point enable */
long rpb_palscr[2]; /* 030: pal scratch area */
long rpb_pcbpad[8]; /* 040: padding for fixed size */
};
/*
@ -182,10 +179,10 @@ struct bootpcb {
* of secondary processors.
*/
struct iccb {
u_int iccb_rxlen; /* receive length in bytes */
u_int iccb_txlen; /* transmit length in bytes */
char iccb_rxbuf[80]; /* receive buffer */
char iccb_txbuf[80]; /* transmit buffer */
uint iccb_rxlen; /* receive length in bytes */
uint iccb_txlen; /* transmit length in bytes */
char iccb_rxbuf[80]; /* receive buffer */
char iccb_txbuf[80]; /* transmit buffer */
};
/*
@ -196,29 +193,29 @@ struct iccb {
*/
struct rpb_percpu {
struct bootpcb rpb_pcb; /* 000: boot/restart HWPCB */
long rpb_state; /* 080: per-cpu state bits */
long rpb_palmem; /* 088: palcode memory length */
long rpb_palscratch; /* 090: palcode scratch length */
long rpb_palmem_addr; /* 098: phys addr of palcode mem space */
long rpb_palscratch_addr; /* 0A0: phys addr of palcode scratch space */
long rpb_palrev; /* 0A8: PALcode rev required */
long rpb_proctype; /* 0B0: processor type */
long rpb_procvar; /* 0B8: processor variation */
long rpb_procrev; /* 0C0: processor revision */
char rpb_procsn[16]; /* 0C8: proc serial num: 10 ascii chars */
long rpb_logout; /* 0D8: phys addr of logout area */
long rpb_logout_len; /* 0E0: length in bytes of logout area */
long rpb_haltpb; /* 0E8: halt pcb base */
long rpb_haltpc; /* 0F0: halt pc */
long rpb_haltps; /* 0F8: halt ps */
long rpb_haltal; /* 100: halt arg list (R25) */
long rpb_haltra; /* 108: halt return address (R26) */
long rpb_haltpv; /* 110: halt procedure value (R27) */
long rpb_haltcode; /* 118: reason for halt */
long rpb_software; /* 120: for software */
struct iccb rpb_iccb; /* 128: inter-console communications buffer */
long rpb_palrev_avail[16];/* 1D0: PALcode revs available */
long rpb_pcrsvd[6]; /* 250: reserved for arch use */
long rpb_state; /* 080: per-cpu state bits */
long rpb_palmem; /* 088: palcode memory length */
long rpb_palscratch; /* 090: palcode scratch length */
long rpb_palmem_addr; /* 098: phys addr of palcode mem space */
long rpb_palscratch_addr; /* 0A0: phys addr of palcode scratch space */
long rpb_palrev; /* 0A8: PALcode rev required */
long rpb_proctype; /* 0B0: processor type */
long rpb_procvar; /* 0B8: processor variation */
long rpb_procrev; /* 0C0: processor revision */
char rpb_procsn[16]; /* 0C8: proc serial num: 10 ascii chars */
long rpb_logout; /* 0D8: phys addr of logout area */
long rpb_logout_len; /* 0E0: length in bytes of logout area */
long rpb_haltpb; /* 0E8: halt pcb base */
long rpb_haltpc; /* 0F0: halt pc */
long rpb_haltps; /* 0F8: halt ps */
long rpb_haltal; /* 100: halt arg list (R25) */
long rpb_haltra; /* 108: halt return address (R26) */
long rpb_haltpv; /* 110: halt procedure value (R27) */
long rpb_haltcode; /* 118: reason for halt */
long rpb_software; /* 120: for software */
struct iccb rpb_iccb; /* 128: inter-console communications buffer */
long rpb_palrev_avail[16]; /* 1D0: PALcode revs available */
long rpb_pcrsvd[6]; /* 250: reserved for arch use */
/* the dump stack grows from the end of the rpb page not to reach here */
};
@ -229,13 +226,13 @@ struct rpb_percpu {
* The memory cluster descriptor.
*/
struct rpb_cluster {
long rpb_pfn; /* 000: starting PFN of this cluster */
long rpb_pfncount; /* 008: count of PFNs in this cluster */
long rpb_pfntested; /* 010: count of tested PFNs in cluster */
long rpb_va; /* 018: va of bitmap */
long rpb_pa; /* 020: pa of bitmap */
long rpb_checksum; /* 028: checksum of bitmap */
long rpb_usage; /* 030: usage of cluster */
long rpb_pfn; /* 000: starting PFN of this cluster */
long rpb_pfncount; /* 008: count of PFNs in this cluster */
long rpb_pfntested; /* 010: count of tested PFNs in cluster */
long rpb_va; /* 018: va of bitmap */
long rpb_pa; /* 020: pa of bitmap */
long rpb_checksum; /* 028: checksum of bitmap */
long rpb_usage; /* 030: usage of cluster */
};
#define CLUSTER_USAGE_OS ((long)0)
#define CLUSTER_USAGE_PAL ((long)1)
@ -250,9 +247,9 @@ struct rpb_cluster {
* of memory).
*/
struct rpb_mdt {
long rpb_checksum; /* 000: checksum of entire mem desc table */
long rpb_impaddr; /* 008: PA of implementation dep info */
long rpb_numcl; /* 010: number of clusters */
long rpb_checksum; /* 000: checksum of entire mem desc table */
long rpb_impaddr; /* 008: PA of implementation dep info */
long rpb_numcl; /* 010: number of clusters */
struct rpb_cluster rpb_cluster[1]; /* first instance of a cluster */
};
@ -261,38 +258,37 @@ struct rpb_mdt {
* UART console device.
*/
struct ctb_tt {
long ctb_type; /* 000: console type */
long ctb_unit; /* 008: console unit */
long ctb_resv; /* 010: reserved */
long ctb_length; /* 018: byte length of device dep */
/* portion */
long ctb_csr; /* 020: CSR Address */
long ctb_tivec; /* 028: <63>=tie; interrupt vector */
long ctb_rivec; /* 030: <63>=rie; interrupt vector */
long ctb_baud; /* 038: baud rate */
long ctb_put_sts; /* 040: PUTS callback extended status */
long ctb_get_sts; /* 048: GETS callback extended status */
long ctb_rsvd[1]; /* 050: reserved for console use */
long ctb_type; /* 000: console type */
long ctb_unit; /* 008: console unit */
long ctb_resv; /* 010: reserved */
long ctb_length; /* 018: byte length of device dep portion */
long ctb_csr; /* 020: CSR Address */
long ctb_tivec; /* 028: <63>=tie; interrupt vector */
long ctb_rivec; /* 030: <63>=rie; interrupt vector */
long ctb_baud; /* 038: baud rate */
long ctb_put_sts; /* 040: PUTS callback extended status */
long ctb_get_sts; /* 048: GETS callback extended status */
long ctb_rsvd[1]; /* 050: reserved for console use */
};
/*
* The "Console Terminal Block" portion of the HWRPB.
*/
struct rpb_ctb {
long rpb_type; /* 000: console type */
long rpb_unit; /* 008: console unit */
long rpb_resv; /* 010: reserved */
long rpb_length; /* 018: byte length of device dep portion */
long rpb_first; /* 000: first field of device dep portion */
long rpb_type; /* 000: console type */
long rpb_unit; /* 008: console unit */
long rpb_resv; /* 010: reserved */
long rpb_length; /* 018: byte length of device dep portion */
long rpb_first; /* 000: first field of device dep portion */
};
/*
* The physical/virtual map for the console routine block.
*/
struct rpb_map {
long rpb_virt; /* virtual address for map entry */
long rpb_phys; /* phys address for map entry */
long rpb_pgcount; /* page count for map entry */
long rpb_virt; /* virtual address for map entry */
long rpb_phys; /* phys address for map entry */
long rpb_pgcount; /* page count for map entry */
};
/*
@ -300,22 +296,23 @@ struct rpb_map {
* Note: the "offsets" are all relative to the start of the HWRPB (HWRPB_ADDR).
*/
struct rpb_crb {
long rpb_va_disp; /* va of call-back dispatch rtn */
long rpb_pa_disp; /* pa of call-back dispatch rtn */
long rpb_va_fixup; /* va of call-back fixup rtn */
long rpb_pa_fixup; /* pa of call-back fixup rtn */
long rpb_num; /* number of entries in phys/virt map */
long rpb_mapped_pages; /* Number of pages to be mapped */
struct rpb_map rpb_map[1]; /* first instance of a map entry */
long rpb_va_disp; /* va of call-back dispatch rtn */
long rpb_pa_disp; /* pa of call-back dispatch rtn */
long rpb_va_fixup; /* va of call-back fixup rtn */
long rpb_pa_fixup; /* pa of call-back fixup rtn */
long rpb_num; /* number of entries in phys/virt map */
long rpb_mapped_pages; /* Number of pages to be mapped */
struct rpb_map rpb_map[1]; /* first instance of a map entry */
};
/*
* These macros define where within the HWRPB the CTB and CRB are located.
*/
#define CTB_SETUP ((struct rpb_ctb *) ((long)hwrpb_addr + \
(long)(hwrpb_addr->rpb_ctb_off)))
#define CRB_SETUP ((struct rpb_crb *) ((long)hwrpb_addr + \
(long)(hwrpb_addr->rpb_crb_off)))
#define CTB_SETUP \
((struct rpb_ctb *) ((long)hwrpb_addr + (long)(hwrpb_addr->rpb_ctb_off)))
#define CRB_SETUP \
((struct rpb_crb *) ((long)hwrpb_addr + (long)(hwrpb_addr->rpb_crb_off)))
/*
* The "Dynamic System Recognition" portion of the HWRPB.
@ -324,8 +321,8 @@ struct rpb_crb {
* data for software licensing
*/
struct rpb_dsr {
long rpb_smm; /* SMM nubber used by LMF */
u_long rpb_lurt_off; /* offset to LURT table */
u_long rpb_sysname_off; /* offset to sysname char count */
int lurt[10]; /* XXM has one LURT entry */
long rpb_smm; /* SMM nubber used by LMF */
ulong rpb_lurt_off; /* offset to LURT table */
ulong rpb_sysname_off; /* offset to sysname char count */
int lurt[10]; /* XXM has one LURT entry */
};

114
system/alpha/palcode/Makefile
View file

@ -1,75 +1,91 @@
#Copyright (c) 2003, 2004
#The Regents of The University of Michigan
#All Rights Reserved
# Copyright (c) 2003, 2004
# The Regents of The University of Michigan
# All Rights Reserved
#
#This code is part of the M5 simulator, developed by Nathan Binkert,
#Erik Hallnor, Steve Raasch, and Steve Reinhardt, with contributions
#from Ron Dreslinski, Dave Greene, Lisa Hsu, Ali Saidi, and Andrew
#Schultz.
# This code is part of the M5 simulator, developed by Nathan Binkert,
# Erik Hallnor, Steve Raasch, and Steve Reinhardt, with contributions
# from Ron Dreslinski, Dave Greene, Lisa Hsu, Ali Saidi, and Andrew
# Schultz.
#
#Permission is granted to use, copy, create derivative works and
#redistribute this software and such derivative works for any purpose,
#so long as the copyright notice above, this grant of permission, and
#the disclaimer below appear in all copies made; and so long as the
#name of The University of Michigan is not used in any advertising or
#publicity pertaining to the use or distribution of this software
#without specific, written prior authorization.
# Permission is granted to use, copy, create derivative works and
# redistribute this software and such derivative works for any purpose,
# so long as the copyright notice above, this grant of permission, and
# the disclaimer below appear in all copies made; and so long as the
# name of The University of Michigan is not used in any advertising or
# publicity pertaining to the use or distribution of this software
# without specific, written prior authorization.
#
#THIS SOFTWARE IS PROVIDED AS IS, WITHOUT REPRESENTATION FROM THE
#UNIVERSITY OF MICHIGAN AS TO ITS FITNESS FOR ANY PURPOSE, AND WITHOUT
#WARRANTY BY THE UNIVERSITY OF MICHIGAN OF ANY KIND, EITHER EXPRESS OR
#IMPLIED, INCLUDING WITHOUT LIMITATION THE IMPLIED WARRANTIES OF
#MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE REGENTS OF
#THE UNIVERSITY OF MICHIGAN SHALL NOT BE LIABLE FOR ANY DAMAGES,
#INCLUDING DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL
#DAMAGES, WITH RESPECT TO ANY CLAIM ARISING OUT OF OR IN CONNECTION
#WITH THE USE OF THE SOFTWARE, EVEN IF IT HAS BEEN OR IS HEREAFTER
#ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
# THIS SOFTWARE IS PROVIDED AS IS, WITHOUT REPRESENTATION FROM THE
# UNIVERSITY OF MICHIGAN AS TO ITS FITNESS FOR ANY PURPOSE, AND WITHOUT
# WARRANTY BY THE UNIVERSITY OF MICHIGAN OF ANY KIND, EITHER EXPRESS OR
# IMPLIED, INCLUDING WITHOUT LIMITATION THE IMPLIED WARRANTIES OF
# MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE REGENTS OF
# THE UNIVERSITY OF MICHIGAN SHALL NOT BE LIABLE FOR ANY DAMAGES,
# INCLUDING DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL
# DAMAGES, WITH RESPECT TO ANY CLAIM ARISING OUT OF OR IN CONNECTION
# WITH THE USE OF THE SOFTWARE, EVEN IF IT HAS BEEN OR IS HEREAFTER
# ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
#Makefile for palcode
#Works on alpha-linux and builds elf executable
# Makefile for palcode
# Works on alpha-linux and builds elf executable
### If we are not compiling on an alpha, we must use cross tools ###
ifneq ($(ARCHNAME), alpha)
ifneq ($(shell uname -m), alpha)
CROSS_COMPILE?=alpha-unknown-linux-gnu-
endif
CC=$(CROSS_COMPILE)gcc
AS=$(CROSS_COMPILE)as
LD=$(CROSS_COMPILE)ld
CFLAGS=-I . -I ../h -D SIMOS -D BUILD_PALCODE -nostdinc -nostdinc++ -Wa,-m21164
CFLAGS=-I . -I ../h -nostdinc -nostdinc++ -Wa,-m21164
LDFLAGS=-Ttext 0x4000
TLOBJS = osfpal.o platform_tlaser.o
TLOBJS_COPY = osfpal_cache_copy.o osfpal_cache_copy_unaligned.o
TSOBJS = osfpal.o platform_m5.o
TSBOBJS = osfpal.o platform_m5b.o
TSOBJS_COPY = osfpal_cache_copy.o osfpal_cache_copy_unaligned.o
TLOBJS = osfpal.o platform_tlaser.o
TLOBJS_COPY = osfpal_cache_copy.o platform_tlaser.o
TLOBJS_COPY_UNALIGNED = osfpal_cache_copy_unaligned.o platform_tlaser.o
TSOBJS = osfpal.o platform_tsunami.o
TSBOBJS = osfpal.o platform_bigtsunami.o
TSOBJS_COPY = osfpal_cache_copy.o platform_tsunami.o
TSOBJS_COPY_UNALIGNED = osfpal_cache_copy_unaligned.o platform_bigtsunami.o
%.o: %.S
all: tlaser tsunami tsunami_b64
all_copy: tlaser tlaser_copy tsunami tsunami_b64 tsunami_copy
osfpal.o: osfpal.S
$(CC) $(CFLAGS) -o $@ -c $<
all: tsunami tsunami_b64
platform_m5b.o: platform_m5.S
$(CC) $(CFLAGS) -DBIG_TSUNAMI -o $@ -c $<
tlaser: $(TLOBJS)
$(LD) $(LDFLAGS) -o tl_osfpal osfpal.o platform_tlaser.o
osfpal_cache_copy.o: osfpal.S
$(CC) $(CFLAGS) -DCACHE_COPY -o $@ -c $<
tlaser_copy: $(TLOBJS_COPY) $(TLOBJS)
$(LD) $(LDFLAGS) -o tl_osfpal_cache osfpal_cache_copy.o platform_tlaser.o
$(LD) $(LDFLAGS) -o tl_osfpal_unalign osfpal_cache_copy_unaligned.o platform_tlaser.o
osfpal_cache_copy_unaligned.o: osfpal.S
$(CC) $(CFLAGS) -DCACHE_COPY -DCACHE_COPY_UNALIGNED -o $@ -c $<
platform_tlaser.o: platform.S
$(CC) $(CFLAGS) -DTLASER -o $@ -c $<
platform_tsunami.o: platform.S
$(CC) $(CFLAGS) -DTSUNAMI -o $@ -c $<
platform_bigtsunami.o: platform.S
$(CC) $(CFLAGS) -DBIG_TSUNAMI -o $@ -c $<
tlaser: $(TLOBJS)
$(LD) $(LDFLAGS) -o tl_osfpal $(TLOBJS)
tlaser_copy: $(TLOBJS_COPY) $(TLOBJS_COPY_UNALIGNED)
$(LD) $(LDFLAGS) -o tl_osfpal_cache $(TLOBJS_COPY)
$(LD) $(LDFLAGS) -o tl_osfpal_unalign $(TLOBJS_COPY_UNALIGNED)
tsunami: $(TSOBJS)
$(LD) $(LDFLAGS) -o ts_osfpal osfpal.o platform_m5.o
$(LD) $(LDFLAGS) -o ts_osfpal $(TSOBJS)
tsunami_b64: $(TSBOBJS)
$(LD) $(LDFLAGS) -o tsb_osfpal osfpal.o platform_m5b.o
$(LD) $(LDFLAGS) -o tsb_osfpal $(TSBOBJS)
tsunami_copy: $(TSOBJS) $(TSOBJS_COPY)
$(LD) $(LDFLAGS) -o ts_osfpal_cache osfpal_cache_copy.o platform_m5.o
$(LD) $(LDFLAGS) -o ts_osfpal_unalign osfpal_cache_copy_unaligned.o platform_m5.o
tsunami_copy: $(TSOBJS_COPY) $(TSOBJS_COPY_UNALIGNED)
$(LD) $(LDFLAGS) -o ts_osfpal_cache $(TSOBJS_COPY)
$(LD) $(LDFLAGS) -o ts_osfpal_unalign $(TSOBJS_COPY_UNALIGNED)
clean:
rm -f *.o tl_osfpal tl_osfpal_cache tl_osfpal_unalign ts_osfpal \

1823
system/alpha/palcode/osfpal.S
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5309
system/alpha/palcode/osfpal_cache_copy.S
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5305
system/alpha/palcode/osfpal_cache_copy_unaligned.S
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1683
system/alpha/palcode/platform_tlaser.S → system/alpha/palcode/platform.S
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2802
system/alpha/palcode/platform_m5.S
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