Commit graph

87 commits

Author SHA1 Message Date
Korey Sewell
1047215ee5 First Steps in cleaning up MIPS code - This changeset rearranges the files in the MIPS directory by moving where constants/types/classes are defined
arch/mips/SConscript:
arch/mips/isa_traits.cc:
arch/mips/isa_traits.hh:
arch/mips/process.cc:
arch/mips/linux/linux.cc:
arch/mips/utility.hh:
arch/mips/linux/process.cc:
arch/mips/int_regfile.hh:
arch/mips/misc_regfile.hh:
arch/mips/regfile.hh:
arch/mips/types.hh:
    MIPS directory rearranging

--HG--
rename : arch/mips/mips_linux.cc => arch/mips/linux/linux.cc
rename : arch/mips/mips_linux.hh => arch/mips/linux/linux.hh
rename : arch/mips/linux_process.cc => arch/mips/linux/process.cc
rename : arch/mips/linux_process.hh => arch/mips/linux/process.hh
extra : convert_revision : 138eee48c8ed75efcf38572f335a556aaec38fc7
2006-05-07 18:50:41 -04:00
Korey Sewell
0930024b88 Minor changes for FP ... MIPS now works for floating-point programs...
Now we are to the point where more benchmarks and instruction-coverage
is necessary to totally verify/validate correct operation across
all MIPS instructions

arch/mips/isa_traits.hh:
    fix for reading double values ... must rearrange bits before using void* to read double.
configs/test/hello_mips:
    real hello world MIPS binary

--HG--
extra : convert_revision : 153de1f8a830882c6972bd0bdb56da818f614def
2006-05-07 14:09:19 -04:00
Korey Sewell
a7565418d2 Basic MIPS floating point test works now ... I had to realize that when using the double FP reg the
register with the higher # contains the most significant bytes...

arch/mips/isa/decoder.isa:
    divide instruction fixes
arch/mips/isa_traits.cc:
    use double as argument to cvt & round function.
    clean up cout statements in function.
arch/mips/isa_traits.hh:
    In MIPS the higher # reg of a doubles pair is ALSO the most significant reg.
    Once I switched this the basic MIPS FP test I had worked.

--HG--
extra : convert_revision : 45c80df229e6174d0b52fc7cfb530642b1f1fc35
2006-05-07 13:26:15 -04:00
Korey Sewell
34a5732bd3 take-out debug only code
arch/mips/isa/formats/fp.isa:
    take out debug-only code

--HG--
extra : convert_revision : 12c320b4b1432a626acefc496ec7a188c8b3fb66
2006-05-04 21:21:11 -04:00
Korey Sewell
2e7e844768 recognized 32 & 64 bit unsigned integer types and set the width appropriately
arch/mips/isa_traits.hh:
    debug statements to be taken out real soon like...

--HG--
extra : convert_revision : 4e9abcb99c991db93328d01d7606a2bb942b29ee
2006-05-04 20:49:24 -04:00
Korey Sewell
97429d8eee Redo the FloatRegFile using unsigned integers
Edit the convert_and_round function which access FloatRegFile

arch/isa_parser.py:
    recognize when we are writing a 'uint64_t' FloatReg and set the width appropriately
arch/mips/isa/decoder.isa:
    Send a 'float' to the convert function instead of a unsigned word. Do this so we dont have to worry about the
    bit manipulation ourselves. We can just concern ourselves with values.

    Use unsigned double to get movd...
arch/mips/isa/formats/fp.isa:
    float debug statement
arch/mips/isa_traits.cc:
    add different versions of convert_and_round functions
arch/mips/isa_traits.hh:
    Use an array of uint32_t unsigned integers to represent the Floating Point Regfile
configs/test/hello_mips:
    basic FP program
cpu/simple/cpu.hh:
    spacing

--HG--
extra : convert_revision : a6fca91ad6365c83025f1131d71fa1b8ee76d7bc
2006-05-02 20:05:16 -04:00
Korey Sewell
2d077df1a0 More Modest Changes for FP MIPS execution...
arch/mips/isa/decoder.isa:
    Fix Reg. Operands for FP Conversion Instructions - Must Make Sure That You use 'uw' or 'ud' as needed.
arch/mips/isa_traits.cc:
    if a conversion function isnt implemented yet, than have M5 panic...
    (plan to implement SINGLE_TO_DOUBLE first)

--HG--
extra : convert_revision : 6a7f703a5d65139d3981a8753c31fc8f5bf313cf
2006-04-28 03:05:11 -04:00
Korey Sewell
a183f66a8a Use lower two bits of FCSR reg to determine rounding mode (may want to move this out of decoder.isa and into a template)
Have FP conversion instructions use re-defined convert_and_round() function

arch/mips/isa/decoder.isa:
    Use lower two bits of FCSR reg to determine rounding mode (may want to move this out of decoder.isa and into a template)
    Have FP conversion instructions to use re-defined convert_and_round() function
arch/mips/isa/formats/util.isa:
    Remove convert_and_round function from here
arch/mips/isa_traits.cc:
    Define convert_and_round function here
arch/mips/isa_traits.hh:
    Use "enums" to define FP conversion types & Round Modes
    Declare convert_and_round function here

--HG--
extra : convert_revision : 0f4f8c1732a53b277361559ea71af2a1feb4fc64
2006-04-28 00:24:25 -04:00
Korey Sewell
316f1f3239 change readPC() + 4 to readNextPC() and the same for NNPC ...
arch/mips/isa/decoder.isa:
    remove useless cout statements
arch/mips/isa_traits.hh:
    space

--HG--
extra : convert_revision : 8b8cf5df6fc3eb92598360343eb887c35cda202d
2006-04-27 16:44:12 -04:00
Korey Sewell
07d4ad4dbe Rewrite CFC1 & CTC1 instruction definitions
Use Load/Store Float Memory Formats for FP mem insts
Fix Load/Store into FP to not create a "nop" if it sees reg 0 at the defintion

arch/mips/isa/decoder.isa:
    Rewrite CFC1 & CTC1 instruction definitions
    Use Load/Store Float Memory Formats for FP mem insts
arch/mips/isa/formats/fp.isa:
    comment changes
arch/mips/isa/formats/mem.isa:
    Fix Load/Store Float Memory Formats

--HG--
extra : convert_revision : ef1cb7a78452f8dff044b05c89e61bec866bf1b7
2006-04-27 05:07:11 -04:00
Korey Sewell
303dda5e8e Changes to get Floating Point Instructions w/new regfile to at least not segfault and break my INT tests
arch/mips/isa/decoder.isa:
    Change decoder to read COP1 (floating point) instructions to decode correctly
arch/mips/isa_traits.hh:
    Change to use overlapping single/double FP regfile

--HG--
extra : convert_revision : 2d15d6d88939f7e0d63279d5c35d7eea536a573c
2006-04-26 16:13:47 -04:00
Gabe Black
cae6b571d6 Merge m5.eecs.umich.edu:/bk/newmem
into  ewok.(none):/home/gblack/m5/newmem

--HG--
extra : convert_revision : 3eb97976caf57e43119a998c31128ca6f163c05b
2006-04-18 09:44:45 -04:00
Gabe Black
609c4ecea6 Changed MIPS and Alpha to pass the syscall number to the syscall function
arch/alpha/isa/decoder.isa:
    Fixed up Alpha to pass the syscall number directly to the syscall function.
arch/mips/isa/decoder.isa:
    Fixed up MIPS to pass the syscall number directly to the syscall function.
arch/mips/isa/operands.isa:
    Added an R2 operand which is passed to the syscall function as the syscall number to use.

--HG--
extra : convert_revision : 066d486cd6a2761b29e413c6d526c268788975f3
2006-04-18 09:44:24 -04:00
Korey Sewell
48f2626eac These fixes now allow all of the 20 mips tests to work properly!
Floating Point Mips Tests still need to be added, tested, and debugged.

arch/mips/isa/decoder.isa:
    Fix mult and multu instructions. This semantic error causes the problem: <int64> = <int32> * <int32>. Although I was placing
    the output into a 64-bit integer the multiply was just doing a 32-bit multiply so the solution is to just use
    the 'sd' & 'ud' operands so that the ISA parser will use the int64_t and uint64_t types in calculation.
arch/mips/isa/formats/int.isa:
    Trace output fix. Don't print first comma unless there is a destination register for sure!

--HG--
extra : convert_revision : 2c503dca70b104fed0b58454975f745dd3cc2eee
2006-04-14 03:42:02 -04:00
Korey Sewell
87fe91028b Move RLIMIT constants to OS/ISA specific files instead of generic OS container classes
Update MIPS/Linux constants

arch/alpha/linux/linux.hh:
    move RLIMIT constants to ALPHA/Linux class
arch/alpha/tru64/tru64.hh:
    move RLIMIT constants to ALPHA/Tru64 class
arch/mips/mips_linux.hh:
    update MIPS constants for MIPS/Linux
kern/linux/linux.hh:
    remove RLIMIT constants from generic Linux class... these are now in ISA specific / OS specific classes
kern/tru64/tru64.hh:
    remove RLIMIT constants from generic Tru64 class... these are now in ISA specific / OS specific classes

--HG--
extra : convert_revision : 2e2743d73ab18fcd558a5765cb4ef0e9671bd1d7
2006-04-13 16:47:32 -04:00
Korey Sewell
5afed24e1c Changes that get rid of the OSFlags and derive a new class of this format <architecture>-<OS>.
This class is derived from the original <OS> class and is used to define information that
is both architecure and OS specific (for example, the AlphaLinux class is derived from the
Linux class and defined in arch/alpha/linux/linux.hh).

SConscript:
    no need to compile linux.cc and tru64.cc now, since openFlagsTable has been moved
arch/alpha/SConscript:
    compile linux.cc and tru64.cc within alpha arch.
arch/alpha/linux/process.cc:
    template syscall functions on AlphaLinux instead of Linux ... AlphaLinux is derived off of Linux
arch/alpha/tru64/process.cc:
    template syscall functions on AlphaTru64 instead of Linux ... AlphaTru64 is derived off of Linux
    moved tableFunc syscall function into this file
arch/mips/SConscript:
    compile mips_linux.cc for openFlags table
arch/mips/isa_traits.hh:
    remove constants from here
arch/mips/linux_process.cc:
    template syscall functions on MipsLinux instead of Linux ... MipsLinux is derived off of Linux
kern/linux/linux.hh:
    remove OSFlags
kern/tru64/tru64.hh:
    remove OSFlags def., openFlagTable, and tableFunc ...
sim/syscall_emul.hh:
    go back to using "OS" instead of "OSFlags"
arch/alpha/linux/linux.cc:
    defines openFlagTable
arch/alpha/linux/linux.hh:
arch/alpha/tru64/tru64.hh:
    Alpha Linux constants placed here in class derived from Linux class
arch/alpha/tru64/tru64.cc:
    defines openFlagTable for AlphaTru64
arch/mips/mips_linux.cc:
    MIPS Linux open flag table
arch/mips/mips_linux.hh:
    Mips Linux constants placed here in class derived from Linux class

--HG--
extra : convert_revision : e6c1c2c895429c28fd141732e223e897ab19315e
2006-04-13 05:42:18 -04:00
Korey Sewell
4fe89f7232 add OSFlags struct to AlphaISA/MipsISA namespace. The OS classes then use these OSFlags to access architecture-specific AND OS-specific
flags for their functions (e.g. OS::OSFlags::TG_MAP_ANONYMOUS)...

arch/alpha/tru64/process.cc:
sim/syscall_emul.hh:
    Add OSFlags to code
arch/mips/isa/decoder.isa:
    slight decoder changes (more stylistic then anything)
arch/mips/isa/formats/util.isa:
    spacing
arch/mips/isa_traits.hh:
    add OSFlags struct to MipsISA namespace. The OS classes then use these OSFlags to access architecture-specific and OS-specific
    flags for their functions
kern/linux/linux.hh:
    remove constant placement ... define OSFlags in linux.hh
kern/tru64/tru64.hh:
    define OSFlags in tru64

--HG--
extra : convert_revision : 59be1036eb439ca4ea1eea1d3b52e508023de6c9
2006-04-12 03:44:45 -04:00
Korey Sewell
59ab31cd80 edit to test_mips config file
arch/mips/isa_traits.hh:
    add FIR misc reg (was lost in merge)

--HG--
extra : convert_revision : b056c9a307e5de08ff8cc4dfc541342d25c141b8
2006-04-10 18:41:25 -04:00
Korey Sewell
5e11a1763d so I guess the IntRegFile class is needed after all!
--HG--
extra : convert_revision : a47368e859b1736bb1c0848960925c6d107435df
2006-04-10 12:57:59 -04:00
Korey Sewell
f51656498e Merge zizzer:/bk/newmem
into  zazzer.eecs.umich.edu:/.automount/zooks/y/ksewell/research/m5-sim/newmem-mips

arch/mips/isa/formats/mem.isa:
    Filled in Split-Memory Access Code
arch/mips/isa_traits.hh:
    Leave IntRegFile as an array instead of class with member functions
mem/page_table.cc:
    take out NO ALIGN FAULT page table access code for now... No need to messs up what works

--HG--
extra : convert_revision : cbf1cce9145daf9ee9ceabc9080271ddb0561489
2006-04-10 12:37:15 -04:00
Korey Sewell
4f430e9ab5 Finally MIPS does hello world!
arch/mips/isa/bitfields.isa:
    add RS_SRL bitfield ...these must be set to 0 for a SRL instruction
arch/mips/isa/decoder.isa:
    Make unimplemented instructions Fail instead of just Warn
    Edits to SRA & SRAV instructions
    Implement CFC1 instructions
    Unaligned Memory Access Support (Maybe Not fully functional yet)
    Enforce a more strict decode policy (in terms of different bitfields set to 0 on certain instructions)
arch/mips/isa/formats/branch.isa:
    Fix disassembly
arch/mips/isa/formats/int.isa:
    Add sign extend Immediate and zero extend Immediate to Int class.
    Probably a bit unnecessary in the long run since these manipulations could
    be done in the actually instruction instead of keep a int value
arch/mips/isa/formats/mem.isa:
    Comment/Remove out split-memory access code... revisit this after SimpleCPU works
arch/mips/isa/formats/unimp.isa:
    Add inst2string function to Unimplemented panic. PRints out the instruction
    binary to help in debuggin
arch/mips/isa/formats/unknown.isa:
    define inst2string function , use in unknown disassembly and panic function
arch/mips/isa/operands.isa:
    Make "Mem" default to a unsigned word since this is MIPS32
arch/mips/isa_traits.hh:
    change return values to 32 instead of 64
arch/mips/linux_process.cc:
    assign some syscalls to the right functions
cpu/static_inst.hh:
    more debug functions for MIPS (these will be move to the mips directory soon)
mem/page_table.cc:
mem/page_table.hh:
    toward a better implementation for unaligned memory access
mem/request.hh:
    NO ALIGN FAULT flag added to support unaligned memory access
sim/syscall_emul.cc:
    additional SyscallVerbose comments

--HG--
extra : convert_revision : 1987d80c9f4ede507f1f0148435e0bee97d2428c
2006-04-10 12:23:17 -04:00
Ali Saidi
62ebe251da Merge zizzer:/bk/newmem
into  zeep.eecs.umich.edu:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : a0bfc7495ba0f2916214d6712f67c5c239a210a0
2006-04-06 18:04:57 -04:00
Ali Saidi
61b2bd9d28 added unimp faults
update for newmem

arch/mips/faults.cc:
arch/mips/faults.hh:
arch/sparc/faults.cc:
arch/sparc/faults.hh:
    added unimp faults for mips
arch/mips/isa/base.isa:
arch/mips/isa/includes.isa:
    thou shalt not put includes inside a namespace
dev/alpha_console.cc:
    fix formatting
dev/io_device.hh:
    add comments
dev/tsunami_cchip.cc:
dev/tsunami_cchip.hh:
    update for newmem
sim/process.cc:
    fix seemingly wronge code.

--HG--
extra : convert_revision : 9dcfe188d00d525b935d8ef4fa323280bbfa9a0e
2006-04-06 18:04:49 -04:00
Gabe Black
a4b31e8f6b Enable register windows.
arch/alpha/isa_traits.hh:
arch/mips/isa_traits.cc:
    Turned the integer register file into a class instead of a typedef to an array.
arch/alpha/regfile.hh:
    Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs.
arch/mips/isa_traits.hh:
    Turned the integer register file into a class instead of a typedef to an array. Also moved a "using namespace" into the namespace definition.
arch/sparc/isa_traits.hh:
    Turned the integer register file into a class instead of a typedef to an array. Also "fixed" the max number of src and dest regs. They may need to be even larger.
arch/sparc/regfile.hh:
    Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. Created setCWP and setAltGlobals functions for the IntRegFile.
cpu/cpu_exec_context.hh:
    Used the accessor functions for the register file, and added a changeRegFileContext function to call back into the RegFile. Used the RegFile clear function rather than memsetting it to 0.
cpu/exec_context.hh:
    Added the changeRegFileContext function.
cpu/exetrace.cc:
    Use the TheISA::NumIntRegs constant, and use readReg now that the integer register file is a class instead of an array.
cpu/exetrace.hh:
    Get the address of the regs object, now that it isn't an array.

--HG--
extra : convert_revision : ea2dd81be1c2e66b3c684af319eb58f8a77fd49c
2006-04-06 14:47:03 -04:00
Steve Reinhardt
5f307ebe35 Use op_decl instead of op_src_decl + op_dest_decl in .isa templates.
The latter causes multiple variable definitions if the same operand
is used as both a src and a dest.

arch/alpha/isa/mem.isa:
arch/mips/isa/formats/mem.isa:
    Use op_decl instead of op_src_decl + op_dest_decl.
    The latter causes multiple variable definitions if the same operand
    is used as both a src and a dest.

--HG--
extra : convert_revision : c14d91b293d3afef45c8728d3d8784f372c0b7f4
2006-03-28 22:32:08 -05:00
Steve Reinhardt
efc41fe82d Make .isa-file ##include file paths relative to including file.
Makes .isa files cleaner and simplifies scanner too.
Simplified scanner to work under both old and new versions of scons.

arch/SConscript:
    Simplify .isa scanner... seems to work with both scons 0.96.1 and 0.96.91 now.
    Assumes .isa ##include paths are relative to including file.
arch/alpha/isa/main.isa:
arch/mips/isa/formats/formats.isa:
arch/mips/isa/main.isa:
arch/sparc/isa/formats.isa:
arch/sparc/isa/main.isa:
    Make ##include paths relative to including file.
arch/isa_parser.py:
    Make ##include file paths relative to including file.
    Makes .isa files cleaner and simplifies scanner too.
    Partial rewrite of include-handling code to use cool re.sub() feature
    where you can specify a function to provide the replacement string.
    Minor cleanup of error-handling code.
    Also got rid of '#!' at top to make caller choose which python interpreter
    is used (since SPARC now requires 2.4 to build, we may need to do that via
    scons in the future).

--HG--
rename : arch/mips/isa/formats.isa => arch/mips/isa/formats/formats.isa
extra : convert_revision : 15a3920fa3aaf80cd94083eda853aa4e49425045
2006-03-28 22:29:42 -05:00
Korey Sewell
b3464ef180 support for unaligned memory access
arch/mips/isa/base.isa:
    disassembly fixes
arch/mips/isa/decoder.isa:
    support for unaligned loads/stores
arch/mips/isa_traits.hh:
    edit Syscall Reg values
arch/mips/linux_process.cc:
    call writevFunc on writev syscall

--HG--
extra : convert_revision : 4aea6d069bd7ba0e83b23d2d85c50d68532f0454
2006-03-19 13:40:03 -05:00
Korey Sewell
e6bc492554 more syscall fixes
arch/mips/isa_traits.hh:
    use syscall return function from alpha
arch/mips/linux_process.cc:
    fix some syntax errors,  map some functions to the desc. table

--HG--
extra : convert_revision : 75e8e8893b7d96bb4fc8e8eced53bd16c0a727d1
2006-03-18 11:31:31 -05:00
Korey Sewell
8ddd509c7c steps toward making syscalls work
arch/mips/isa/decoder.isa:
arch/mips/isa_traits.hh:
sim/syscall_emul.cc:
    make syscall instruction functional
arch/mips/linux_process.cc:
    add all MIPS/Linux syscalls to descriptor list

--HG--
extra : convert_revision : 5455a345e76be921e9f63b248aef874b6358e465
2006-03-18 10:51:28 -05:00
Korey Sewell
fc5d25bdb6 fix to LiveProcess (this change got deleted somehow)
--HG--
extra : convert_revision : fe4b7dc5b7d583e1d890648ba98bb0daf722a704
2006-03-16 19:01:09 -05:00
Korey Sewell
805b9cf1d5 Found and fixed 3 decoder.isa bugs!!! Now the hello_world program runs for a while
before getting in a infinite loop. It actually "tries" to syscall too, but syscalls
aren't implemented just yet

arch/mips/faults.cc:
    more descriptive names for faults (will help future users as well as me!)
arch/mips/isa/base.isa:
    make sure we are printing out "BasicOp" format disassembly instructions as dest,src,src instead of src,src,dest
arch/mips/isa/decoder.isa:
    FIX LW/SW Bug!!!! I was actually loading a byte instead of a word
    FIX JALR Bug!!!! I was not saving the link address in R31 for this instruction
    FIX SLL/NOP Bug!!! We now recognize the varying flavors of sll,nop,ehb,& ssnop correctly
base/loader/elf_object.cc:
    change back to original way
base/loader/elf_object.hh:
    change back to original!

--HG--
extra : convert_revision : 39b65fba31c1842ac6966346fe8a35816a4231fa
2006-03-16 18:39:54 -05:00
Korey Sewell
77a2f97c35 Merge zizzer:/bk/newmem
into  zazzer.eecs.umich.edu:/.automount/zooks/y/ksewell/research/m5-sim/newmem-mips

--HG--
extra : convert_revision : 9bdde9b5bd3049744451eda1134f080b7c4b1b59
2006-03-15 23:38:55 -05:00
Ali Saidi
97e424982a add translations for new sections that are mmapped or when the brk
is changed
Add a default machine width parameter
Arch based live processes

arch/alpha/linux/process.cc:
arch/alpha/linux/process.hh:
arch/alpha/process.cc:
arch/alpha/process.hh:
arch/alpha/tru64/process.cc:
arch/alpha/tru64/process.hh:
arch/mips/linux_process.cc:
arch/mips/process.cc:
arch/mips/process.hh:
arch/sparc/linux/process.cc:
arch/sparc/linux/process.hh:
arch/sparc/process.cc:
arch/sparc/process.hh:
configs/test/test.py:
python/m5/objects/Process.py:
sim/process.cc:
sim/process.hh:
    Architecture based live processes
arch/mips/isa_traits.hh:
arch/sparc/isa_traits.hh:
    Add a default machine width parameter
mem/port.hh:
    gcc 4 really wants  a virtual destructor
sim/byteswap.hh:
    remove the comment around long and unsigned long even though uint32_t
    and int32_t are defined. Seems to work with gcc 4 and 3.4.3.
sim/syscall_emul.cc:
sim/syscall_emul.hh:
    add translations for new sections that are mmapped or when the brk
    is changed

--HG--
extra : convert_revision : e2f9f228113c7127c87ef2358209a399c30ed5c6
2006-03-15 17:04:50 -05:00
Korey Sewell
c32b4ecac1 infinitesimal small baby steps toward MIPS actually working
arch/mips/isa/formats/branch.isa:
    let user know that we alter r31 in disassembly
arch/mips/isa_traits.cc:
    add copyRegs function ...
    comment out serialize float code for now
arch/mips/isa_traits.hh:
    make FloatRegFile a class ... change values of architectural regs
arch/mips/process.cc:
    change MIPS to Mips
base/loader/elf_object.cc:
    get global pointer initialized to a value
base/loader/elf_object.hh:
    Add global_ptr to elf_object constructor
base/loader/object_file.hh:
    MIPS to Mips
base/traceflags.py:
    SimpleCPU trace flag
cpu/simple/cpu.cc:
    DPRINTF flags for SimpleCPU
cpu/static_inst.hh:
    Add Decoder functions to static_inst.hh

--HG--
extra : convert_revision : 0544a8524d3fe4229428cb06822f7da208c72459
2006-03-15 16:26:40 -05:00
Korey Sewell
6547e8882b Minor Sconscript edit ... mips decoder changes ... initialize NNPC and output fault name in simple cpu
SConscript:
    Separate Alpha EIO from syscall building for other architectures
arch/isa_specific.hh:
    change MIPS constant to 34k
arch/mips/isa/decoder.isa:
    Allow sll,ssnop,nop, and ehb to be determined through decoder using
    the different types of default cases
arch/mips/isa/formats/branch.isa:
    Delete debug code
arch/mips/isa/formats/noop.isa:
    add a Nop format
arch/mips/isa_traits.hh:
    use constants instead of enums
arch/mips/process.cc:
    point to the correct header file
cpu/simple/cpu.cc:
    Output the actual fault name
sim/process.cc:
    Inititalize NNPC

--HG--
extra : convert_revision : adb0026dfad25b14c98fb03c98bfe9c681bba6f8
2006-03-14 18:28:51 -05:00
Steve Reinhardt
159cee1719 Clean up arch/*/process.hh includes and std namespace issues.
arch/alpha/process.cc:
arch/mips/process.cc:
arch/sparc/process.cc:
    You really do need the headers in the .cc file.
arch/alpha/process.hh:
    Don't include unnecessary headers in another header.
    Replace with forward class declarations.
arch/mips/process.hh:
arch/sparc/process.hh:
    Don't include unnecessary headers in another header.
    Replace with forward class declarations.
    Also fix std namespace... no "using" in header files!

--HG--
extra : convert_revision : f2cd953d0f4a212bb8148cc54c329aa3c18deb89
2006-03-12 16:27:52 -05:00
Korey Sewell
4d19bbeeeb MIPS is back to compiling and building now!
arch/alpha/isa_traits.hh:
    used for SimpleCPU instead of explicitly calling the namespace we declare in isa_traits.hhs
    so other archs. can use SimpleCPU
arch/mips/SConscript:
    dont include common_syscall or tru64
arch/mips/faults.cc:
arch/mips/faults.hh:
arch/mips/isa/formats/unimp.isa:
arch/mips/isa/formats/unknown.isa:
    Change Faults to new format
arch/mips/isa/decoder.isa:
    Fix readMiscReg access
    Made change so that you cant explicitly tell if a instruction nop,ehb,or ssnop... These are all variants
    of the sll instruction so I may need to make a separte class of instructions to handle thse better
arch/mips/isa/includes.isa:
    add isa_traits.hh and MipsISA included into every auto-gen file
arch/mips/isa_traits.cc:
    create copyMiscRegs function...
    delete useless code
arch/mips/isa_traits.hh:
    clean up for build
arch/mips/linux_process.cc:
    mem is now getMemPort(), linux process objects now take in a system argument
arch/mips/linux_process.hh:
    new argument for linux process
arch/mips/process.cc:
    add system
arch/mips/process.hh:
    add system variable
cpu/cpu_exec_context.cc:
    Change AlphaISA to TheISA
cpu/exec_context.hh:
    add readNextNPC and setNextNPC functions
cpu/simple/cpu.cc:
    include isa_traits for namespace declariation
cpu/simple/cpu.hh:
    PC & NPC access/modify functions
arch/mips/utility.hh:
    file needed for compile

--HG--
extra : convert_revision : 29a327e79c51c6174a6e526aa68c7aab7e7eb535
2006-03-12 05:57:34 -05:00
Korey Sewell
a3aae21d03 last changes before big merge
arch/alpha/isa_traits.hh:
arch/sparc/isa_traits.hh:
    add nnpc for compiling purposes in exec_context setNextNPC function
cpu/exec_context.hh:
    set NNPC function
cpu/simple/cpu.cc:
    use NNPC in determining what PC we are using

--HG--
extra : convert_revision : e810cfbc5dc31879b20d2cc40bf9871613203532
2006-03-09 03:27:51 -05:00
Korey Sewell
9e304ed3e6 minor comments to decoder.isa
arch/mips/isa/decoder.isa:
    comments

--HG--
extra : convert_revision : 8e4fdf36d7f7365cda062bc169a313bf860a4fe5
2006-03-09 02:34:12 -05:00
Korey Sewell
5a0fd8d9da add explicit support for nop,ssnop, and ehb instructions
--HG--
extra : convert_revision : 41151d38cabb6ce0ea81e5d78e4474d8f2ffeb67
2006-03-08 16:53:44 -05:00
Korey Sewell
bfd820f704 Update MiscReg enum and miscRegFile definition
update miscReg file access

arch/mips/isa/decoder.isa:
arch/mips/isa_traits.cc:
    update miscRegfile access
arch/mips/isa_traits.hh:
    Update MiscReg enum and miscRegFile definition

--HG--
extra : convert_revision : 9b6b9343d674e1e38e25bb9a4ffe4325142e7424
2006-03-08 04:36:55 -05:00
Korey Sewell
20e9a90edc updated MIPS ISA files .... all files should be able to compile/build with MIPS option except isa_traits.*
which I need to update the misc. regfile accesses

arch/mips/faults.cc:
arch/mips/faults.hh:
    alpha to mips
arch/mips/isa/base.isa:
    add includes
arch/mips/isa/bitfields.isa:
    more bitfields
arch/mips/isa/decoder.isa:
    lots o' lots o' lots o' changes!!!!
arch/mips/isa/formats.isa:
    include cop0.isa
arch/mips/isa/formats/basic.isa:
    fix faults
arch/mips/isa/formats/branch.isa:
arch/mips/isa/formats/fp.isa:
arch/mips/isa/formats/int.isa:
arch/mips/isa/formats/mem.isa:
arch/mips/isa/formats/noop.isa:
arch/mips/isa/formats/trap.isa:
arch/mips/isa/formats/unimp.isa:
arch/mips/isa/formats/unknown.isa:
arch/mips/isa/formats/util.isa:
arch/mips/isa/operands.isa:
arch/mips/isa_traits.cc:
arch/mips/linux_process.cc:
    merge MIPS-specific comilable/buidable files code into multiarch
arch/mips/isa_traits.hh:
    merge MIPS-specific comilable/buidable files code into multiarch... the miscRegs file accesses i have
    need to be recoded and everything should build then ...
arch/mips/stacktrace.hh:
    file copied over

--HG--
extra : convert_revision : 4a72e14fc5fb0a0d1f8b205dadbbf69636b7fb1f
2006-03-08 02:05:38 -05:00
Gabe Black
7c4c623302 Filled out the object file loader so it can load object files for several OSs and architectures.
SConscript:
    Added ./libelf as an include search directory. There might be a better spot for this than where I put it.
arch/SConscript:
    Combined the linux_process.h and tru64_process.h into process.h. This allows each ISA to support processes from arbitrary OSs.
arch/alpha/SConscript:
    Added process.cc as a source file. It provides an implementation of createProcess, which takes an object_file object and creates the appropriate process object, or dies.
base/loader/elf_object.cc:
    Actually extract the OS and architecture from the elf file, rather than always guessing Alpha and Linux.
base/loader/object_file.hh:
    Added constants for SPARC, MIPS, and Solaris, and changed the include for the Addr type.
sim/process.cc:
    Pushed creation of specific process objects into the ISA specific code.

--HG--
extra : convert_revision : b4754e7ca8328672d07e1394c4d162e199606b53
2006-03-04 03:09:23 -05:00
Steve Reinhardt
7a37037358 Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5
into  zizzer.eecs.umich.edu:/z/stever/bk/multiarch

arch/isa_parser.py:
    SCCS merged

--HG--
extra : convert_revision : 080cca7616b37db3bf18976b63b3dbcb47d8b918
2006-02-24 08:52:38 -05:00
Steve Reinhardt
99484cfae8 Create a Builder object for .isa files in arch/SConscript.
Start using SCons File objects to avoid fixed paths in
subordinate SConscripts.

SConscript:
    Push isa_parser stuff (including .isa scanner) down into
    arch/SConscript.
arch/SConscript:
    Create a Builder object for .isa files, including existing scanner.
    Return file objects generated by isa-specific SConscript
    back up to parent.
arch/alpha/SConscript:
arch/mips/SConscript:
arch/sparc/SConscript:
    Convert sources to scons File objects, so file names can be specified
    relative to the current directory.
    Invoke new builder for isa description, and get generated sources from
    there (instead of listing them explicitly).
arch/isa_parser.py:
    Get rid of third argument ("include_path").
    It was a pain to generate this from scons, and it turned out
    it's not needed anyway, since the only included file
    (decoder.hh) will be in the same directory as the sources.

--HG--
extra : convert_revision : 36861bcef36763f229704d8cb7a642b4486a3581
2006-02-23 14:31:15 -05:00
Korey Sewell
9bc7f13eeb make sure alpha still compiles , rename files back to original naming ...
Now that we have decoder.do, add new files so we can start compiling other files
needed for MIPS syscall emulation mode

arch/mips/linux_process.cc:
arch/mips/linux_process.hh:
    New MIPS-specific file

--HG--
rename : arch/alpha/linux_process.cc => arch/alpha/alpha_linux_process.cc
rename : arch/alpha/linux_process.hh => arch/alpha/alpha_linux_process.hh
rename : arch/alpha/tru64_process.cc => arch/alpha/alpha_tru64_process.cc
rename : arch/alpha/tru64_process.hh => arch/alpha/alpha_tru64_process.hh
extra : convert_revision : 2bfc27e8772523cbeb95f40684f9a32fe5554f87
2006-02-22 04:08:08 -05:00
Korey Sewell
54b47bc5ae MIPS Compiles scons/MIPS_SE/arch/mips/decoder.do!!!!!!
arch/mips/faults.hh:
    remove nonsense
arch/mips/isa/base.isa:
    define R31
arch/mips/isa/bitfields.isa:
    forgotten bitfields
arch/mips/isa/decoder.isa:
    INT64 -> int64_t
arch/mips/isa/formats.isa:
    fix comments
arch/mips/isa/formats/branch.isa:
    Branch -> BranchLikely
    RB -> RT
arch/mips/isa/formats/fp.isa:
    Make FP ops generates
arch/mips/isa/formats/mem.isa:
    RA,RB -> RS,RT
arch/mips/isa/formats/noop.isa:
    Rc -> Rd
arch/mips/isa/formats/util.isa:
    forgot brace and semicolon
arch/mips/isa/includes.isa:
    remove unnecessary files
arch/mips/isa_traits.hh:
    spacing
cpu/static_inst.hh:
    add cond_delay_slot flag

--HG--
extra : convert_revision : 3bc7353b437f9a764e85cc462bed86c9d654eb37
2006-02-22 03:33:35 -05:00
Korey Sewell
37cd6695eb Merge zizzer:/bk/multiarch
into  zazzer.eecs.umich.edu:/z/ksewell/research/m5-sim/multiarch

--HG--
rename : arch/alpha/alpha_memory.cc => arch/alpha/memory.cc
rename : arch/alpha/alpha_memory.hh => arch/alpha/memory.hh
extra : convert_revision : c641ba3c1009829b7276279b2dca441be1da5b30
2006-02-21 22:06:18 -05:00
Korey Sewell
a4799a89de Renaming alpha files and changing some MIPS stuff to be more like Alpha version
SConscript:
    changed the alpha_memory.hh to memory.hh in SConscript
arch/isa_parser.py:
    temporarily comment out o3 model
arch/mips/isa/base.isa:
arch/mips/isa_traits.cc:
arch/mips/isa_traits.hh:
    Fix Up Base Class to mirror how Alpha generates StaticInsts
arch/mips/faults.cc:
    MIPS fault.cc file
arch/mips/faults.hh:
    MIPS fault.hh file

--HG--
rename : arch/alpha/alpha_linux_process.cc => arch/alpha/linux_process.cc
rename : arch/alpha/alpha_linux_process.hh => arch/alpha/linux_process.hh
rename : arch/alpha/alpha_memory.cc => arch/alpha/memory.cc
rename : arch/alpha/alpha_memory.hh => arch/alpha/memory.hh
rename : arch/alpha/alpha_tru64_process.cc => arch/alpha/tru64_process.cc
rename : arch/alpha/alpha_tru64_process.hh => arch/alpha/tru64_process.hh
extra : convert_revision : f92d6e765ca96a8b952aef79ed119fa29464563b
2006-02-21 22:02:05 -05:00
Gabe Black
8d80fd1477 Changed Fault * to Fault, which is a typedef to FaultBase *, which is the old Fault class renamed.
--HG--
extra : convert_revision : 5b2f457401f8ff94fe39fe071288eb117814b7bb
2006-02-21 20:10:40 -05:00