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take-out debug only code

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arch/mips/isa/formats/fp.isa:
    take out debug-only code

--HG--
extra : convert_revision : 12c320b4b1432a626acefc496ec7a188c8b3fb66
This commit is contained in:
Korey Sewell 2006-05-04 21:21:11 -04:00
parent de8eba6891
commit 34a5732bd3
2 changed files with 0 additions and 16 deletions
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2
arch/mips/isa/formats/fp.isa
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@ -32,7 +32,6 @@ output decoder {{
// Primary format for float operate instructions:
def format FloatOp(code, *flags) {{
code = 'std::cout << "Floating Point Op" << std::endl;\n' + code
iop = InstObjParams(name, Name, 'MipsStaticInst', CodeBlock(code), flags)
header_output = BasicDeclare.subst(iop)
decoder_output = BasicConstructor.subst(iop)
@ -42,7 +41,6 @@ def format FloatOp(code, *flags) {{
// Primary format for float64 operate instructions:
def format Float64Op(code, *flags) {{
code = 'std::cout << "Floating Point 64" << std::endl;\n' + code
iop = InstObjParams(name, Name, 'MipsStaticInst', CodeBlock(code), flags)
header_output = BasicDeclare.subst(iop)
decoder_output = BasicConstructor.subst(iop)

14
arch/mips/isa_traits.hh
View file

@ -210,11 +210,6 @@ namespace MipsISA
class FloatRegFile
{
protected:
//Since the floating point registers overlap each other,
//A generic storage space is used. The float to be returned is
//pulled from the appropriate section of this region.
//char regSpace[SingleBytes * NumFloatRegs];
FloatReg32 regs[NumFloatRegs];
public:
@ -232,14 +227,10 @@ namespace MipsISA
{
case SingleWidth:
void *float_ptr = &regs[floatReg];
cout << "reading as float, reg." << floatReg << ": " << *(float *) float_ptr << endl;
cout << "reading as uint32_t, reg." << floatReg << ": " << *(uint32_t *) float_ptr << endl;
return *(float *) float_ptr;
case DoubleWidth:
void *double_ptr = &regs[floatReg];
cout << "reading as double, reg." << floatReg <<": " << *(double *) double_ptr << endl;
cout << "reading as uint64_t, reg." << floatReg << hex << ": 0x" << *(uint64_t *) float_ptr << endl;
return *(double *) double_ptr;
default:
@ -257,8 +248,6 @@ namespace MipsISA
return regs[floatReg];
case DoubleWidth:
cout << hex << "Combining " << regs[floatReg + 1] << " & " << regs[floatReg + 1] << endl;
cout << hex << "Returning " << ((FloatReg64)regs[floatReg] << 32 | regs[floatReg + 1]) << endl;
return (FloatReg64)regs[floatReg] << 32 | regs[floatReg + 1];
default:
@ -302,11 +291,8 @@ namespace MipsISA
break;
case DoubleWidth:
cout << hex << "Setting val: " << val << endl;
regs[floatReg] = val >> 32;
regs[floatReg + 1] = val;
cout << dec << "f" << floatReg << ": " << hex<< readRegBits(floatReg,32) << endl;
cout << dec << "f" << floatReg + 1 << ": " << hex << readRegBits(floatReg+1,32) << endl;
break;
default: