TimingSimpleCPU, which use atomic and timing memory accesses
respectively. Common code is factored into the BaseSimpleCPU class.
AtomicSimpleCPU includes an option (simulate_stalls) to add delays
based on the estimated latency reported by the atomic accesses.
Plain old "SimpleCPU" is gone; I have not updated all the config
files (just test/test.py).
Also fixes to get timing accesses working in new memory model and
to get split-phase memory instruction definitions working with
new memory model as well.
arch/alpha/isa/main.isa:
Need to include packet_impl.h for functions that use Packet objects.
arch/alpha/isa/mem.isa:
Change completeAcc() methods to take Packet object pointers.
Also split out StoreCond template for completeAcc(), since
that's the only one that needs write_result and we get an
unused variable warning if we always have it in there.
build/SConstruct:
Update list of recognized CPU model names.
configs/test/test.py:
Change SimpleCPU to AtomicSimpleCPU.
cpu/SConscript:
Define sources for new CPU models.
Add split memory access methods to CPU model signatures.
cpu/cpu_models.py:
cpu/static_inst.hh:
Define new CPU models.
cpu/simple/base.cc:
cpu/simple/base.hh:
Factor out pieces specific to Atomic or Timing models.
mem/bus.cc:
Bus needs to be able to route timing packets based on explicit dest
so responses can get back to requester. Set dest to Packet::Broadcast
to indicate that dest should be derived from address.
Also set packet src field based on port from which packet is sent.
mem/bus.hh:
Set packet src field based on port from which packet is sent.
mem/packet.hh:
Define Broadcast destination address to indicate that
packet should be routed based on address.
mem/physical.cc:
Set packet dest on response so packet is routed
back to requester properly.
mem/port.cc:
Flag blob packets as Broadcast.
python/m5/objects/PhysicalMemory.py:
Change default latency to be 1 cycle.
--HG--
rename : cpu/simple/cpu.cc => cpu/simple/base.cc
rename : cpu/simple/cpu.hh => cpu/simple/base.hh
extra : convert_revision : e9646af6406a20c8c605087936dc4683375c2132
into zeep.pool:/z/saidi/work/m5.nm_m5_pull
SConscript:
dram memory needs to be converted to newmem before we can use it
dev/ide_ctrl.cc:
don't need this printing in newmem
dev/ide_disk.cc:
will read stats in next commit
dev/sinic.cc:
merge sinic from head, still needs work
--HG--
extra : convert_revision : b9aabd8c7814d07d54ce6f971aad3ec349fa24e1
arch/alpha/isa/decoder.isa:
Fixed up Alpha to pass the syscall number directly to the syscall function.
arch/mips/isa/decoder.isa:
Fixed up MIPS to pass the syscall number directly to the syscall function.
arch/mips/isa/operands.isa:
Added an R2 operand which is passed to the syscall function as the syscall number to use.
--HG--
extra : convert_revision : 066d486cd6a2761b29e413c6d526c268788975f3
Update MIPS/Linux constants
arch/alpha/linux/linux.hh:
move RLIMIT constants to ALPHA/Linux class
arch/alpha/tru64/tru64.hh:
move RLIMIT constants to ALPHA/Tru64 class
arch/mips/mips_linux.hh:
update MIPS constants for MIPS/Linux
kern/linux/linux.hh:
remove RLIMIT constants from generic Linux class... these are now in ISA specific / OS specific classes
kern/tru64/tru64.hh:
remove RLIMIT constants from generic Tru64 class... these are now in ISA specific / OS specific classes
--HG--
extra : convert_revision : 2e2743d73ab18fcd558a5765cb4ef0e9671bd1d7
This class is derived from the original <OS> class and is used to define information that
is both architecure and OS specific (for example, the AlphaLinux class is derived from the
Linux class and defined in arch/alpha/linux/linux.hh).
SConscript:
no need to compile linux.cc and tru64.cc now, since openFlagsTable has been moved
arch/alpha/SConscript:
compile linux.cc and tru64.cc within alpha arch.
arch/alpha/linux/process.cc:
template syscall functions on AlphaLinux instead of Linux ... AlphaLinux is derived off of Linux
arch/alpha/tru64/process.cc:
template syscall functions on AlphaTru64 instead of Linux ... AlphaTru64 is derived off of Linux
moved tableFunc syscall function into this file
arch/mips/SConscript:
compile mips_linux.cc for openFlags table
arch/mips/isa_traits.hh:
remove constants from here
arch/mips/linux_process.cc:
template syscall functions on MipsLinux instead of Linux ... MipsLinux is derived off of Linux
kern/linux/linux.hh:
remove OSFlags
kern/tru64/tru64.hh:
remove OSFlags def., openFlagTable, and tableFunc ...
sim/syscall_emul.hh:
go back to using "OS" instead of "OSFlags"
arch/alpha/linux/linux.cc:
defines openFlagTable
arch/alpha/linux/linux.hh:
arch/alpha/tru64/tru64.hh:
Alpha Linux constants placed here in class derived from Linux class
arch/alpha/tru64/tru64.cc:
defines openFlagTable for AlphaTru64
arch/mips/mips_linux.cc:
MIPS Linux open flag table
arch/mips/mips_linux.hh:
Mips Linux constants placed here in class derived from Linux class
--HG--
extra : convert_revision : e6c1c2c895429c28fd141732e223e897ab19315e
Time to make the ide device work
arch/alpha/system.cc:
write the machine type and rev in the correct place
cpu/simple/cpu.cc:
reset the packet structure every time it's reused... wow the
simple cpu code for talking to memory is getting horrible.
dev/alpha_console.cc:
move the setAlphaAccess to startup() to make sure that the console
binary is loaded
dev/tsunami_cchip.cc:
dev/tsunami_pchip.cc:
dev/uart8250.cc:
fix a couple of bugs injected in the newmem fixes
mem/bus.cc:
More verbose bus tracing
mem/packet.hh:
Add a constructor to packet to set the result to unknown and a reset
method in the case it's being reused
mem/vport.hh:
don't need are own read/write methods since the base functional port
ones call writeBlob readBlob which do the translation for us
--HG--
extra : convert_revision : 8d0e2b782bfbf13dc5c59dab1a79a084d2a7da0a
into zazzer.eecs.umich.edu:/.automount/zooks/y/ksewell/research/m5-sim/newmem-mips
--HG--
extra : convert_revision : 4eff6e7ee7a25b8f5fdad7342b195a869cf528d6
flags for their functions (e.g. OS::OSFlags::TG_MAP_ANONYMOUS)...
arch/alpha/tru64/process.cc:
sim/syscall_emul.hh:
Add OSFlags to code
arch/mips/isa/decoder.isa:
slight decoder changes (more stylistic then anything)
arch/mips/isa/formats/util.isa:
spacing
arch/mips/isa_traits.hh:
add OSFlags struct to MipsISA namespace. The OS classes then use these OSFlags to access architecture-specific and OS-specific
flags for their functions
kern/linux/linux.hh:
remove constant placement ... define OSFlags in linux.hh
kern/tru64/tru64.hh:
define OSFlags in tru64
--HG--
extra : convert_revision : 59be1036eb439ca4ea1eea1d3b52e508023de6c9
Set locked flag if required
make SC always return success -- this needs to be fixed at some point
fix a couple of things
FS executes a bit of console code before dying a horrible death
arch/alpha/linux/system.cc:
only need to copy the length of the os flags param, not 256 bytes
cpu/simple/cpu.cc:
Set the physical flag if required
Make LL/SC always return success
mem/bus.cc:
add some dprintfs and change a assert to a panic
mem/port.cc:
delete the buffer with the [] operator
mem/request.hh:
add a function to reset a request
--HG--
extra : convert_revision : f2b78ddad33c7f6ffe1c48791d86609ff1d10d46
Constructor takes a bool to signify that it is either a cpu_request or not a cpu_request.
When accedding variables of a cpu_request it asserts that it is a cpu_request.
It also asserts that a value being read has been written at some point in time prior (not gaurnteeing it is up to date, but it was at least written before read).
There is also a isCpuReq() function to determine if this is a cpu_request. It should be called before accesing a cpu_request only variable.
SConscript:
Add compilation support for request.cc
arch/alpha/tlb.cc:
arch/alpha/tlb.hh:
cpu/cpu_exec_context.hh:
cpu/exec_context.hh:
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
dev/io_device.cc:
mem/page_table.cc:
mem/page_table.hh:
mem/port.cc:
Update for unified request object and accessor functions.
mem/request.hh:
Remove CpuRequest, make it a unified object. Make variables private with accessor functions.
May want to move things from .cc file into header (usually a assert() and either returning a value, or writting two).
--HG--
extra : convert_revision : f1e45cc490dadc7a418634539b03c3e72684a6e3
ALPHA_FS finally compiles again
SConscript:
Use a couple more FS sources, still don't compile that much
arch/alpha/faults.hh:
the unimp fault should probably exist in nonfs too.
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/simconsole.cc:
dev/simple_disk.cc:
dev/simple_disk.hh:
dev/uart.cc:
dev/uart.hh:
dev/uart8250.cc:
dev/uart8250.hh:
sim/process.cc:
sim/system.cc:
fixes for newmem
dev/io_device.hh:
a system pointer is probably useful for every device to have
mem/bus.hh:
mem/physical.cc:
new address ranges function
python/m5/objects/SimpleDisk.py:
simple disk now has a system pointer rather than physmem directly
--HG--
extra : convert_revision : d8c0a5c6510a6210aec5e8adfb0a4a06ec0dcebf
arch/alpha/isa_traits.hh:
arch/mips/isa_traits.cc:
Turned the integer register file into a class instead of a typedef to an array.
arch/alpha/regfile.hh:
Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs.
arch/mips/isa_traits.hh:
Turned the integer register file into a class instead of a typedef to an array. Also moved a "using namespace" into the namespace definition.
arch/sparc/isa_traits.hh:
Turned the integer register file into a class instead of a typedef to an array. Also "fixed" the max number of src and dest regs. They may need to be even larger.
arch/sparc/regfile.hh:
Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. Created setCWP and setAltGlobals functions for the IntRegFile.
cpu/cpu_exec_context.hh:
Used the accessor functions for the register file, and added a changeRegFileContext function to call back into the RegFile. Used the RegFile clear function rather than memsetting it to 0.
cpu/exec_context.hh:
Added the changeRegFileContext function.
cpu/exetrace.cc:
Use the TheISA::NumIntRegs constant, and use readReg now that the integer register file is a class instead of an array.
cpu/exetrace.hh:
Get the address of the regs object, now that it isn't an array.
--HG--
extra : convert_revision : ea2dd81be1c2e66b3c684af319eb58f8a77fd49c
SConscript:
comment out most devices
add vport.cc
arch/alpha/arguments.cc:
arch/alpha/arguments.hh:
push in alpha name space
fix for new memory system
arch/alpha/faults.cc:
arch/alpha/faults.hh:
Added an unimplemented fault that can be returned if a certain
function isn't implemented
arch/alpha/freebsd/system.cc:
arch/alpha/linux/system.cc:
arch/alpha/stacktrace.cc:
arch/alpha/system.cc:
arch/alpha/tlb.hh:
arch/alpha/tru64/system.cc:
fixed for new memory system
arch/alpha/tlb.cc:
fixed for new memory system
removed code that seems to have no purpose
arch/alpha/vtophys.cc:
arch/alpha/vtophys.hh:
fixed for new memory system
put in namespace AlphaISA
base/remote_gdb.cc:
fix for new memory system
cpu/cpu_exec_context.cc:
cpu/cpu_exec_context.hh:
cpu/exec_context.hh:
create two ports one of physical accesses and one for superpage accesses
Add functions getVirtPort() getPhysPort() delVirtPort(). To get statically
allocated physical or virtual ports or if an execcontext is passed in
get a dynamically allocated virtual port
dev/alpha_console.cc:
dev/alpha_console.hh:
Redo for new memory system
dev/io_device.cc:
dev/io_device.hh:
new I/O devices for new memory system
kern/linux/events.cc:
kern/linux/printk.cc:
kern/linux/printk.hh:
kern/tru64/dump_mbuf.hh:
kern/tru64/printf.cc:
kern/tru64/printf.hh:
Arguments now in namespaces
kern/tru64/tru64_events.cc:
mem/bus.cc:
fix for new memory syste
mem/physical.hh:
new addressranges function
getPort should be public
mem/port.hh:
Add write/read methods to functional port
update getDeviceAddrRanges to have a list of both snoops and response lists
sim/pseudo_inst.cc:
sim/system.cc:
sim/system.hh:
Update for new mem system
sim/vptr.hh:
comment out code and replace with panics
This will need to be fixed at some point, but it's not easy.
--HG--
extra : convert_revision : 41f41f422cfbab3751284d55cccb6ea64a7956e2
SE mode now has a port that goes to whatever toplevel mem object the
CPU sees that does the appropriate translation for syscall emulation
SConscript:
translating port is a syscall emu only source
arch/alpha/system.cc:
base/loader/object_file.cc:
base/loader/object_file.hh:
Use the new functional port to write the binaries into memory
cpu/cpu_exec_context.cc:
cpu/cpu_exec_context.hh:
cpu/simple/cpu.cc:
We aren't always going to be writing straight to memory with syscalls
support writing to a cache
mem/port.hh:
Add a simple unidirectional functional port that panics on any incoming requests
mem/translating_port.hh:
make translating port inherit from the simple port
sim/system.cc:
sim/system.hh:
Add a functional port that is used to load the original binaries
--HG--
extra : convert_revision : 9096866d0b23e3aceea68394abb76e63c0f8fd8d
arch/alpha/arguments.cc:
rather than returning 0, put a panic in... it will actually make us fix
this rather than scratching our respective heads
base/loader/object_file.cc:
base/loader/object_file.hh:
Object loader now takes a port rather than a translating port
cpu/cpu_exec_context.cc:
cpu/cpu_exec_context.hh:
sim/process.cc:
Make translating port a type of port rather than anything special
cpu/simple/cpu.cc:
no need to grab a port from the cpu anymore
mem/physical.cc:
add an additional type of port to physicalmemory called "functional"
Only used for functional accesses (loading binaries/syscall emu)
mem/port.hh:
make readBlok/writeBlob virtual so translating port can do the
translation first
mem/translating_port.cc:
mem/translating_port.hh:
Make TranslatingPort inherit from Port
sim/system.cc:
header file that doesn't exit removed
--HG--
extra : convert_revision : 89b08f6146bba61f5605678d736055feab2fe6f7
arch/alpha/arguments.cc:
There will not be a phys mem ptr in the XC in the newmem. This read will have to go through something else.
arch/alpha/ev5.cc:
Remove instantiations of these functions for the FastCPU, as the FastCPU is not really used. Also this messed up the ability to specify which CPU models are being built.
cpu/exec_context.hh:
Remove getPhysMemPtr() function.
cpu/exetrace.cc:
Include sim/system.hh, and sort the includes.
cpu/simple/cpu.cc:
Fixes for full system compilation.
kern/system_events.cc:
Remove include of encumbered FullCPU. The branch prediction will need to be fixed up in a more generic way in the future.
--HG--
extra : convert_revision : a8bbf562a277aa80e8f40112570c0a825298a05c
fix tlbs for newmem
SConscript:
page_table.cc is a syscall only kinda thing
arch/alpha/tlb.cc:
arch/alpha/tlb.hh:
fix tlbs for newmem
--HG--
extra : convert_revision : 0aafcb9698b993a807be883bde1696ee4d33b408
don't ever include a file while in a namespace
start of making alpha console new memsystem happy
Make a BasePioDevice which is what all the simple Pio devices will inherit from
add a description of when the data pointer will have memory
arch/alpha/isa_traits.hh:
don't ever include a file while in a namespace
dev/alpha_console.cc:
dev/alpha_console.hh:
start of making alpha console new memsystem happy
dev/io_device.cc:
dev/io_device.hh:
Make a BasePioDevice which is what all the simple Pio devices will inherit from
mem/packet.hh:
add a description of when the data pointer will have memory
--HG--
extra : convert_revision : 495c0915541f9cad3eb42891e60b4ecbee7952bf
The latter causes multiple variable definitions if the same operand
is used as both a src and a dest.
arch/alpha/isa/mem.isa:
arch/mips/isa/formats/mem.isa:
Use op_decl instead of op_src_decl + op_dest_decl.
The latter causes multiple variable definitions if the same operand
is used as both a src and a dest.
--HG--
extra : convert_revision : c14d91b293d3afef45c8728d3d8784f372c0b7f4
(which wasn't working since panic() isn't declared yet here).
arch/alpha/faults.hh:
Make ItbFault methods abstract instead of calling panic()
(which wasn't working since panic() isn't declared yet here).
--HG--
extra : convert_revision : b15242baa370777f265a3f6b7d5f5c05702b016f
Makes .isa files cleaner and simplifies scanner too.
Simplified scanner to work under both old and new versions of scons.
arch/SConscript:
Simplify .isa scanner... seems to work with both scons 0.96.1 and 0.96.91 now.
Assumes .isa ##include paths are relative to including file.
arch/alpha/isa/main.isa:
arch/mips/isa/formats/formats.isa:
arch/mips/isa/main.isa:
arch/sparc/isa/formats.isa:
arch/sparc/isa/main.isa:
Make ##include paths relative to including file.
arch/isa_parser.py:
Make ##include file paths relative to including file.
Makes .isa files cleaner and simplifies scanner too.
Partial rewrite of include-handling code to use cool re.sub() feature
where you can specify a function to provide the replacement string.
Minor cleanup of error-handling code.
Also got rid of '#!' at top to make caller choose which python interpreter
is used (since SPARC now requires 2.4 to build, we may need to do that via
scons in the future).
--HG--
rename : arch/mips/isa/formats.isa => arch/mips/isa/formats/formats.isa
extra : convert_revision : 15a3920fa3aaf80cd94083eda853aa4e49425045
arch/alpha/faults.cc:
Move TLB fault code into the normal fault invoke() method.
arch/alpha/faults.hh:
Move DTB/ITB fault handling code into their own class with a specific invoke() method. Have DTB/ITB faults derive from these classes.
Unfortunately the DtbAlignmentFault is somewhat odd; it's a normal alignment fault, but it must also set some specific IPRs.
arch/alpha/tlb.cc:
arch/alpha/tlb.hh:
Setting IPRs is now handled through the fault itself.
--HG--
extra : convert_revision : 5cb92ce2186ff79f632bfcbc9ba62a8a04400eae
arch/alpha/types.hh:
Moved the DependenceTags enum from types to constants.
arch/sparc/faults.cc:
arch/sparc/faults.hh:
Corrected a misspelling of PriviledgeOpcode and PrivilegedAction.
arch/sparc/isa/formats.isa:
Fixups towards compiling. Added a few additional instruction formats.
--HG--
extra : convert_revision : 4c5506877b71b8a5c8c45db41192cf759cdac374
is changed
Add a default machine width parameter
Arch based live processes
arch/alpha/linux/process.cc:
arch/alpha/linux/process.hh:
arch/alpha/process.cc:
arch/alpha/process.hh:
arch/alpha/tru64/process.cc:
arch/alpha/tru64/process.hh:
arch/mips/linux_process.cc:
arch/mips/process.cc:
arch/mips/process.hh:
arch/sparc/linux/process.cc:
arch/sparc/linux/process.hh:
arch/sparc/process.cc:
arch/sparc/process.hh:
configs/test/test.py:
python/m5/objects/Process.py:
sim/process.cc:
sim/process.hh:
Architecture based live processes
arch/mips/isa_traits.hh:
arch/sparc/isa_traits.hh:
Add a default machine width parameter
mem/port.hh:
gcc 4 really wants a virtual destructor
sim/byteswap.hh:
remove the comment around long and unsigned long even though uint32_t
and int32_t are defined. Seems to work with gcc 4 and 3.4.3.
sim/syscall_emul.cc:
sim/syscall_emul.hh:
add translations for new sections that are mmapped or when the brk
is changed
--HG--
extra : convert_revision : e2f9f228113c7127c87ef2358209a399c30ed5c6
arch/alpha/utility.hh:
Got rid of unnecessary extern and static qualifiers, and fixed up the hand merge.
arch/sparc/regfile.hh:
Fixed up SPARC after a hand merge.
--HG--
extra : convert_revision : 56e2d90ddd144f3386dbea50fa96cfc461d46b81
arch/alpha/arguments.cc:
Renamed readFloatRegInt to readFloatRegBits
arch/alpha/ev5.cc:
Removed the Double from setFloatRegDouble
arch/alpha/registerfile.hh:
Changed the floating point register file from a union of arrays to a class with appropriate accessor functions. The interface is necessary for SPARC.
arch/alpha/types.hh:
Changed the FloatReg type from a union of uint64_t and double to a double, and defined a new type FloatRegBits which is a uint64_t and is used to return the bits which compose a floating point register rather than the value of the register.
arch/isa_parser.py:
Adjusted the makeRead and makeWrite functions to generate the new versions of readFloatReg and setFloatReg.
base/remote_gdb.cc:
kern/tru64/tru64.hh:
Replaced setFloatRegInt with setFloatRegBits
cpu/cpu_exec_context.cc:
Removed the duplicated code for setting the floating point registers, and renamed the function to setFloatRegBits and readFloatRegBits.
cpu/cpu_exec_context.hh:
cpu/exec_context.hh:
cpu/o3/alpha_cpu_impl.hh:
cpu/o3/alpha_dyn_inst.hh:
cpu/o3/cpu.cc:
cpu/o3/cpu.hh:
cpu/o3/regfile.hh:
cpu/ozone/cpu.hh:
cpu/simple/cpu.hh:
Implemented the new versions of the floating point read and set functions.
cpu/simple/cpu.cc:
Replaced setFloatRegDouble with setFloatReg
--HG--
extra : convert_revision : 3dad06224723137f6033c335fb8f6395636767f2
arch/alpha/ev5.cc:
copyIprs now copies from a source ExecContext to a destination ExecContext.
arch/alpha/registerfile.hh:
Have ISA specific functions to copy all architected registers from one ExecContext to another.
cpu/cpu_exec_context.cc:
Call the ISA in order to copy any architected registers.
--HG--
extra : convert_revision : 056cc3b3a9f345535d5a57c6524b114bbd5ae3c8
arch/alpha/process.cc:
arch/mips/process.cc:
arch/sparc/process.cc:
You really do need the headers in the .cc file.
arch/alpha/process.hh:
Don't include unnecessary headers in another header.
Replace with forward class declarations.
arch/mips/process.hh:
arch/sparc/process.hh:
Don't include unnecessary headers in another header.
Replace with forward class declarations.
Also fix std namespace... no "using" in header files!
--HG--
extra : convert_revision : f2cd953d0f4a212bb8148cc54c329aa3c18deb89
arch/alpha/isa_traits.hh:
No unprotected "using" in header files.
cpu/simple/cpu.cc:
Fix ISA namespace "using" statement.
--HG--
extra : convert_revision : 317ea40f8de00748d7613a0116edab05770bdc72
into zazzer.eecs.umich.edu:/.automount/zooks/y/ksewell/research/m5-sim/newmem
--HG--
extra : convert_revision : b101fa550567d5a9f5de6c2d8c3f67829ae050c1
arch/alpha/isa_traits.hh:
used for SimpleCPU instead of explicitly calling the namespace we declare in isa_traits.hhs
so other archs. can use SimpleCPU
arch/mips/SConscript:
dont include common_syscall or tru64
arch/mips/faults.cc:
arch/mips/faults.hh:
arch/mips/isa/formats/unimp.isa:
arch/mips/isa/formats/unknown.isa:
Change Faults to new format
arch/mips/isa/decoder.isa:
Fix readMiscReg access
Made change so that you cant explicitly tell if a instruction nop,ehb,or ssnop... These are all variants
of the sll instruction so I may need to make a separte class of instructions to handle thse better
arch/mips/isa/includes.isa:
add isa_traits.hh and MipsISA included into every auto-gen file
arch/mips/isa_traits.cc:
create copyMiscRegs function...
delete useless code
arch/mips/isa_traits.hh:
clean up for build
arch/mips/linux_process.cc:
mem is now getMemPort(), linux process objects now take in a system argument
arch/mips/linux_process.hh:
new argument for linux process
arch/mips/process.cc:
add system
arch/mips/process.hh:
add system variable
cpu/cpu_exec_context.cc:
Change AlphaISA to TheISA
cpu/exec_context.hh:
add readNextNPC and setNextNPC functions
cpu/simple/cpu.cc:
include isa_traits for namespace declariation
cpu/simple/cpu.hh:
PC & NPC access/modify functions
arch/mips/utility.hh:
file needed for compile
--HG--
extra : convert_revision : 29a327e79c51c6174a6e526aa68c7aab7e7eb535
an obsolete function that doesn't exist.
arch/alpha/tru64/process.cc:
sim/process.cc:
Don't include useless header.
--HG--
extra : convert_revision : 1dd5edeb0703e2190b89ea5ff563df4c95b7cf59
arch/SConscript:
Sorted the switch headers, and added registerfile.hh, constants.hh, types.hh, and utility.hh.
arch/alpha/isa_traits.hh:
Moved the register file types to registerfile.hh, small functions to utility.hh, and cleaned out alot of stuff that isn't necessary anymore.
base/loader/ecoff_object.cc:
base/loader/elf_object.cc:
cpu/pc_event.hh:
cpu/static_inst.hh:
mem/port.hh:
sim/faults.cc:
sim/system.hh:
base/misc.hh isn't included through isa_traits.hh anymore.
cpu/simple/cpu.cc:
Added include for arch/utility.hh
--HG--
extra : convert_revision : 24f65f330f87e3c909c939596cfcf48336022eaf
