Gabe Black
1f059541d6
ARM: Add a new RegImmOp base class.
2010-06-02 12:58:12 -05:00
Gabe Black
6976b4890a
ARM: Add a RegRegImmOp base class.
2010-06-02 12:58:12 -05:00
Gabe Black
186cfe3ae3
ARM: Widen the immediate fields in the misc instruction classes.
2010-06-02 12:58:12 -05:00
Gabe Black
abda50173c
ARM: Add fp operands to operands.isa.
2010-06-02 12:58:12 -05:00
Gabe Black
6365d29c21
ARM: Decode the VMRS instruction.
2010-06-02 12:58:11 -05:00
Gabe Black
aade63a8fe
ARM: Implement the VMRS instruction.
2010-06-02 12:58:11 -05:00
Gabe Black
a8b56b452c
ARM: Decode the VMSR instruction.
2010-06-02 12:58:11 -05:00
Gabe Black
06008c54eb
ARM: Implement the VMSR instruction.
2010-06-02 12:58:11 -05:00
Gabe Black
0ff71c7c34
ARM: Decode 8, 16, and 32 bit transfers between core and extension (fp) registers.
2010-06-02 12:58:11 -05:00
Gabe Black
c3bf29bbea
ARM: Implement the udiv instruction.
2010-06-02 12:58:11 -05:00
Gabe Black
f3e65c2de2
ARM: Implement the sdiv instruction.
2010-06-02 12:58:11 -05:00
Gabe Black
ba33db8fd6
ARM: Decode the CPS instruction.
2010-06-02 12:58:11 -05:00
Gabe Black
7861b084f6
ARM: Implement the CPS instruction.
2010-06-02 12:58:11 -05:00
Gabe Black
eb1447302d
ARM: Decode the SRS instruction.
2010-06-02 12:58:11 -05:00
Gabe Black
bb6fea91da
ARM: Implement the SRS instruction.
2010-06-02 12:58:11 -05:00
Gabe Black
dbee6e0c54
ARM: Add a base class for SRS.
2010-06-02 12:58:11 -05:00
Gabe Black
a5ea52bb45
ARM: Allow flattening into any mode.
2010-06-02 12:58:11 -05:00
Gabe Black
698ee26c6b
ARM: Decode TBB and TBH.
2010-06-02 12:58:11 -05:00
Gabe Black
6fa713a66c
ARM: Decode the setend instruction.
2010-06-02 12:58:11 -05:00
Gabe Black
4683cd1655
ARM: Define the setend instruction.
2010-06-02 12:58:10 -05:00
Gabe Black
fb23297914
ARM: Make a base class for instructions that use only an immediate.
2010-06-02 12:58:10 -05:00
Gabe Black
247acd93c4
ARM: Decode the arm version of ldrexd.
2010-06-02 12:58:10 -05:00
Gabe Black
3ad31f61c2
ARM: Decode the strex instructions.
2010-06-02 12:58:10 -05:00
Gabe Black
54ab07e636
ARM: Implement the strex instructions.
2010-06-02 12:58:10 -05:00
Gabe Black
6fb5189c47
ARM: Ignore/warn on accesses to the DRBAR, DRACR, and DRSR registers.
2010-06-02 12:58:10 -05:00
Gabe Black
3aa8faf177
ARM: Ignore/warn on accesses to the BPIALLIS and BPIALL registers.
2010-06-02 12:58:10 -05:00
Gabe Black
faf6c727f6
ARM: Respect the E bit of the CPSR when doing loads and stores.
2010-06-02 12:58:10 -05:00
Gabe Black
1d5233958a
ARM: Implement the V7 version of alignment checking.
2010-06-02 12:58:10 -05:00
Gabe Black
7b397925af
ARM: Decode the RFE instruction.
2010-06-02 12:58:10 -05:00
Gabe Black
a2cb503ba6
ARM: Implement the RFE instruction.
2010-06-02 12:58:10 -05:00
Gabe Black
ec4cd00b11
ARM: Add a base class for the RFE instruction.
2010-06-02 12:58:10 -05:00
Gabe Black
1ada9d4880
ARM: Make sure some undefined thumb32 instructions fault.
2010-06-02 12:58:10 -05:00
Gabe Black
3caa75d53a
ARM: Squash the low order bits of the PC when performing a regular branch.
2010-06-02 12:58:10 -05:00
Gabe Black
36eeee0133
ARM: When changing the CPSR and branching, make sure the branch is second.
2010-06-02 12:58:09 -05:00
Gabe Black
741b243260
ARM: Ignore/warn access to the bpimva registers.
2010-06-02 12:58:09 -05:00
Gabe Black
8a7f60194e
ARM: Ignore/warn on accesses to the dccmvac register.
2010-06-02 12:58:09 -05:00
Gabe Black
89133b15da
ARM: Decode the enterx and leavex instructions.
2010-06-02 12:58:09 -05:00
Gabe Black
6a4ea7cca9
ARM: Implement the enterx and leavex instructions.
...
These enter and leave thumbEE mode. Currently thumbEE mode behaves exactly the
same as Thumb mode, but at least this will make it -look- like we're enter and
leaving it. The actual behavioral changes will be implemented in future
changes.
2010-06-02 12:58:09 -05:00
Gabe Black
eb0823c4f2
ARM: Fix the implementation of BX to work in thumbEE mode.
2010-06-02 12:58:09 -05:00
Gabe Black
bb0d390105
ARM: When an instruction is intentionally undefined, fault on it.
2010-06-02 12:58:09 -05:00
Gabe Black
61a5e71be7
ARM: Decode the thumb version of the ldrd and strd instructions.
2010-06-02 12:58:09 -05:00
Gabe Black
9d4a1bf2ba
ARM: Explicitly keep track of the second destination for double loads/stores.
2010-06-02 12:58:09 -05:00
Gabe Black
28023f6f3d
ARM: Decode the thumb32 load byte/memory hint instructions.
2010-06-02 12:58:09 -05:00
Gabe Black
7a9dcdf99f
ARM: Decode the load halfword, memory hints instructions for 32 bit Thumb.
2010-06-02 12:58:09 -05:00
Gabe Black
a483d44d9f
ARM: Ignore/warn on accesses to icimvau.
2010-06-02 12:58:09 -05:00
Gabe Black
d618121670
ARM: Ignore/warn on ICIALLUIS.
2010-06-02 12:58:09 -05:00
Gabe Black
896c7617c4
ARM: Decode the unimplemented data barrier CP15 accesses.
...
These are CP15DSB (Data Synchronization Barrier), and CP15DMB (Data Memory
Barrier).
2010-06-02 12:58:09 -05:00
Gabe Black
6c9ab5d898
ARM: Replace the ARM decode of CP15 MCR and MRC instructions.
2010-06-02 12:58:08 -05:00
Gabe Black
35f0c01fea
ARM: Decode the unimplemented cp15 instruction barrier.
2010-06-02 12:58:08 -05:00
Gabe Black
7932b86298
ARM: Ignore accesses to DCCIMVAC.
2010-06-02 12:58:08 -05:00
